1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Copyright (C) 2001 MIPS Technologies, Inc. 9 */ 10 11#include <asm/asm.h> 12#include <asm/asmmacro.h> 13#include <asm/regdef.h> 14#include <asm/mipsregs.h> 15#include <asm/stackframe.h> 16#include <asm/isadep.h> 17#include <asm/thread_info.h> 18#include <asm/war.h> 19#ifdef CONFIG_MIPS_MT_SMTC 20#include <asm/mipsmtregs.h> 21#endif 22 23#ifdef CONFIG_PREEMPT 24 .macro preempt_stop 25 .endm 26#else 27 .macro preempt_stop 28 local_irq_disable 29 .endm 30#define resume_kernel restore_all 31#endif 32 33 .text 34 .align 5 35FEXPORT(ret_from_exception) 36 preempt_stop 37FEXPORT(ret_from_irq) 38 LONG_L t0, PT_STATUS(sp) # returning to kernel mode? 39 andi t0, t0, KU_USER 40 beqz t0, resume_kernel 41 42resume_userspace: 43 local_irq_disable # make sure we dont miss an 44 # interrupt setting need_resched 45 # between sampling and return 46 LONG_L a2, TI_FLAGS($28) # current->work 47 andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace) 48 bnez t0, work_pending 49 j restore_all 50 51#ifdef CONFIG_PREEMPT 52resume_kernel: 53 local_irq_disable 54 lw t0, TI_PRE_COUNT($28) 55 bnez t0, restore_all 56need_resched: 57 LONG_L t0, TI_FLAGS($28) 58 andi t1, t0, _TIF_NEED_RESCHED 59 beqz t1, restore_all 60 LONG_L t0, PT_STATUS(sp) # Interrupts off? 61 andi t0, 1 62 beqz t0, restore_all 63 jal preempt_schedule_irq 64 b need_resched 65#endif 66 67FEXPORT(ret_from_fork) 68 jal schedule_tail # a0 = struct task_struct *prev 69 70FEXPORT(syscall_exit) 71 local_irq_disable # make sure need_resched and 72 # signals dont change between 73 # sampling and return 74 LONG_L a2, TI_FLAGS($28) # current->work 75 li t0, _TIF_ALLWORK_MASK 76 and t0, a2, t0 77 bnez t0, syscall_exit_work 78 79FEXPORT(restore_all) # restore full frame 80#ifdef CONFIG_MIPS_MT_SMTC 81/* Detect and execute deferred IPI "interrupts" */ 82 move a0,sp 83 jal deferred_smtc_ipi 84/* Re-arm any temporarily masked interrupts not explicitly "acked" */ 85 mfc0 v0, CP0_TCSTATUS 86 ori v1, v0, TCSTATUS_IXMT 87 mtc0 v1, CP0_TCSTATUS 88 andi v0, TCSTATUS_IXMT 89 _ehb 90 mfc0 t0, CP0_TCCONTEXT 91 DMT 9 # dmt t1 92 jal mips_ihb 93 mfc0 t2, CP0_STATUS 94 andi t3, t0, 0xff00 95 or t2, t2, t3 96 mtc0 t2, CP0_STATUS 97 _ehb 98 andi t1, t1, VPECONTROL_TE 99 beqz t1, 1f 100 EMT 1011: 102 mfc0 v1, CP0_TCSTATUS 103 /* We set IXMT above, XOR should clear it here */ 104 xori v1, v1, TCSTATUS_IXMT 105 or v1, v0, v1 106 mtc0 v1, CP0_TCSTATUS 107 _ehb 108 xor t0, t0, t3 109 mtc0 t0, CP0_TCCONTEXT 110#endif /* CONFIG_MIPS_MT_SMTC */ 111 .set noat 112 RESTORE_TEMP 113 RESTORE_AT 114 RESTORE_STATIC 115FEXPORT(restore_partial) # restore partial frame 116 RESTORE_SOME 117 RESTORE_SP_AND_RET 118 .set at 119 120work_pending: 121 andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS 122 beqz t0, work_notifysig 123work_resched: 124 jal schedule 125 126 local_irq_disable # make sure need_resched and 127 # signals dont change between 128 # sampling and return 129 LONG_L a2, TI_FLAGS($28) 130 andi t0, a2, _TIF_WORK_MASK # is there any work to be done 131 # other than syscall tracing? 132 beqz t0, restore_all 133 andi t0, a2, _TIF_NEED_RESCHED 134 bnez t0, work_resched 135 136work_notifysig: # deal with pending signals and 137 # notify-resume requests 138 move a0, sp 139 li a1, 0 140 jal do_notify_resume # a2 already loaded 141 j resume_userspace 142 143FEXPORT(syscall_exit_work_partial) 144 SAVE_STATIC 145syscall_exit_work: 146 li t0, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT 147 and t0, a2 # a2 is preloaded with TI_FLAGS 148 beqz t0, work_pending # trace bit set? 149 local_irq_enable # could let do_syscall_trace() 150 # call schedule() instead 151 move a0, sp 152 li a1, 1 153 jal do_syscall_trace 154 b resume_userspace 155 156#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT) 157 158/* 159 * MIPS32R2 Instruction Hazard Barrier - must be called 160 * 161 * For C code use the inline version named instruction_hazard(). 162 */ 163LEAF(mips_ihb) 164 .set mips32r2 165 jr.hb ra 166 nop 167 END(mips_ihb) 168 169#endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */ 170