11da177e4SLinus Torvalds/* 21da177e4SLinus Torvalds * This file is subject to the terms and conditions of the GNU General Public 31da177e4SLinus Torvalds * License. See the file "COPYING" in the main directory of this archive 41da177e4SLinus Torvalds * for more details. 51da177e4SLinus Torvalds * 61da177e4SLinus Torvalds * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle 71da177e4SLinus Torvalds * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 81da177e4SLinus Torvalds * Copyright (C) 2001 MIPS Technologies, Inc. 91da177e4SLinus Torvalds */ 101da177e4SLinus Torvalds 111da177e4SLinus Torvalds#include <asm/asm.h> 121da177e4SLinus Torvalds#include <asm/asmmacro.h> 131da177e4SLinus Torvalds#include <asm/regdef.h> 141da177e4SLinus Torvalds#include <asm/mipsregs.h> 151da177e4SLinus Torvalds#include <asm/stackframe.h> 161da177e4SLinus Torvalds#include <asm/isadep.h> 171da177e4SLinus Torvalds#include <asm/thread_info.h> 181da177e4SLinus Torvalds#include <asm/war.h> 1941c594abSRalf Baechle#ifdef CONFIG_MIPS_MT_SMTC 2041c594abSRalf Baechle#include <asm/mipsmtregs.h> 2141c594abSRalf Baechle#endif 221da177e4SLinus Torvalds 23*f431baa5SAtsushi Nemoto#ifndef CONFIG_PREEMPT 24c2648527SThiemo Seufer .macro preempt_stop 25c2648527SThiemo Seufer local_irq_disable 261da177e4SLinus Torvalds .endm 271da177e4SLinus Torvalds#define resume_kernel restore_all 281da177e4SLinus Torvalds#endif 291da177e4SLinus Torvalds 301da177e4SLinus Torvalds .text 311da177e4SLinus Torvalds .align 5 32*f431baa5SAtsushi NemotoFEXPORT(ret_from_irq) 33*f431baa5SAtsushi Nemoto LONG_S s0, TI_REGS($28) 34*f431baa5SAtsushi Nemoto#ifdef CONFIG_PREEMPT 35*f431baa5SAtsushi NemotoFEXPORT(ret_from_exception) 36*f431baa5SAtsushi Nemoto#else 37*f431baa5SAtsushi Nemoto b _ret_from_irq 381da177e4SLinus TorvaldsFEXPORT(ret_from_exception) 391da177e4SLinus Torvalds preempt_stop 40*f431baa5SAtsushi Nemoto#endif 41*f431baa5SAtsushi NemotoFEXPORT(_ret_from_irq) 421da177e4SLinus Torvalds LONG_L t0, PT_STATUS(sp) # returning to kernel mode? 431da177e4SLinus Torvalds andi t0, t0, KU_USER 441da177e4SLinus Torvalds beqz t0, resume_kernel 451da177e4SLinus Torvalds 46c2648527SThiemo Seuferresume_userspace: 47c2648527SThiemo Seufer local_irq_disable # make sure we dont miss an 481da177e4SLinus Torvalds # interrupt setting need_resched 491da177e4SLinus Torvalds # between sampling and return 501da177e4SLinus Torvalds LONG_L a2, TI_FLAGS($28) # current->work 51c2648527SThiemo Seufer andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace) 52c2648527SThiemo Seufer bnez t0, work_pending 531da177e4SLinus Torvalds j restore_all 541da177e4SLinus Torvalds 551da177e4SLinus Torvalds#ifdef CONFIG_PREEMPT 56c2648527SThiemo Seuferresume_kernel: 57a18815abSRalf Baechle local_irq_disable 581da177e4SLinus Torvalds lw t0, TI_PRE_COUNT($28) 591da177e4SLinus Torvalds bnez t0, restore_all 601da177e4SLinus Torvaldsneed_resched: 611da177e4SLinus Torvalds LONG_L t0, TI_FLAGS($28) 621da177e4SLinus Torvalds andi t1, t0, _TIF_NEED_RESCHED 631da177e4SLinus Torvalds beqz t1, restore_all 641da177e4SLinus Torvalds LONG_L t0, PT_STATUS(sp) # Interrupts off? 651da177e4SLinus Torvalds andi t0, 1 661da177e4SLinus Torvalds beqz t0, restore_all 67a18815abSRalf Baechle jal preempt_schedule_irq 68cdaed73aSRalf Baechle b need_resched 691da177e4SLinus Torvalds#endif 701da177e4SLinus Torvalds 711da177e4SLinus TorvaldsFEXPORT(ret_from_fork) 7236c8b586SIngo Molnar jal schedule_tail # a0 = struct task_struct *prev 731da177e4SLinus Torvalds 741da177e4SLinus TorvaldsFEXPORT(syscall_exit) 751da177e4SLinus Torvalds local_irq_disable # make sure need_resched and 761da177e4SLinus Torvalds # signals dont change between 771da177e4SLinus Torvalds # sampling and return 781da177e4SLinus Torvalds LONG_L a2, TI_FLAGS($28) # current->work 791da177e4SLinus Torvalds li t0, _TIF_ALLWORK_MASK 801da177e4SLinus Torvalds and t0, a2, t0 811da177e4SLinus Torvalds bnez t0, syscall_exit_work 821da177e4SLinus Torvalds 831da177e4SLinus TorvaldsFEXPORT(restore_all) # restore full frame 8441c594abSRalf Baechle#ifdef CONFIG_MIPS_MT_SMTC 8541c594abSRalf Baechle/* Detect and execute deferred IPI "interrupts" */ 8641c594abSRalf Baechle jal deferred_smtc_ipi 8741c594abSRalf Baechle/* Re-arm any temporarily masked interrupts not explicitly "acked" */ 8841c594abSRalf Baechle mfc0 v0, CP0_TCSTATUS 8941c594abSRalf Baechle ori v1, v0, TCSTATUS_IXMT 9041c594abSRalf Baechle mtc0 v1, CP0_TCSTATUS 9141c594abSRalf Baechle andi v0, TCSTATUS_IXMT 924277ff5eSRalf Baechle _ehb 9341c594abSRalf Baechle mfc0 t0, CP0_TCCONTEXT 9441c594abSRalf Baechle DMT 9 # dmt t1 9541c594abSRalf Baechle jal mips_ihb 9641c594abSRalf Baechle mfc0 t2, CP0_STATUS 9741c594abSRalf Baechle andi t3, t0, 0xff00 9841c594abSRalf Baechle or t2, t2, t3 9941c594abSRalf Baechle mtc0 t2, CP0_STATUS 1004277ff5eSRalf Baechle _ehb 10141c594abSRalf Baechle andi t1, t1, VPECONTROL_TE 10241c594abSRalf Baechle beqz t1, 1f 10341c594abSRalf Baechle EMT 10441c594abSRalf Baechle1: 10541c594abSRalf Baechle mfc0 v1, CP0_TCSTATUS 106477654fcSRalf Baechle /* We set IXMT above, XOR should clear it here */ 10741c594abSRalf Baechle xori v1, v1, TCSTATUS_IXMT 10841c594abSRalf Baechle or v1, v0, v1 10941c594abSRalf Baechle mtc0 v1, CP0_TCSTATUS 1104277ff5eSRalf Baechle _ehb 11141c594abSRalf Baechle xor t0, t0, t3 11241c594abSRalf Baechle mtc0 t0, CP0_TCCONTEXT 11341c594abSRalf Baechle#endif /* CONFIG_MIPS_MT_SMTC */ 1141da177e4SLinus Torvalds .set noat 1151da177e4SLinus Torvalds RESTORE_TEMP 1161da177e4SLinus Torvalds RESTORE_AT 1171da177e4SLinus Torvalds RESTORE_STATIC 1181da177e4SLinus TorvaldsFEXPORT(restore_partial) # restore partial frame 119192ef366SRalf Baechle#ifdef CONFIG_TRACE_IRQFLAGS 120192ef366SRalf Baechle SAVE_STATIC 121192ef366SRalf Baechle SAVE_AT 122192ef366SRalf Baechle SAVE_TEMP 123192ef366SRalf Baechle LONG_L v0, PT_STATUS(sp) 124192ef366SRalf Baechle and v0, 1 125192ef366SRalf Baechle beqz v0, 1f 126192ef366SRalf Baechle jal trace_hardirqs_on 127192ef366SRalf Baechle b 2f 128192ef366SRalf Baechle1: jal trace_hardirqs_off 129192ef366SRalf Baechle2: 130192ef366SRalf Baechle RESTORE_TEMP 131192ef366SRalf Baechle RESTORE_AT 132192ef366SRalf Baechle RESTORE_STATIC 133192ef366SRalf Baechle#endif 1341da177e4SLinus Torvalds RESTORE_SOME 1351da177e4SLinus Torvalds RESTORE_SP_AND_RET 1361da177e4SLinus Torvalds .set at 1371da177e4SLinus Torvalds 138c2648527SThiemo Seuferwork_pending: 139c2648527SThiemo Seufer andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS 1401da177e4SLinus Torvalds beqz t0, work_notifysig 1411da177e4SLinus Torvaldswork_resched: 1421da177e4SLinus Torvalds jal schedule 1431da177e4SLinus Torvalds 144c2648527SThiemo Seufer local_irq_disable # make sure need_resched and 1451da177e4SLinus Torvalds # signals dont change between 1461da177e4SLinus Torvalds # sampling and return 1471da177e4SLinus Torvalds LONG_L a2, TI_FLAGS($28) 1481da177e4SLinus Torvalds andi t0, a2, _TIF_WORK_MASK # is there any work to be done 1491da177e4SLinus Torvalds # other than syscall tracing? 1501da177e4SLinus Torvalds beqz t0, restore_all 1511da177e4SLinus Torvalds andi t0, a2, _TIF_NEED_RESCHED 1521da177e4SLinus Torvalds bnez t0, work_resched 1531da177e4SLinus Torvalds 1541da177e4SLinus Torvaldswork_notifysig: # deal with pending signals and 1551da177e4SLinus Torvalds # notify-resume requests 1561da177e4SLinus Torvalds move a0, sp 1571da177e4SLinus Torvalds li a1, 0 1581da177e4SLinus Torvalds jal do_notify_resume # a2 already loaded 1590bf0e3e2SRalf Baechle j resume_userspace 1601da177e4SLinus Torvalds 1611da177e4SLinus TorvaldsFEXPORT(syscall_exit_work_partial) 1621da177e4SLinus Torvalds SAVE_STATIC 163c2648527SThiemo Seufersyscall_exit_work: 164c2648527SThiemo Seufer li t0, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT 165c2648527SThiemo Seufer and t0, a2 # a2 is preloaded with TI_FLAGS 166c2648527SThiemo Seufer beqz t0, work_pending # trace bit set? 1671da177e4SLinus Torvalds local_irq_enable # could let do_syscall_trace() 1681da177e4SLinus Torvalds # call schedule() instead 1691da177e4SLinus Torvalds move a0, sp 1701da177e4SLinus Torvalds li a1, 1 1711da177e4SLinus Torvalds jal do_syscall_trace 1721da177e4SLinus Torvalds b resume_userspace 173bce1a286SRalf Baechle 174bce1a286SRalf Baechle#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT) 175bce1a286SRalf Baechle 176bce1a286SRalf Baechle/* 177bce1a286SRalf Baechle * MIPS32R2 Instruction Hazard Barrier - must be called 178bce1a286SRalf Baechle * 179bce1a286SRalf Baechle * For C code use the inline version named instruction_hazard(). 180bce1a286SRalf Baechle */ 181bce1a286SRalf BaechleLEAF(mips_ihb) 182bce1a286SRalf Baechle .set mips32r2 183bce1a286SRalf Baechle jr.hb ra 184bce1a286SRalf Baechle nop 185bce1a286SRalf Baechle END(mips_ihb) 186bce1a286SRalf Baechle 187bce1a286SRalf Baechle#endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */ 188