xref: /linux/arch/mips/kernel/entry.S (revision 4277ff5ee55694f67d9c6586bb4c06991e221a68)
11da177e4SLinus Torvalds/*
21da177e4SLinus Torvalds * This file is subject to the terms and conditions of the GNU General Public
31da177e4SLinus Torvalds * License.  See the file "COPYING" in the main directory of this archive
41da177e4SLinus Torvalds * for more details.
51da177e4SLinus Torvalds *
61da177e4SLinus Torvalds * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
71da177e4SLinus Torvalds * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
81da177e4SLinus Torvalds * Copyright (C) 2001 MIPS Technologies, Inc.
91da177e4SLinus Torvalds */
101da177e4SLinus Torvalds#include <linux/config.h>
111da177e4SLinus Torvalds
121da177e4SLinus Torvalds#include <asm/asm.h>
131da177e4SLinus Torvalds#include <asm/asmmacro.h>
141da177e4SLinus Torvalds#include <asm/regdef.h>
151da177e4SLinus Torvalds#include <asm/mipsregs.h>
161da177e4SLinus Torvalds#include <asm/stackframe.h>
171da177e4SLinus Torvalds#include <asm/isadep.h>
181da177e4SLinus Torvalds#include <asm/thread_info.h>
191da177e4SLinus Torvalds#include <asm/war.h>
2041c594abSRalf Baechle#ifdef CONFIG_MIPS_MT_SMTC
2141c594abSRalf Baechle#include <asm/mipsmtregs.h>
2241c594abSRalf Baechle#endif
231da177e4SLinus Torvalds
241da177e4SLinus Torvalds#ifdef CONFIG_PREEMPT
25c2648527SThiemo Seufer	.macro	preempt_stop
261da177e4SLinus Torvalds	.endm
271da177e4SLinus Torvalds#else
28c2648527SThiemo Seufer	.macro	preempt_stop
29c2648527SThiemo Seufer	local_irq_disable
301da177e4SLinus Torvalds	.endm
311da177e4SLinus Torvalds#define resume_kernel	restore_all
321da177e4SLinus Torvalds#endif
331da177e4SLinus Torvalds
341da177e4SLinus Torvalds	.text
351da177e4SLinus Torvalds	.align	5
361da177e4SLinus TorvaldsFEXPORT(ret_from_exception)
371da177e4SLinus Torvalds	preempt_stop
381da177e4SLinus TorvaldsFEXPORT(ret_from_irq)
391da177e4SLinus Torvalds	LONG_L	t0, PT_STATUS(sp)		# returning to kernel mode?
401da177e4SLinus Torvalds	andi	t0, t0, KU_USER
411da177e4SLinus Torvalds	beqz	t0, resume_kernel
421da177e4SLinus Torvalds
43c2648527SThiemo Seuferresume_userspace:
44c2648527SThiemo Seufer	local_irq_disable		# make sure we dont miss an
451da177e4SLinus Torvalds					# interrupt setting need_resched
461da177e4SLinus Torvalds					# between sampling and return
471da177e4SLinus Torvalds	LONG_L	a2, TI_FLAGS($28)	# current->work
48c2648527SThiemo Seufer	andi	t0, a2, _TIF_WORK_MASK	# (ignoring syscall_trace)
49c2648527SThiemo Seufer	bnez	t0, work_pending
501da177e4SLinus Torvalds	j	restore_all
511da177e4SLinus Torvalds
521da177e4SLinus Torvalds#ifdef CONFIG_PREEMPT
53c2648527SThiemo Seuferresume_kernel:
54a18815abSRalf Baechle	local_irq_disable
551da177e4SLinus Torvalds	lw	t0, TI_PRE_COUNT($28)
561da177e4SLinus Torvalds	bnez	t0, restore_all
571da177e4SLinus Torvaldsneed_resched:
581da177e4SLinus Torvalds	LONG_L	t0, TI_FLAGS($28)
591da177e4SLinus Torvalds	andi	t1, t0, _TIF_NEED_RESCHED
601da177e4SLinus Torvalds	beqz	t1, restore_all
611da177e4SLinus Torvalds	LONG_L	t0, PT_STATUS(sp)		# Interrupts off?
621da177e4SLinus Torvalds	andi	t0, 1
631da177e4SLinus Torvalds	beqz	t0, restore_all
64a18815abSRalf Baechle	jal	preempt_schedule_irq
65cdaed73aSRalf Baechle	b	need_resched
661da177e4SLinus Torvalds#endif
671da177e4SLinus Torvalds
681da177e4SLinus TorvaldsFEXPORT(ret_from_fork)
691da177e4SLinus Torvalds	jal	schedule_tail		# a0 = task_t *prev
701da177e4SLinus Torvalds
711da177e4SLinus TorvaldsFEXPORT(syscall_exit)
721da177e4SLinus Torvalds	local_irq_disable		# make sure need_resched and
731da177e4SLinus Torvalds					# signals dont change between
741da177e4SLinus Torvalds					# sampling and return
751da177e4SLinus Torvalds	LONG_L	a2, TI_FLAGS($28)	# current->work
761da177e4SLinus Torvalds	li	t0, _TIF_ALLWORK_MASK
771da177e4SLinus Torvalds	and	t0, a2, t0
781da177e4SLinus Torvalds	bnez	t0, syscall_exit_work
791da177e4SLinus Torvalds
801da177e4SLinus TorvaldsFEXPORT(restore_all)			# restore full frame
8141c594abSRalf Baechle#ifdef CONFIG_MIPS_MT_SMTC
8241c594abSRalf Baechle/* Detect and execute deferred IPI "interrupts" */
8341c594abSRalf Baechle	move	a0,sp
8441c594abSRalf Baechle	jal	deferred_smtc_ipi
8541c594abSRalf Baechle/* Re-arm any temporarily masked interrupts not explicitly "acked" */
8641c594abSRalf Baechle	mfc0	v0, CP0_TCSTATUS
8741c594abSRalf Baechle	ori	v1, v0, TCSTATUS_IXMT
8841c594abSRalf Baechle	mtc0	v1, CP0_TCSTATUS
8941c594abSRalf Baechle	andi	v0, TCSTATUS_IXMT
90*4277ff5eSRalf Baechle	_ehb
9141c594abSRalf Baechle	mfc0	t0, CP0_TCCONTEXT
9241c594abSRalf Baechle	DMT	9				# dmt t1
9341c594abSRalf Baechle	jal	mips_ihb
9441c594abSRalf Baechle	mfc0	t2, CP0_STATUS
9541c594abSRalf Baechle	andi	t3, t0, 0xff00
9641c594abSRalf Baechle	or	t2, t2, t3
9741c594abSRalf Baechle	mtc0	t2, CP0_STATUS
98*4277ff5eSRalf Baechle	_ehb
9941c594abSRalf Baechle	andi	t1, t1, VPECONTROL_TE
10041c594abSRalf Baechle	beqz	t1, 1f
10141c594abSRalf Baechle	EMT
10241c594abSRalf Baechle1:
10341c594abSRalf Baechle	mfc0	v1, CP0_TCSTATUS
104477654fcSRalf Baechle	/* We set IXMT above, XOR should clear it here */
10541c594abSRalf Baechle	xori	v1, v1, TCSTATUS_IXMT
10641c594abSRalf Baechle	or	v1, v0, v1
10741c594abSRalf Baechle	mtc0	v1, CP0_TCSTATUS
108*4277ff5eSRalf Baechle	_ehb
10941c594abSRalf Baechle	xor	t0, t0, t3
11041c594abSRalf Baechle	mtc0	t0, CP0_TCCONTEXT
11141c594abSRalf Baechle#endif /* CONFIG_MIPS_MT_SMTC */
1121da177e4SLinus Torvalds	.set	noat
1131da177e4SLinus Torvalds	RESTORE_TEMP
1141da177e4SLinus Torvalds	RESTORE_AT
1151da177e4SLinus Torvalds	RESTORE_STATIC
1161da177e4SLinus TorvaldsFEXPORT(restore_partial)		# restore partial frame
1171da177e4SLinus Torvalds	RESTORE_SOME
1181da177e4SLinus Torvalds	RESTORE_SP_AND_RET
1191da177e4SLinus Torvalds	.set	at
1201da177e4SLinus Torvalds
121c2648527SThiemo Seuferwork_pending:
122c2648527SThiemo Seufer	andi	t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
1231da177e4SLinus Torvalds	beqz	t0, work_notifysig
1241da177e4SLinus Torvaldswork_resched:
1251da177e4SLinus Torvalds	jal	schedule
1261da177e4SLinus Torvalds
127c2648527SThiemo Seufer	local_irq_disable		# make sure need_resched and
1281da177e4SLinus Torvalds					# signals dont change between
1291da177e4SLinus Torvalds					# sampling and return
1301da177e4SLinus Torvalds	LONG_L	a2, TI_FLAGS($28)
1311da177e4SLinus Torvalds	andi	t0, a2, _TIF_WORK_MASK	# is there any work to be done
1321da177e4SLinus Torvalds					# other than syscall tracing?
1331da177e4SLinus Torvalds	beqz	t0, restore_all
1341da177e4SLinus Torvalds	andi	t0, a2, _TIF_NEED_RESCHED
1351da177e4SLinus Torvalds	bnez	t0, work_resched
1361da177e4SLinus Torvalds
1371da177e4SLinus Torvaldswork_notifysig:				# deal with pending signals and
1381da177e4SLinus Torvalds					# notify-resume requests
1391da177e4SLinus Torvalds	move	a0, sp
1401da177e4SLinus Torvalds	li	a1, 0
1411da177e4SLinus Torvalds	jal	do_notify_resume	# a2 already loaded
1420bf0e3e2SRalf Baechle	j	resume_userspace
1431da177e4SLinus Torvalds
1441da177e4SLinus TorvaldsFEXPORT(syscall_exit_work_partial)
1451da177e4SLinus Torvalds	SAVE_STATIC
146c2648527SThiemo Seufersyscall_exit_work:
147c2648527SThiemo Seufer	li	t0, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
148c2648527SThiemo Seufer	and	t0, a2			# a2 is preloaded with TI_FLAGS
149c2648527SThiemo Seufer	beqz	t0, work_pending	# trace bit set?
1501da177e4SLinus Torvalds	local_irq_enable		# could let do_syscall_trace()
1511da177e4SLinus Torvalds					# call schedule() instead
1521da177e4SLinus Torvalds	move	a0, sp
1531da177e4SLinus Torvalds	li	a1, 1
1541da177e4SLinus Torvalds	jal	do_syscall_trace
1551da177e4SLinus Torvalds	b	resume_userspace
156bce1a286SRalf Baechle
157bce1a286SRalf Baechle#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT)
158bce1a286SRalf Baechle
159bce1a286SRalf Baechle/*
160bce1a286SRalf Baechle * MIPS32R2 Instruction Hazard Barrier - must be called
161bce1a286SRalf Baechle *
162bce1a286SRalf Baechle * For C code use the inline version named instruction_hazard().
163bce1a286SRalf Baechle */
164bce1a286SRalf BaechleLEAF(mips_ihb)
165bce1a286SRalf Baechle	.set	mips32r2
166bce1a286SRalf Baechle	jr.hb	ra
167bce1a286SRalf Baechle	nop
168bce1a286SRalf Baechle	END(mips_ihb)
169bce1a286SRalf Baechle
170bce1a286SRalf Baechle#endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */
171