1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1992 Linus Torvalds 7 * Copyright (C) 1994 - 2001, 2003 Ralf Baechle 8 */ 9 #include <linux/clockchips.h> 10 #include <linux/init.h> 11 #include <linux/interrupt.h> 12 #include <linux/kernel.h> 13 #include <linux/spinlock.h> 14 15 #include <asm/irq_cpu.h> 16 #include <asm/i8259.h> 17 #include <asm/io.h> 18 #include <asm/jazz.h> 19 #include <asm/pgtable.h> 20 21 static DEFINE_SPINLOCK(r4030_lock); 22 23 static void enable_r4030_irq(unsigned int irq) 24 { 25 unsigned int mask = 1 << (irq - JAZZ_IRQ_START); 26 unsigned long flags; 27 28 spin_lock_irqsave(&r4030_lock, flags); 29 mask |= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE); 30 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask); 31 spin_unlock_irqrestore(&r4030_lock, flags); 32 } 33 34 void disable_r4030_irq(unsigned int irq) 35 { 36 unsigned int mask = ~(1 << (irq - JAZZ_IRQ_START)); 37 unsigned long flags; 38 39 spin_lock_irqsave(&r4030_lock, flags); 40 mask &= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE); 41 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask); 42 spin_unlock_irqrestore(&r4030_lock, flags); 43 } 44 45 static struct irq_chip r4030_irq_type = { 46 .name = "R4030", 47 .ack = disable_r4030_irq, 48 .mask = disable_r4030_irq, 49 .mask_ack = disable_r4030_irq, 50 .unmask = enable_r4030_irq, 51 }; 52 53 void __init init_r4030_ints(void) 54 { 55 int i; 56 57 for (i = JAZZ_IRQ_START; i <= JAZZ_IRQ_END; i++) 58 set_irq_chip_and_handler(i, &r4030_irq_type, handle_level_irq); 59 60 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); 61 r4030_read_reg16(JAZZ_IO_IRQ_SOURCE); /* clear pending IRQs */ 62 r4030_read_reg32(JAZZ_R4030_INVAL_ADDR); /* clear error bits */ 63 } 64 65 /* 66 * On systems with i8259-style interrupt controllers we assume for 67 * driver compatibility reasons interrupts 0 - 15 to be the i8259 68 * interrupts even if the hardware uses a different interrupt numbering. 69 */ 70 void __init arch_init_irq(void) 71 { 72 /* 73 * this is a hack to get back the still needed wired mapping 74 * killed by init_mm() 75 */ 76 77 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */ 78 add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K); 79 /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */ 80 add_wired_entry(0x02400017, 0x02440017, 0xe2000000, PM_16M); 81 /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */ 82 add_wired_entry(0x01800017, 0x01000017, 0xe4000000, PM_4M); 83 84 init_i8259_irqs(); /* Integrated i8259 */ 85 mips_cpu_irq_init(); 86 init_r4030_ints(); 87 88 change_c0_status(ST0_IM, IE_IRQ2 | IE_IRQ1); 89 } 90 91 asmlinkage void plat_irq_dispatch(void) 92 { 93 unsigned int pending = read_c0_cause() & read_c0_status(); 94 unsigned int irq; 95 96 if (pending & IE_IRQ4) { 97 r4030_read_reg32(JAZZ_TIMER_REGISTER); 98 do_IRQ(JAZZ_TIMER_IRQ); 99 } else if (pending & IE_IRQ2) 100 do_IRQ(r4030_read_reg32(JAZZ_EISA_IRQ_ACK)); 101 else if (pending & IE_IRQ1) { 102 irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2; 103 if (likely(irq > 0)) 104 do_IRQ(irq + JAZZ_IRQ_START - 1); 105 else 106 panic("Unimplemented loc_no_irq handler"); 107 } 108 } 109 110 static void r4030_set_mode(enum clock_event_mode mode, 111 struct clock_event_device *evt) 112 { 113 /* Nothing to do ... */ 114 } 115 116 struct clock_event_device r4030_clockevent = { 117 .name = "r4030", 118 .features = CLOCK_EVT_FEAT_PERIODIC, 119 .rating = 100, 120 .irq = JAZZ_TIMER_IRQ, 121 .cpumask = CPU_MASK_CPU0, 122 .set_mode = r4030_set_mode, 123 }; 124 125 static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id) 126 { 127 r4030_clockevent.event_handler(&r4030_clockevent); 128 129 return IRQ_HANDLED; 130 } 131 132 static struct irqaction r4030_timer_irqaction = { 133 .handler = r4030_timer_interrupt, 134 .flags = IRQF_DISABLED, 135 .mask = CPU_MASK_CPU0, 136 .name = "timer", 137 }; 138 139 void __init plat_timer_setup(struct irqaction *ignored) 140 { 141 struct irqaction *irq = &r4030_timer_irqaction; 142 143 BUG_ON(HZ != 100); 144 145 /* 146 * Set clock to 100Hz. 147 * 148 * The R4030 timer receives an input clock of 1kHz which is divieded by 149 * a programmable 4-bit divider. This makes it fairly inflexible. 150 */ 151 r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9); 152 setup_irq(JAZZ_TIMER_IRQ, irq); 153 154 clockevents_register_device(&r4030_clockevent); 155 } 156