1*c135fc87SVincenzo Frascino /* SPDX-License-Identifier: GPL-2.0-only */ 2*c135fc87SVincenzo Frascino /* 3*c135fc87SVincenzo Frascino * Copyright (C) 2020 ARM Ltd. 4*c135fc87SVincenzo Frascino */ 5*c135fc87SVincenzo Frascino #ifndef __ASM_VDSO_PROCESSOR_H 6*c135fc87SVincenzo Frascino #define __ASM_VDSO_PROCESSOR_H 7*c135fc87SVincenzo Frascino 8*c135fc87SVincenzo Frascino #ifndef __ASSEMBLY__ 9*c135fc87SVincenzo Frascino 10*c135fc87SVincenzo Frascino #ifdef CONFIG_CPU_LOONGSON64 11*c135fc87SVincenzo Frascino /* 12*c135fc87SVincenzo Frascino * Loongson-3's SFB (Store-Fill-Buffer) may buffer writes indefinitely when a 13*c135fc87SVincenzo Frascino * tight read loop is executed, because reads take priority over writes & the 14*c135fc87SVincenzo Frascino * hardware (incorrectly) doesn't ensure that writes will eventually occur. 15*c135fc87SVincenzo Frascino * 16*c135fc87SVincenzo Frascino * Since spin loops of any kind should have a cpu_relax() in them, force an SFB 17*c135fc87SVincenzo Frascino * flush from cpu_relax() such that any pending writes will become visible as 18*c135fc87SVincenzo Frascino * expected. 19*c135fc87SVincenzo Frascino */ 20*c135fc87SVincenzo Frascino #define cpu_relax() smp_mb() 21*c135fc87SVincenzo Frascino #else 22*c135fc87SVincenzo Frascino #define cpu_relax() barrier() 23*c135fc87SVincenzo Frascino #endif 24*c135fc87SVincenzo Frascino 25*c135fc87SVincenzo Frascino #endif /* __ASSEMBLY__ */ 26*c135fc87SVincenzo Frascino 27*c135fc87SVincenzo Frascino #endif /* __ASM_VDSO_PROCESSOR_H */ 28