xref: /linux/arch/mips/include/asm/uasm.h (revision c4ee0af3fa0dc65f690fc908f02b8355f9576ea0)
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 2004, 2005, 2006, 2008	 Thiemo Seufer
7  * Copyright (C) 2005  Maciej W. Rozycki
8  * Copyright (C) 2006  Ralf Baechle (ralf@linux-mips.org)
9  * Copyright (C) 2012, 2013  MIPS Technologies, Inc.  All rights reserved.
10  */
11 
12 #include <linux/types.h>
13 
14 #ifdef CONFIG_EXPORT_UASM
15 #include <linux/export.h>
16 #define UASM_EXPORT_SYMBOL(sym) EXPORT_SYMBOL(sym)
17 #else
18 #define UASM_EXPORT_SYMBOL(sym)
19 #endif
20 
21 #define _UASM_ISA_CLASSIC	0
22 #define _UASM_ISA_MICROMIPS	1
23 
24 #ifndef UASM_ISA
25 #ifdef CONFIG_CPU_MICROMIPS
26 #define UASM_ISA	_UASM_ISA_MICROMIPS
27 #else
28 #define UASM_ISA	_UASM_ISA_CLASSIC
29 #endif
30 #endif
31 
32 #if (UASM_ISA == _UASM_ISA_CLASSIC)
33 #ifdef CONFIG_CPU_MICROMIPS
34 #define ISAOPC(op)	CL_uasm_i##op
35 #define ISAFUNC(x)	CL_##x
36 #else
37 #define ISAOPC(op)	uasm_i##op
38 #define ISAFUNC(x)	x
39 #endif
40 #elif (UASM_ISA == _UASM_ISA_MICROMIPS)
41 #ifdef CONFIG_CPU_MICROMIPS
42 #define ISAOPC(op)	uasm_i##op
43 #define ISAFUNC(x)	x
44 #else
45 #define ISAOPC(op)	MM_uasm_i##op
46 #define ISAFUNC(x)	MM_##x
47 #endif
48 #else
49 #error Unsupported micro-assembler ISA!!!
50 #endif
51 
52 #define Ip_u1u2u3(op)							\
53 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
54 
55 #define Ip_u2u1u3(op)							\
56 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
57 
58 #define Ip_u3u1u2(op)							\
59 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
60 
61 #define Ip_u1u2s3(op)							\
62 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
63 
64 #define Ip_u2s3u1(op)							\
65 void ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c)
66 
67 #define Ip_u2u1s3(op)							\
68 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
69 
70 #define Ip_u2u1msbu3(op)						\
71 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c, \
72 	   unsigned int d)
73 
74 #define Ip_u1u2(op)							\
75 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)
76 
77 #define Ip_u1s2(op)							\
78 void ISAOPC(op)(u32 **buf, unsigned int a, signed int b)
79 
80 #define Ip_u1(op) void ISAOPC(op)(u32 **buf, unsigned int a)
81 
82 #define Ip_0(op) void ISAOPC(op)(u32 **buf)
83 
84 Ip_u2u1s3(_addiu);
85 Ip_u3u1u2(_addu);
86 Ip_u3u1u2(_and);
87 Ip_u2u1u3(_andi);
88 Ip_u1u2s3(_bbit0);
89 Ip_u1u2s3(_bbit1);
90 Ip_u1u2s3(_beq);
91 Ip_u1u2s3(_beql);
92 Ip_u1s2(_bgez);
93 Ip_u1s2(_bgezl);
94 Ip_u1s2(_bltz);
95 Ip_u1s2(_bltzl);
96 Ip_u1u2s3(_bne);
97 Ip_u2s3u1(_cache);
98 Ip_u2u1s3(_daddiu);
99 Ip_u3u1u2(_daddu);
100 Ip_u2u1msbu3(_dins);
101 Ip_u2u1msbu3(_dinsm);
102 Ip_u1u2u3(_dmfc0);
103 Ip_u1u2u3(_dmtc0);
104 Ip_u2u1u3(_drotr);
105 Ip_u2u1u3(_drotr32);
106 Ip_u2u1u3(_dsll);
107 Ip_u2u1u3(_dsll32);
108 Ip_u2u1u3(_dsra);
109 Ip_u2u1u3(_dsrl);
110 Ip_u2u1u3(_dsrl32);
111 Ip_u3u1u2(_dsubu);
112 Ip_0(_eret);
113 Ip_u2u1msbu3(_ext);
114 Ip_u2u1msbu3(_ins);
115 Ip_u1(_j);
116 Ip_u1(_jal);
117 Ip_u1(_jr);
118 Ip_u2s3u1(_ld);
119 Ip_u3u1u2(_ldx);
120 Ip_u2s3u1(_ll);
121 Ip_u2s3u1(_lld);
122 Ip_u1s2(_lui);
123 Ip_u2s3u1(_lw);
124 Ip_u3u1u2(_lwx);
125 Ip_u1u2u3(_mfc0);
126 Ip_u1u2u3(_mtc0);
127 Ip_u3u1u2(_or);
128 Ip_u2u1u3(_ori);
129 Ip_u2s3u1(_pref);
130 Ip_0(_rfe);
131 Ip_u2u1u3(_rotr);
132 Ip_u2s3u1(_sc);
133 Ip_u2s3u1(_scd);
134 Ip_u2s3u1(_sd);
135 Ip_u2u1u3(_sll);
136 Ip_u2u1u3(_sra);
137 Ip_u2u1u3(_srl);
138 Ip_u3u1u2(_subu);
139 Ip_u2s3u1(_sw);
140 Ip_u1(_syscall);
141 Ip_0(_tlbp);
142 Ip_0(_tlbr);
143 Ip_0(_tlbwi);
144 Ip_0(_tlbwr);
145 Ip_u3u1u2(_xor);
146 Ip_u2u1u3(_xori);
147 
148 
149 /* Handle labels. */
150 struct uasm_label {
151 	u32 *addr;
152 	int lab;
153 };
154 
155 void ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr,
156 			int lid);
157 #ifdef CONFIG_64BIT
158 int ISAFUNC(uasm_in_compat_space_p)(long addr);
159 #endif
160 int ISAFUNC(uasm_rel_hi)(long val);
161 int ISAFUNC(uasm_rel_lo)(long val);
162 void ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr);
163 void ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr);
164 
165 #define UASM_L_LA(lb)							\
166 static inline void ISAFUNC(uasm_l##lb)(struct uasm_label **lab, u32 *addr) \
167 {									\
168 	ISAFUNC(uasm_build_label)(lab, addr, label##lb);		\
169 }
170 
171 /* convenience macros for instructions */
172 #ifdef CONFIG_64BIT
173 # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val)
174 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_daddu(buf, rs, rt, rd)
175 # define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off)
176 # define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off)
177 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd)
178 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd)
179 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd)
180 # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh)
181 # define UASM_i_SC(buf, rs, rt, off) uasm_i_scd(buf, rs, rt, off)
182 # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh)
183 # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh)
184 # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh)
185 # define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_dsrl_safe(buf, rs, rt, sh)
186 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd)
187 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sd(buf, rs, rt, off)
188 #else
189 # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_addiu(buf, rs, rt, val)
190 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_addu(buf, rs, rt, rd)
191 # define UASM_i_LL(buf, rs, rt, off) uasm_i_ll(buf, rs, rt, off)
192 # define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off)
193 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd)
194 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd)
195 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd)
196 # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh)
197 # define UASM_i_SC(buf, rs, rt, off) uasm_i_sc(buf, rs, rt, off)
198 # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh)
199 # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh)
200 # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
201 # define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
202 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd)
203 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sw(buf, rs, rt, off)
204 #endif
205 
206 #define uasm_i_b(buf, off) uasm_i_beq(buf, 0, 0, off)
207 #define uasm_i_beqz(buf, rs, off) uasm_i_beq(buf, rs, 0, off)
208 #define uasm_i_beqzl(buf, rs, off) uasm_i_beql(buf, rs, 0, off)
209 #define uasm_i_bnez(buf, rs, off) uasm_i_bne(buf, rs, 0, off)
210 #define uasm_i_bnezl(buf, rs, off) uasm_i_bnel(buf, rs, 0, off)
211 #define uasm_i_ehb(buf) uasm_i_sll(buf, 0, 0, 3)
212 #define uasm_i_move(buf, a, b) UASM_i_ADDU(buf, a, 0, b)
213 #define uasm_i_nop(buf) uasm_i_sll(buf, 0, 0, 0)
214 #define uasm_i_ssnop(buf) uasm_i_sll(buf, 0, 0, 1)
215 
216 static inline void uasm_i_drotr_safe(u32 **p, unsigned int a1,
217 				     unsigned int a2, unsigned int a3)
218 {
219 	if (a3 < 32)
220 		ISAOPC(_drotr)(p, a1, a2, a3);
221 	else
222 		ISAOPC(_drotr32)(p, a1, a2, a3 - 32);
223 }
224 
225 static inline void uasm_i_dsll_safe(u32 **p, unsigned int a1,
226 				    unsigned int a2, unsigned int a3)
227 {
228 	if (a3 < 32)
229 		ISAOPC(_dsll)(p, a1, a2, a3);
230 	else
231 		ISAOPC(_dsll32)(p, a1, a2, a3 - 32);
232 }
233 
234 static inline void uasm_i_dsrl_safe(u32 **p, unsigned int a1,
235 				    unsigned int a2, unsigned int a3)
236 {
237 	if (a3 < 32)
238 		ISAOPC(_dsrl)(p, a1, a2, a3);
239 	else
240 		ISAOPC(_dsrl32)(p, a1, a2, a3 - 32);
241 }
242 
243 /* Handle relocations. */
244 struct uasm_reloc {
245 	u32 *addr;
246 	unsigned int type;
247 	int lab;
248 };
249 
250 /* This is zero so we can use zeroed label arrays. */
251 #define UASM_LABEL_INVALID 0
252 
253 void uasm_r_mips_pc16(struct uasm_reloc **rel, u32 *addr, int lid);
254 void uasm_resolve_relocs(struct uasm_reloc *rel, struct uasm_label *lab);
255 void uasm_move_relocs(struct uasm_reloc *rel, u32 *first, u32 *end, long off);
256 void uasm_move_labels(struct uasm_label *lab, u32 *first, u32 *end, long off);
257 void uasm_copy_handler(struct uasm_reloc *rel, struct uasm_label *lab,
258 	u32 *first, u32 *end, u32 *target);
259 int uasm_insn_has_bdelay(struct uasm_reloc *rel, u32 *addr);
260 
261 /* Convenience functions for labeled branches. */
262 void uasm_il_b(u32 **p, struct uasm_reloc **r, int lid);
263 void uasm_il_bbit0(u32 **p, struct uasm_reloc **r, unsigned int reg,
264 		   unsigned int bit, int lid);
265 void uasm_il_bbit1(u32 **p, struct uasm_reloc **r, unsigned int reg,
266 		   unsigned int bit, int lid);
267 void uasm_il_beqz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
268 void uasm_il_beqzl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
269 void uasm_il_bgezl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
270 void uasm_il_bgez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
271 void uasm_il_bltz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
272 void uasm_il_bne(u32 **p, struct uasm_reloc **r, unsigned int reg1,
273 		 unsigned int reg2, int lid);
274 void uasm_il_bnez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
275