xref: /linux/arch/mips/include/asm/uasm.h (revision 14aecdd419217e041fb5dd2749d11f58503bdf62)
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 2004, 2005, 2006, 2008	 Thiemo Seufer
7  * Copyright (C) 2005  Maciej W. Rozycki
8  * Copyright (C) 2006  Ralf Baechle (ralf@linux-mips.org)
9  * Copyright (C) 2012, 2013  MIPS Technologies, Inc.  All rights reserved.
10  */
11 
12 #include <linux/types.h>
13 
14 #ifdef CONFIG_EXPORT_UASM
15 #include <linux/export.h>
16 #define __uasminit
17 #define __uasminitdata
18 #define UASM_EXPORT_SYMBOL(sym) EXPORT_SYMBOL(sym)
19 #else
20 #define __uasminit __cpuinit
21 #define __uasminitdata __cpuinitdata
22 #define UASM_EXPORT_SYMBOL(sym)
23 #endif
24 
25 #define _UASM_ISA_CLASSIC	0
26 #define _UASM_ISA_MICROMIPS	1
27 
28 #ifndef UASM_ISA
29 #define UASM_ISA	_UASM_ISA_CLASSIC
30 #endif
31 
32 #if (UASM_ISA == _UASM_ISA_CLASSIC)
33 #define ISAOPC(op)	uasm_i##op
34 #define ISAFUNC(x)	x
35 #elif (UASM_ISA == _UASM_ISA_MICROMIPS)
36 #define ISAOPC(op)	MM_uasm_i##op
37 #define ISAFUNC(x)	MM_##x
38 #else
39 #error Unsupported micro-assembler ISA!!!
40 #endif
41 
42 #define Ip_u1u2u3(op)							\
43 void __uasminit								\
44 ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
45 
46 #define Ip_u2u1u3(op)							\
47 void __uasminit								\
48 ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
49 
50 #define Ip_u3u1u2(op)							\
51 void __uasminit								\
52 ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
53 
54 #define Ip_u1u2s3(op)							\
55 void __uasminit								\
56 ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
57 
58 #define Ip_u2s3u1(op)							\
59 void __uasminit								\
60 ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c)
61 
62 #define Ip_u2u1s3(op)							\
63 void __uasminit								\
64 ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
65 
66 #define Ip_u2u1msbu3(op)						\
67 void __uasminit								\
68 ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c,	\
69 	   unsigned int d)
70 
71 #define Ip_u1u2(op)							\
72 void __uasminit ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)
73 
74 #define Ip_u1s2(op)							\
75 void __uasminit ISAOPC(op)(u32 **buf, unsigned int a, signed int b)
76 
77 #define Ip_u1(op) void __uasminit ISAOPC(op)(u32 **buf, unsigned int a)
78 
79 #define Ip_0(op) void __uasminit ISAOPC(op)(u32 **buf)
80 
81 Ip_u2u1s3(_addiu);
82 Ip_u3u1u2(_addu);
83 Ip_u3u1u2(_and);
84 Ip_u2u1u3(_andi);
85 Ip_u1u2s3(_bbit0);
86 Ip_u1u2s3(_bbit1);
87 Ip_u1u2s3(_beq);
88 Ip_u1u2s3(_beql);
89 Ip_u1s2(_bgez);
90 Ip_u1s2(_bgezl);
91 Ip_u1s2(_bltz);
92 Ip_u1s2(_bltzl);
93 Ip_u1u2s3(_bne);
94 Ip_u2s3u1(_cache);
95 Ip_u2u1s3(_daddiu);
96 Ip_u3u1u2(_daddu);
97 Ip_u2u1msbu3(_dins);
98 Ip_u2u1msbu3(_dinsm);
99 Ip_u1u2u3(_dmfc0);
100 Ip_u1u2u3(_dmtc0);
101 Ip_u2u1u3(_drotr);
102 Ip_u2u1u3(_drotr32);
103 Ip_u2u1u3(_dsll);
104 Ip_u2u1u3(_dsll32);
105 Ip_u2u1u3(_dsra);
106 Ip_u2u1u3(_dsrl);
107 Ip_u2u1u3(_dsrl32);
108 Ip_u3u1u2(_dsubu);
109 Ip_0(_eret);
110 Ip_u2u1msbu3(_ext);
111 Ip_u2u1msbu3(_ins);
112 Ip_u1(_j);
113 Ip_u1(_jal);
114 Ip_u1(_jr);
115 Ip_u2s3u1(_ld);
116 Ip_u3u1u2(_ldx);
117 Ip_u2s3u1(_ll);
118 Ip_u2s3u1(_lld);
119 Ip_u1s2(_lui);
120 Ip_u2s3u1(_lw);
121 Ip_u3u1u2(_lwx);
122 Ip_u1u2u3(_mfc0);
123 Ip_u1u2u3(_mtc0);
124 Ip_u3u1u2(_or);
125 Ip_u2u1u3(_ori);
126 Ip_u2s3u1(_pref);
127 Ip_0(_rfe);
128 Ip_u2u1u3(_rotr);
129 Ip_u2s3u1(_sc);
130 Ip_u2s3u1(_scd);
131 Ip_u2s3u1(_sd);
132 Ip_u2u1u3(_sll);
133 Ip_u2u1u3(_sra);
134 Ip_u2u1u3(_srl);
135 Ip_u3u1u2(_subu);
136 Ip_u2s3u1(_sw);
137 Ip_u1(_syscall);
138 Ip_0(_tlbp);
139 Ip_0(_tlbr);
140 Ip_0(_tlbwi);
141 Ip_0(_tlbwr);
142 Ip_u3u1u2(_xor);
143 Ip_u2u1u3(_xori);
144 
145 
146 /* Handle labels. */
147 struct uasm_label {
148 	u32 *addr;
149 	int lab;
150 };
151 
152 void __uasminit ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr,
153 			int lid);
154 #ifdef CONFIG_64BIT
155 int ISAFUNC(uasm_in_compat_space_p)(long addr);
156 #endif
157 int ISAFUNC(uasm_rel_hi)(long val);
158 int ISAFUNC(uasm_rel_lo)(long val);
159 void ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr);
160 void ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr);
161 
162 #define UASM_L_LA(lb)							\
163 static inline void __uasminit uasm_l##lb(struct uasm_label **lab, u32 *addr) \
164 {									\
165 	uasm_build_label(lab, addr, label##lb);				\
166 }
167 
168 /* convenience macros for instructions */
169 #ifdef CONFIG_64BIT
170 # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val)
171 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_daddu(buf, rs, rt, rd)
172 # define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off)
173 # define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off)
174 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd)
175 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd)
176 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd)
177 # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh)
178 # define UASM_i_SC(buf, rs, rt, off) uasm_i_scd(buf, rs, rt, off)
179 # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh)
180 # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh)
181 # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh)
182 # define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_dsrl_safe(buf, rs, rt, sh)
183 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd)
184 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sd(buf, rs, rt, off)
185 #else
186 # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_addiu(buf, rs, rt, val)
187 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_addu(buf, rs, rt, rd)
188 # define UASM_i_LL(buf, rs, rt, off) uasm_i_ll(buf, rs, rt, off)
189 # define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off)
190 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd)
191 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd)
192 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd)
193 # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh)
194 # define UASM_i_SC(buf, rs, rt, off) uasm_i_sc(buf, rs, rt, off)
195 # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh)
196 # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh)
197 # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
198 # define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
199 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd)
200 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sw(buf, rs, rt, off)
201 #endif
202 
203 #define uasm_i_b(buf, off) uasm_i_beq(buf, 0, 0, off)
204 #define uasm_i_beqz(buf, rs, off) uasm_i_beq(buf, rs, 0, off)
205 #define uasm_i_beqzl(buf, rs, off) uasm_i_beql(buf, rs, 0, off)
206 #define uasm_i_bnez(buf, rs, off) uasm_i_bne(buf, rs, 0, off)
207 #define uasm_i_bnezl(buf, rs, off) uasm_i_bnel(buf, rs, 0, off)
208 #define uasm_i_ehb(buf) uasm_i_sll(buf, 0, 0, 3)
209 #define uasm_i_move(buf, a, b) UASM_i_ADDU(buf, a, 0, b)
210 #define uasm_i_nop(buf) uasm_i_sll(buf, 0, 0, 0)
211 #define uasm_i_ssnop(buf) uasm_i_sll(buf, 0, 0, 1)
212 
213 static inline void uasm_i_drotr_safe(u32 **p, unsigned int a1,
214 				     unsigned int a2, unsigned int a3)
215 {
216 	if (a3 < 32)
217 		ISAOPC(_drotr)(p, a1, a2, a3);
218 	else
219 		ISAOPC(_drotr32)(p, a1, a2, a3 - 32);
220 }
221 
222 static inline void uasm_i_dsll_safe(u32 **p, unsigned int a1,
223 				    unsigned int a2, unsigned int a3)
224 {
225 	if (a3 < 32)
226 		ISAOPC(_dsll)(p, a1, a2, a3);
227 	else
228 		ISAOPC(_dsll32)(p, a1, a2, a3 - 32);
229 }
230 
231 static inline void uasm_i_dsrl_safe(u32 **p, unsigned int a1,
232 				    unsigned int a2, unsigned int a3)
233 {
234 	if (a3 < 32)
235 		ISAOPC(_dsrl)(p, a1, a2, a3);
236 	else
237 		ISAOPC(_dsrl32)(p, a1, a2, a3 - 32);
238 }
239 
240 /* Handle relocations. */
241 struct uasm_reloc {
242 	u32 *addr;
243 	unsigned int type;
244 	int lab;
245 };
246 
247 /* This is zero so we can use zeroed label arrays. */
248 #define UASM_LABEL_INVALID 0
249 
250 void uasm_r_mips_pc16(struct uasm_reloc **rel, u32 *addr, int lid);
251 void uasm_resolve_relocs(struct uasm_reloc *rel, struct uasm_label *lab);
252 void uasm_move_relocs(struct uasm_reloc *rel, u32 *first, u32 *end, long off);
253 void uasm_move_labels(struct uasm_label *lab, u32 *first, u32 *end, long off);
254 void uasm_copy_handler(struct uasm_reloc *rel, struct uasm_label *lab,
255 	u32 *first, u32 *end, u32 *target);
256 int uasm_insn_has_bdelay(struct uasm_reloc *rel, u32 *addr);
257 
258 /* Convenience functions for labeled branches. */
259 void uasm_il_b(u32 **p, struct uasm_reloc **r, int lid);
260 void uasm_il_bbit0(u32 **p, struct uasm_reloc **r, unsigned int reg,
261 		   unsigned int bit, int lid);
262 void uasm_il_bbit1(u32 **p, struct uasm_reloc **r, unsigned int reg,
263 		   unsigned int bit, int lid);
264 void uasm_il_beqz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
265 void uasm_il_beqzl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
266 void uasm_il_bgezl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
267 void uasm_il_bgez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
268 void uasm_il_bltz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
269 void uasm_il_bne(u32 **p, struct uasm_reloc **r, unsigned int reg1,
270 		 unsigned int reg2, int lid);
271 void uasm_il_bnez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
272