xref: /linux/arch/mips/include/asm/txx9/dmac.h (revision a36e9f5cfe9eb3a1dce8769c7058251c42705357)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * TXx9 SoC DMA Controller
4  */
5 
6 #ifndef __ASM_TXX9_DMAC_H
7 #define __ASM_TXX9_DMAC_H
8 
9 #include <linux/dmaengine.h>
10 
11 #define TXX9_DMA_MAX_NR_CHANNELS	4
12 
13 /**
14  * struct txx9dmac_platform_data - Controller configuration parameters
15  * @memcpy_chan: Channel used for DMA_MEMCPY
16  * @have_64bit_regs: DMAC have 64 bit registers
17  */
18 struct txx9dmac_platform_data {
19 	int	memcpy_chan;
20 	bool	have_64bit_regs;
21 };
22 
23 /**
24  * struct txx9dmac_chan_platform_data - Channel configuration parameters
25  * @dmac_dev: A platform device for DMAC
26  */
27 struct txx9dmac_chan_platform_data {
28 	struct platform_device *dmac_dev;
29 };
30 
31 /**
32  * struct txx9dmac_slave - Controller-specific information about a slave
33  * @tx_reg: physical address of data register used for
34  *	memory-to-peripheral transfers
35  * @rx_reg: physical address of data register used for
36  *	peripheral-to-memory transfers
37  * @reg_width: peripheral register width
38  */
39 struct txx9dmac_slave {
40 	u64		tx_reg;
41 	u64		rx_reg;
42 	unsigned int	reg_width;
43 };
44 
45 void txx9_dmac_init(int id, unsigned long baseaddr, int irq,
46 		    const struct txx9dmac_platform_data *pdata);
47 
48 #endif /* __ASM_TXX9_DMAC_H */
49