xref: /linux/arch/mips/include/asm/time.h (revision b889fcf63cb62e7fdb7816565e28f44dbe4a76a5)
1 /*
2  * Copyright (C) 2001, 2002, MontaVista Software Inc.
3  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
4  * Copyright (c) 2003  Maciej W. Rozycki
5  *
6  * include/asm-mips/time.h
7  *     header file for the new style time.c file and time services.
8  *
9  * This program is free software; you can redistribute  it and/or modify it
10  * under  the terms of  the GNU General  Public License as published by the
11  * Free Software Foundation;  either version 2 of the  License, or (at your
12  * option) any later version.
13  */
14 #ifndef _ASM_TIME_H
15 #define _ASM_TIME_H
16 
17 #include <linux/rtc.h>
18 #include <linux/spinlock.h>
19 #include <linux/clockchips.h>
20 #include <linux/clocksource.h>
21 
22 extern spinlock_t rtc_lock;
23 
24 /*
25  * RTC ops.  By default, they point to weak no-op RTC functions.
26  *	rtc_mips_set_time - reverse the above translation and set time to RTC.
27  *	rtc_mips_set_mmss - similar to rtc_set_time, but only min and sec need
28  *			to be set.  Used by RTC sync-up.
29  */
30 extern int rtc_mips_set_time(unsigned long);
31 extern int rtc_mips_set_mmss(unsigned long);
32 
33 /*
34  * board specific routines required by time_init().
35  */
36 extern void plat_time_init(void);
37 
38 /*
39  * mips_hpt_frequency - must be set if you intend to use an R4k-compatible
40  * counter as a timer interrupt source.
41  */
42 extern unsigned int mips_hpt_frequency;
43 
44 /*
45  * The performance counter IRQ on MIPS is a close relative to the timer IRQ
46  * so it lives here.
47  */
48 extern int (*perf_irq)(void);
49 
50 /*
51  * Initialize the calling CPU's compare interrupt as clockevent device
52  */
53 extern unsigned int __weak get_c0_compare_int(void);
54 extern int r4k_clockevent_init(void);
55 
56 static inline int mips_clockevent_init(void)
57 {
58 #ifdef CONFIG_MIPS_MT_SMTC
59 	extern int smtc_clockevent_init(void);
60 
61 	return smtc_clockevent_init();
62 #elif defined(CONFIG_CEVT_R4K)
63 	return r4k_clockevent_init();
64 #else
65 	return -ENXIO;
66 #endif
67 }
68 
69 /*
70  * Initialize the count register as a clocksource
71  */
72 #ifdef CONFIG_CSRC_R4K
73 extern int init_r4k_clocksource(void);
74 #endif
75 
76 static inline int init_mips_clocksource(void)
77 {
78 #ifdef CONFIG_CSRC_R4K
79 	return init_r4k_clocksource();
80 #else
81 	return 0;
82 #endif
83 }
84 
85 static inline void clockevent_set_clock(struct clock_event_device *cd,
86 					unsigned int clock)
87 {
88 	clockevents_calc_mult_shift(cd, clock, 4);
89 }
90 
91 #endif /* _ASM_TIME_H */
92