xref: /linux/arch/mips/include/asm/thread_info.h (revision 26fbb4c8c7c3ee9a4c3b4de555a8587b5a19154e)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* thread_info.h: MIPS low-level thread information
3  *
4  * Copyright (C) 2002  David Howells (dhowells@redhat.com)
5  * - Incorporating suggestions made by Linus Torvalds and Dave Miller
6  */
7 
8 #ifndef _ASM_THREAD_INFO_H
9 #define _ASM_THREAD_INFO_H
10 
11 #ifdef __KERNEL__
12 
13 
14 #ifndef __ASSEMBLY__
15 
16 #include <asm/processor.h>
17 
18 /*
19  * low level task data that entry.S needs immediate access to
20  * - this struct should fit entirely inside of one cache line
21  * - this struct shares the supervisor stack pages
22  * - if the contents of this structure are changed, the assembly constants
23  *   must also be changed
24  */
25 struct thread_info {
26 	struct task_struct	*task;		/* main task structure */
27 	unsigned long		flags;		/* low level flags */
28 	unsigned long		tp_value;	/* thread pointer */
29 	__u32			cpu;		/* current CPU */
30 	int			preempt_count;	/* 0 => preemptable, <0 => BUG */
31 	mm_segment_t		addr_limit;	/*
32 						 * thread address space limit:
33 						 * 0x7fffffff for user-thead
34 						 * 0xffffffff for kernel-thread
35 						 */
36 	struct pt_regs		*regs;
37 	long			syscall;	/* syscall number */
38 };
39 
40 /*
41  * macros/functions for gaining access to the thread information structure
42  */
43 #define INIT_THREAD_INFO(tsk)			\
44 {						\
45 	.task		= &tsk,			\
46 	.flags		= _TIF_FIXADE,		\
47 	.cpu		= 0,			\
48 	.preempt_count	= INIT_PREEMPT_COUNT,	\
49 	.addr_limit	= KERNEL_DS,		\
50 }
51 
52 /*
53  * A pointer to the struct thread_info for the currently executing thread is
54  * held in register $28/$gp.
55  *
56  * We declare __current_thread_info as a global register variable rather than a
57  * local register variable within current_thread_info() because clang doesn't
58  * support explicit local register variables.
59  *
60  * When building the VDSO we take care not to declare the global register
61  * variable because this causes GCC to not preserve the value of $28/$gp in
62  * functions that change its value (which is common in the PIC VDSO when
63  * accessing the GOT). Since the VDSO shouldn't be accessing
64  * __current_thread_info anyway we declare it extern in order to cause a link
65  * failure if it's referenced.
66  */
67 #ifdef __VDSO__
68 extern struct thread_info *__current_thread_info;
69 #else
70 register struct thread_info *__current_thread_info __asm__("$28");
71 #endif
72 
73 static inline struct thread_info *current_thread_info(void)
74 {
75 	return __current_thread_info;
76 }
77 
78 #endif /* !__ASSEMBLY__ */
79 
80 /* thread information allocation */
81 #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT)
82 #define THREAD_SIZE_ORDER (1)
83 #endif
84 #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_64BIT)
85 #define THREAD_SIZE_ORDER (2)
86 #endif
87 #ifdef CONFIG_PAGE_SIZE_8KB
88 #define THREAD_SIZE_ORDER (1)
89 #endif
90 #ifdef CONFIG_PAGE_SIZE_16KB
91 #define THREAD_SIZE_ORDER (0)
92 #endif
93 #ifdef CONFIG_PAGE_SIZE_32KB
94 #define THREAD_SIZE_ORDER (0)
95 #endif
96 #ifdef CONFIG_PAGE_SIZE_64KB
97 #define THREAD_SIZE_ORDER (0)
98 #endif
99 
100 #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
101 #define THREAD_MASK (THREAD_SIZE - 1UL)
102 
103 #define STACK_WARN	(THREAD_SIZE / 8)
104 
105 /*
106  * thread information flags
107  * - these are process state flags that various assembly files may need to
108  *   access
109  * - pending work-to-be-done flags are in LSW
110  * - other flags in MSW
111  */
112 #define TIF_SIGPENDING		1	/* signal pending */
113 #define TIF_NEED_RESCHED	2	/* rescheduling necessary */
114 #define TIF_SYSCALL_AUDIT	3	/* syscall auditing active */
115 #define TIF_SECCOMP		4	/* secure computing */
116 #define TIF_NOTIFY_RESUME	5	/* callback before returning to user */
117 #define TIF_UPROBE		6	/* breakpointed or singlestepping */
118 #define TIF_NOTIFY_SIGNAL	7	/* signal notifications exist */
119 #define TIF_RESTORE_SIGMASK	9	/* restore signal mask in do_signal() */
120 #define TIF_USEDFPU		16	/* FPU was used by this task this quantum (SMP) */
121 #define TIF_MEMDIE		18	/* is terminating due to OOM killer */
122 #define TIF_NOHZ		19	/* in adaptive nohz mode */
123 #define TIF_FIXADE		20	/* Fix address errors in software */
124 #define TIF_LOGADE		21	/* Log address errors to syslog */
125 #define TIF_32BIT_REGS		22	/* 32-bit general purpose registers */
126 #define TIF_32BIT_ADDR		23	/* 32-bit address space (o32/n32) */
127 #define TIF_FPUBOUND		24	/* thread bound to FPU-full CPU set */
128 #define TIF_LOAD_WATCH		25	/* If set, load watch registers */
129 #define TIF_SYSCALL_TRACEPOINT	26	/* syscall tracepoint instrumentation */
130 #define TIF_32BIT_FPREGS	27	/* 32-bit floating point registers */
131 #define TIF_HYBRID_FPREGS	28	/* 64b FP registers, odd singles in bits 63:32 of even doubles */
132 #define TIF_USEDMSA		29	/* MSA has been used this quantum */
133 #define TIF_MSA_CTX_LIVE	30	/* MSA context must be preserved */
134 #define TIF_SYSCALL_TRACE	31	/* syscall trace active */
135 
136 #define _TIF_SYSCALL_TRACE	(1<<TIF_SYSCALL_TRACE)
137 #define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
138 #define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
139 #define _TIF_SYSCALL_AUDIT	(1<<TIF_SYSCALL_AUDIT)
140 #define _TIF_SECCOMP		(1<<TIF_SECCOMP)
141 #define _TIF_NOTIFY_RESUME	(1<<TIF_NOTIFY_RESUME)
142 #define _TIF_UPROBE		(1<<TIF_UPROBE)
143 #define _TIF_NOTIFY_SIGNAL	(1<<TIF_NOTIFY_SIGNAL)
144 #define _TIF_USEDFPU		(1<<TIF_USEDFPU)
145 #define _TIF_NOHZ		(1<<TIF_NOHZ)
146 #define _TIF_FIXADE		(1<<TIF_FIXADE)
147 #define _TIF_LOGADE		(1<<TIF_LOGADE)
148 #define _TIF_32BIT_REGS		(1<<TIF_32BIT_REGS)
149 #define _TIF_32BIT_ADDR		(1<<TIF_32BIT_ADDR)
150 #define _TIF_FPUBOUND		(1<<TIF_FPUBOUND)
151 #define _TIF_LOAD_WATCH		(1<<TIF_LOAD_WATCH)
152 #define _TIF_32BIT_FPREGS	(1<<TIF_32BIT_FPREGS)
153 #define _TIF_HYBRID_FPREGS	(1<<TIF_HYBRID_FPREGS)
154 #define _TIF_USEDMSA		(1<<TIF_USEDMSA)
155 #define _TIF_MSA_CTX_LIVE	(1<<TIF_MSA_CTX_LIVE)
156 #define _TIF_SYSCALL_TRACEPOINT	(1<<TIF_SYSCALL_TRACEPOINT)
157 
158 #define _TIF_WORK_SYSCALL_ENTRY	(_TIF_NOHZ | _TIF_SYSCALL_TRACE |	\
159 				 _TIF_SYSCALL_AUDIT | \
160 				 _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP)
161 
162 /* work to do in syscall_trace_leave() */
163 #define _TIF_WORK_SYSCALL_EXIT	(_TIF_NOHZ | _TIF_SYSCALL_TRACE |	\
164 				 _TIF_SYSCALL_AUDIT | _TIF_SYSCALL_TRACEPOINT)
165 
166 /* work to do on interrupt/exception return */
167 #define _TIF_WORK_MASK		\
168 	(_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME |	\
169 	 _TIF_UPROBE | _TIF_NOTIFY_SIGNAL)
170 /* work to do on any return to u-space */
171 #define _TIF_ALLWORK_MASK	(_TIF_NOHZ | _TIF_WORK_MASK |		\
172 				 _TIF_WORK_SYSCALL_EXIT |		\
173 				 _TIF_SYSCALL_TRACEPOINT)
174 
175 /*
176  * We stash processor id into a COP0 register to retrieve it fast
177  * at kernel exception entry.
178  */
179 #if   defined(CONFIG_MIPS_PGD_C0_CONTEXT)
180 #define SMP_CPUID_REG		20, 0	/* XCONTEXT */
181 #define ASM_SMP_CPUID_REG	$20
182 #define SMP_CPUID_PTRSHIFT	48
183 #else
184 #define SMP_CPUID_REG		4, 0	/* CONTEXT */
185 #define ASM_SMP_CPUID_REG	$4
186 #define SMP_CPUID_PTRSHIFT	23
187 #endif
188 
189 #ifdef CONFIG_64BIT
190 #define SMP_CPUID_REGSHIFT	(SMP_CPUID_PTRSHIFT + 3)
191 #else
192 #define SMP_CPUID_REGSHIFT	(SMP_CPUID_PTRSHIFT + 2)
193 #endif
194 
195 #define ASM_CPUID_MFC0		MFC0
196 #define UASM_i_CPUID_MFC0	UASM_i_MFC0
197 
198 #endif /* __KERNEL__ */
199 #endif /* _ASM_THREAD_INFO_H */
200