1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2003 Ralf Baechle 7 */ 8 #ifndef _ASM_PGTABLE_H 9 #define _ASM_PGTABLE_H 10 11 #include <linux/mm_types.h> 12 #include <linux/mmzone.h> 13 #ifdef CONFIG_32BIT 14 #include <asm/pgtable-32.h> 15 #endif 16 #ifdef CONFIG_64BIT 17 #include <asm/pgtable-64.h> 18 #endif 19 20 #include <asm/io.h> 21 #include <asm/pgtable-bits.h> 22 23 struct mm_struct; 24 struct vm_area_struct; 25 26 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT) 27 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | \ 28 _page_cachable_default) 29 #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_NO_EXEC | \ 30 _page_cachable_default) 31 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | \ 32 _page_cachable_default) 33 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ 34 _PAGE_GLOBAL | _page_cachable_default) 35 #define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ 36 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT) 37 #define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ 38 _page_cachable_default) 39 #define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \ 40 __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED) 41 42 /* 43 * If _PAGE_NO_EXEC is not defined, we can't do page protection for 44 * execute, and consider it to be the same as read. Also, write 45 * permissions imply read permissions. This is the closest we can get 46 * by reasonable means.. 47 */ 48 49 /* 50 * Dummy values to fill the table in mmap.c 51 * The real values will be generated at runtime 52 */ 53 #define __P000 __pgprot(0) 54 #define __P001 __pgprot(0) 55 #define __P010 __pgprot(0) 56 #define __P011 __pgprot(0) 57 #define __P100 __pgprot(0) 58 #define __P101 __pgprot(0) 59 #define __P110 __pgprot(0) 60 #define __P111 __pgprot(0) 61 62 #define __S000 __pgprot(0) 63 #define __S001 __pgprot(0) 64 #define __S010 __pgprot(0) 65 #define __S011 __pgprot(0) 66 #define __S100 __pgprot(0) 67 #define __S101 __pgprot(0) 68 #define __S110 __pgprot(0) 69 #define __S111 __pgprot(0) 70 71 extern unsigned long _page_cachable_default; 72 73 /* 74 * ZERO_PAGE is a global shared page that is always zero; used 75 * for zero-mapped memory areas etc.. 76 */ 77 78 extern unsigned long empty_zero_page; 79 extern unsigned long zero_page_mask; 80 81 #define ZERO_PAGE(vaddr) \ 82 (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask)))) 83 #define __HAVE_COLOR_ZERO_PAGE 84 85 extern void paging_init(void); 86 87 /* 88 * Conversion functions: convert a page and protection to a page entry, 89 * and a page entry and page directory to the page they refer to. 90 */ 91 #define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd)) 92 93 #define __pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT)) 94 #ifndef CONFIG_TRANSPARENT_HUGEPAGE 95 #define pmd_page(pmd) __pmd_page(pmd) 96 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 97 98 #define pmd_page_vaddr(pmd) pmd_val(pmd) 99 100 #define htw_stop() \ 101 do { \ 102 unsigned long flags; \ 103 \ 104 if (cpu_has_htw) { \ 105 local_irq_save(flags); \ 106 if(!raw_current_cpu_data.htw_seq++) { \ 107 write_c0_pwctl(read_c0_pwctl() & \ 108 ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \ 109 back_to_back_c0_hazard(); \ 110 } \ 111 local_irq_restore(flags); \ 112 } \ 113 } while(0) 114 115 #define htw_start() \ 116 do { \ 117 unsigned long flags; \ 118 \ 119 if (cpu_has_htw) { \ 120 local_irq_save(flags); \ 121 if (!--raw_current_cpu_data.htw_seq) { \ 122 write_c0_pwctl(read_c0_pwctl() | \ 123 (1 << MIPS_PWCTL_PWEN_SHIFT)); \ 124 back_to_back_c0_hazard(); \ 125 } \ 126 local_irq_restore(flags); \ 127 } \ 128 } while(0) 129 130 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 131 pte_t *ptep, pte_t pteval); 132 133 #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 134 135 #define pte_none(pte) (!(((pte).pte_high) & ~_PAGE_GLOBAL)) 136 #define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT) 137 #define pte_no_exec(pte) ((pte).pte_low & _PAGE_NO_EXEC) 138 139 static inline void set_pte(pte_t *ptep, pte_t pte) 140 { 141 ptep->pte_high = pte.pte_high; 142 smp_wmb(); 143 ptep->pte_low = pte.pte_low; 144 145 if (pte.pte_high & _PAGE_GLOBAL) { 146 pte_t *buddy = ptep_buddy(ptep); 147 /* 148 * Make sure the buddy is global too (if it's !none, 149 * it better already be global) 150 */ 151 if (pte_none(*buddy)) 152 buddy->pte_high |= _PAGE_GLOBAL; 153 } 154 } 155 156 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 157 { 158 pte_t null = __pte(0); 159 160 htw_stop(); 161 /* Preserve global status for the pair */ 162 if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL) 163 null.pte_high = _PAGE_GLOBAL; 164 165 set_pte_at(mm, addr, ptep, null); 166 htw_start(); 167 } 168 #else 169 170 #define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL)) 171 #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) 172 #define pte_no_exec(pte) (pte_val(pte) & _PAGE_NO_EXEC) 173 174 /* 175 * Certain architectures need to do special things when pte's 176 * within a page table are directly modified. Thus, the following 177 * hook is made available. 178 */ 179 static inline void set_pte(pte_t *ptep, pte_t pteval) 180 { 181 *ptep = pteval; 182 #if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX) 183 if (pte_val(pteval) & _PAGE_GLOBAL) { 184 pte_t *buddy = ptep_buddy(ptep); 185 /* 186 * Make sure the buddy is global too (if it's !none, 187 * it better already be global) 188 */ 189 #ifdef CONFIG_SMP 190 /* 191 * For SMP, multiple CPUs can race, so we need to do 192 * this atomically. 193 */ 194 unsigned long page_global = _PAGE_GLOBAL; 195 unsigned long tmp; 196 197 if (kernel_uses_llsc && R10000_LLSC_WAR) { 198 __asm__ __volatile__ ( 199 " .set arch=r4000 \n" 200 " .set push \n" 201 " .set noreorder \n" 202 "1:" __LL "%[tmp], %[buddy] \n" 203 " bnez %[tmp], 2f \n" 204 " or %[tmp], %[tmp], %[global] \n" 205 __SC "%[tmp], %[buddy] \n" 206 " beqzl %[tmp], 1b \n" 207 " nop \n" 208 "2: \n" 209 " .set pop \n" 210 " .set mips0 \n" 211 : [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp) 212 : [global] "r" (page_global)); 213 } else if (kernel_uses_llsc) { 214 __asm__ __volatile__ ( 215 " .set "MIPS_ISA_ARCH_LEVEL" \n" 216 " .set push \n" 217 " .set noreorder \n" 218 "1:" __LL "%[tmp], %[buddy] \n" 219 " bnez %[tmp], 2f \n" 220 " or %[tmp], %[tmp], %[global] \n" 221 __SC "%[tmp], %[buddy] \n" 222 " beqz %[tmp], 1b \n" 223 " nop \n" 224 "2: \n" 225 " .set pop \n" 226 " .set mips0 \n" 227 : [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp) 228 : [global] "r" (page_global)); 229 } 230 #else /* !CONFIG_SMP */ 231 if (pte_none(*buddy)) 232 pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL; 233 #endif /* CONFIG_SMP */ 234 } 235 #endif 236 } 237 238 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 239 { 240 htw_stop(); 241 #if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX) 242 /* Preserve global status for the pair */ 243 if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL) 244 set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL)); 245 else 246 #endif 247 set_pte_at(mm, addr, ptep, __pte(0)); 248 htw_start(); 249 } 250 #endif 251 252 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 253 pte_t *ptep, pte_t pteval) 254 { 255 extern void __update_cache(unsigned long address, pte_t pte); 256 257 if (!pte_present(pteval)) 258 goto cache_sync_done; 259 260 if (pte_present(*ptep) && (pte_pfn(*ptep) == pte_pfn(pteval))) 261 goto cache_sync_done; 262 263 __update_cache(addr, pteval); 264 cache_sync_done: 265 set_pte(ptep, pteval); 266 } 267 268 /* 269 * (pmds are folded into puds so this doesn't get actually called, 270 * but the define is needed for a generic inline function.) 271 */ 272 #define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0) 273 274 #ifndef __PAGETABLE_PMD_FOLDED 275 /* 276 * (puds are folded into pgds so this doesn't get actually called, 277 * but the define is needed for a generic inline function.) 278 */ 279 #define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0) 280 #endif 281 282 #define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1) 283 #define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1) 284 #define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1) 285 286 /* 287 * We used to declare this array with size but gcc 3.3 and older are not able 288 * to find that this expression is a constant, so the size is dropped. 289 */ 290 extern pgd_t swapper_pg_dir[]; 291 292 /* 293 * The following only work if pte_present() is true. 294 * Undefined behaviour if not.. 295 */ 296 #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 297 static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; } 298 static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; } 299 static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; } 300 301 static inline pte_t pte_wrprotect(pte_t pte) 302 { 303 pte.pte_low &= ~_PAGE_WRITE; 304 pte.pte_high &= ~_PAGE_SILENT_WRITE; 305 return pte; 306 } 307 308 static inline pte_t pte_mkclean(pte_t pte) 309 { 310 pte.pte_low &= ~_PAGE_MODIFIED; 311 pte.pte_high &= ~_PAGE_SILENT_WRITE; 312 return pte; 313 } 314 315 static inline pte_t pte_mkold(pte_t pte) 316 { 317 pte.pte_low &= ~_PAGE_ACCESSED; 318 pte.pte_high &= ~_PAGE_SILENT_READ; 319 return pte; 320 } 321 322 static inline pte_t pte_mkwrite(pte_t pte) 323 { 324 pte.pte_low |= _PAGE_WRITE; 325 if (pte.pte_low & _PAGE_MODIFIED) 326 pte.pte_high |= _PAGE_SILENT_WRITE; 327 return pte; 328 } 329 330 static inline pte_t pte_mkdirty(pte_t pte) 331 { 332 pte.pte_low |= _PAGE_MODIFIED; 333 if (pte.pte_low & _PAGE_WRITE) 334 pte.pte_high |= _PAGE_SILENT_WRITE; 335 return pte; 336 } 337 338 static inline pte_t pte_mkyoung(pte_t pte) 339 { 340 pte.pte_low |= _PAGE_ACCESSED; 341 if (pte.pte_low & _PAGE_READ) 342 pte.pte_high |= _PAGE_SILENT_READ; 343 return pte; 344 } 345 #else 346 static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } 347 static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; } 348 static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } 349 350 static inline pte_t pte_wrprotect(pte_t pte) 351 { 352 pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE); 353 return pte; 354 } 355 356 static inline pte_t pte_mkclean(pte_t pte) 357 { 358 pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE); 359 return pte; 360 } 361 362 static inline pte_t pte_mkold(pte_t pte) 363 { 364 pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ); 365 return pte; 366 } 367 368 static inline pte_t pte_mkwrite(pte_t pte) 369 { 370 pte_val(pte) |= _PAGE_WRITE; 371 if (pte_val(pte) & _PAGE_MODIFIED) 372 pte_val(pte) |= _PAGE_SILENT_WRITE; 373 return pte; 374 } 375 376 static inline pte_t pte_mkdirty(pte_t pte) 377 { 378 pte_val(pte) |= _PAGE_MODIFIED; 379 if (pte_val(pte) & _PAGE_WRITE) 380 pte_val(pte) |= _PAGE_SILENT_WRITE; 381 return pte; 382 } 383 384 static inline pte_t pte_mkyoung(pte_t pte) 385 { 386 pte_val(pte) |= _PAGE_ACCESSED; 387 #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) 388 if (!(pte_val(pte) & _PAGE_NO_READ)) 389 pte_val(pte) |= _PAGE_SILENT_READ; 390 else 391 #endif 392 if (pte_val(pte) & _PAGE_READ) 393 pte_val(pte) |= _PAGE_SILENT_READ; 394 return pte; 395 } 396 397 #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT 398 static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; } 399 400 static inline pte_t pte_mkhuge(pte_t pte) 401 { 402 pte_val(pte) |= _PAGE_HUGE; 403 return pte; 404 } 405 #endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */ 406 #endif 407 static inline int pte_special(pte_t pte) { return 0; } 408 static inline pte_t pte_mkspecial(pte_t pte) { return pte; } 409 410 /* 411 * Macro to make mark a page protection value as "uncacheable". Note 412 * that "protection" is really a misnomer here as the protection value 413 * contains the memory attribute bits, dirty bits, and various other 414 * bits as well. 415 */ 416 #define pgprot_noncached pgprot_noncached 417 418 static inline pgprot_t pgprot_noncached(pgprot_t _prot) 419 { 420 unsigned long prot = pgprot_val(_prot); 421 422 prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED; 423 424 return __pgprot(prot); 425 } 426 427 #define pgprot_writecombine pgprot_writecombine 428 429 static inline pgprot_t pgprot_writecombine(pgprot_t _prot) 430 { 431 unsigned long prot = pgprot_val(_prot); 432 433 /* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */ 434 prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine; 435 436 return __pgprot(prot); 437 } 438 439 /* 440 * Conversion functions: convert a page and protection to a page entry, 441 * and a page entry and page directory to the page they refer to. 442 */ 443 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 444 445 #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 446 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 447 { 448 pte.pte_low &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK); 449 pte.pte_high &= (_PFN_MASK | _CACHE_MASK); 450 pte.pte_low |= pgprot_val(newprot) & ~_PFNX_MASK; 451 pte.pte_high |= pgprot_val(newprot) & ~_PFN_MASK; 452 return pte; 453 } 454 #else 455 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 456 { 457 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)); 458 } 459 #endif 460 461 462 extern void __update_tlb(struct vm_area_struct *vma, unsigned long address, 463 pte_t pte); 464 465 static inline void update_mmu_cache(struct vm_area_struct *vma, 466 unsigned long address, pte_t *ptep) 467 { 468 pte_t pte = *ptep; 469 __update_tlb(vma, address, pte); 470 } 471 472 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 473 unsigned long address, pmd_t *pmdp) 474 { 475 pte_t pte = *(pte_t *)pmdp; 476 477 __update_tlb(vma, address, pte); 478 } 479 480 #define kern_addr_valid(addr) (1) 481 482 #ifdef CONFIG_PHYS_ADDR_T_64BIT 483 extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot); 484 485 static inline int io_remap_pfn_range(struct vm_area_struct *vma, 486 unsigned long vaddr, 487 unsigned long pfn, 488 unsigned long size, 489 pgprot_t prot) 490 { 491 phys_addr_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size); 492 return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot); 493 } 494 #define io_remap_pfn_range io_remap_pfn_range 495 #endif 496 497 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 498 499 extern int has_transparent_hugepage(void); 500 501 static inline int pmd_trans_huge(pmd_t pmd) 502 { 503 return !!(pmd_val(pmd) & _PAGE_HUGE); 504 } 505 506 static inline pmd_t pmd_mkhuge(pmd_t pmd) 507 { 508 pmd_val(pmd) |= _PAGE_HUGE; 509 510 return pmd; 511 } 512 513 extern void set_pmd_at(struct mm_struct *mm, unsigned long addr, 514 pmd_t *pmdp, pmd_t pmd); 515 516 #define __HAVE_ARCH_PMD_WRITE 517 static inline int pmd_write(pmd_t pmd) 518 { 519 return !!(pmd_val(pmd) & _PAGE_WRITE); 520 } 521 522 static inline pmd_t pmd_wrprotect(pmd_t pmd) 523 { 524 pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE); 525 return pmd; 526 } 527 528 static inline pmd_t pmd_mkwrite(pmd_t pmd) 529 { 530 pmd_val(pmd) |= _PAGE_WRITE; 531 if (pmd_val(pmd) & _PAGE_MODIFIED) 532 pmd_val(pmd) |= _PAGE_SILENT_WRITE; 533 534 return pmd; 535 } 536 537 static inline int pmd_dirty(pmd_t pmd) 538 { 539 return !!(pmd_val(pmd) & _PAGE_MODIFIED); 540 } 541 542 static inline pmd_t pmd_mkclean(pmd_t pmd) 543 { 544 pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE); 545 return pmd; 546 } 547 548 static inline pmd_t pmd_mkdirty(pmd_t pmd) 549 { 550 pmd_val(pmd) |= _PAGE_MODIFIED; 551 if (pmd_val(pmd) & _PAGE_WRITE) 552 pmd_val(pmd) |= _PAGE_SILENT_WRITE; 553 554 return pmd; 555 } 556 557 static inline int pmd_young(pmd_t pmd) 558 { 559 return !!(pmd_val(pmd) & _PAGE_ACCESSED); 560 } 561 562 static inline pmd_t pmd_mkold(pmd_t pmd) 563 { 564 pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ); 565 566 return pmd; 567 } 568 569 static inline pmd_t pmd_mkyoung(pmd_t pmd) 570 { 571 pmd_val(pmd) |= _PAGE_ACCESSED; 572 573 #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) 574 if (!(pmd_val(pmd) & _PAGE_NO_READ)) 575 pmd_val(pmd) |= _PAGE_SILENT_READ; 576 else 577 #endif 578 if (pmd_val(pmd) & _PAGE_READ) 579 pmd_val(pmd) |= _PAGE_SILENT_READ; 580 581 return pmd; 582 } 583 584 /* Extern to avoid header file madness */ 585 extern pmd_t mk_pmd(struct page *page, pgprot_t prot); 586 587 static inline unsigned long pmd_pfn(pmd_t pmd) 588 { 589 return pmd_val(pmd) >> _PFN_SHIFT; 590 } 591 592 static inline struct page *pmd_page(pmd_t pmd) 593 { 594 if (pmd_trans_huge(pmd)) 595 return pfn_to_page(pmd_pfn(pmd)); 596 597 return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT); 598 } 599 600 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 601 { 602 pmd_val(pmd) = (pmd_val(pmd) & _PAGE_CHG_MASK) | pgprot_val(newprot); 603 return pmd; 604 } 605 606 static inline pmd_t pmd_mknotpresent(pmd_t pmd) 607 { 608 pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY); 609 610 return pmd; 611 } 612 613 /* 614 * The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a 615 * different prototype. 616 */ 617 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 618 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, 619 unsigned long address, pmd_t *pmdp) 620 { 621 pmd_t old = *pmdp; 622 623 pmd_clear(pmdp); 624 625 return old; 626 } 627 628 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 629 630 #include <asm-generic/pgtable.h> 631 632 /* 633 * uncached accelerated TLB map for video memory access 634 */ 635 #ifdef CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED 636 #define __HAVE_PHYS_MEM_ACCESS_PROT 637 638 struct file; 639 pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 640 unsigned long size, pgprot_t vma_prot); 641 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, 642 unsigned long size, pgprot_t *vma_prot); 643 #endif 644 645 /* 646 * We provide our own get_unmapped area to cope with the virtual aliasing 647 * constraints placed on us by the cache architecture. 648 */ 649 #define HAVE_ARCH_UNMAPPED_AREA 650 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN 651 652 /* 653 * No page table caches to initialise 654 */ 655 #define pgtable_cache_init() do { } while (0) 656 657 #endif /* _ASM_PGTABLE_H */ 658