1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 */ 6 #ifndef _ASM_PCI_H 7 #define _ASM_PCI_H 8 9 #include <linux/mm.h> 10 11 #ifdef __KERNEL__ 12 13 /* 14 * This file essentially defines the interface between board 15 * specific PCI code and MIPS common PCI code. Should potentially put 16 * into include/asm/pci.h file. 17 */ 18 19 #include <linux/ioport.h> 20 #include <linux/list.h> 21 #include <linux/of.h> 22 23 #ifdef CONFIG_PCI_DRIVERS_LEGACY 24 25 /* 26 * Each pci channel is a top-level PCI bus seem by CPU. A machine with 27 * multiple PCI channels may have multiple PCI host controllers or a 28 * single controller supporting multiple channels. 29 */ 30 struct pci_controller { 31 struct list_head list; 32 struct pci_bus *bus; 33 struct device_node *of_node; 34 35 struct pci_ops *pci_ops; 36 struct resource *mem_resource; 37 unsigned long mem_offset; 38 struct resource *io_resource; 39 unsigned long io_offset; 40 unsigned long io_map_base; 41 42 #ifndef CONFIG_PCI_DOMAINS_GENERIC 43 unsigned int index; 44 /* For compatibility with current (as of July 2003) pciutils 45 and XFree86. Eventually will be removed. */ 46 unsigned int need_domain_info; 47 #endif 48 49 /* Optional access methods for reading/writing the bus number 50 of the PCI controller */ 51 int (*get_busno)(void); 52 void (*set_busno)(int busno); 53 }; 54 55 /* 56 * Used by boards to register their PCI busses before the actual scanning. 57 */ 58 extern void register_pci_controller(struct pci_controller *hose); 59 60 /* 61 * board supplied pci irq fixup routine 62 */ 63 extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); 64 65 /* Do platform specific device initialization at pci_enable_device() time */ 66 extern int pcibios_plat_dev_init(struct pci_dev *dev); 67 68 extern char * (*pcibios_plat_setup)(char *str); 69 70 #ifdef CONFIG_OF 71 /* this function parses memory ranges from a device node */ 72 extern void pci_load_of_ranges(struct pci_controller *hose, 73 struct device_node *node); 74 #else 75 static inline void pci_load_of_ranges(struct pci_controller *hose, 76 struct device_node *node) {} 77 #endif 78 79 #ifdef CONFIG_PCI_DOMAINS_GENERIC 80 static inline void set_pci_need_domain_info(struct pci_controller *hose, 81 int need_domain_info) 82 { 83 /* nothing to do */ 84 } 85 #elif defined(CONFIG_PCI_DOMAINS) 86 static inline void set_pci_need_domain_info(struct pci_controller *hose, 87 int need_domain_info) 88 { 89 hose->need_domain_info = need_domain_info; 90 } 91 #endif /* CONFIG_PCI_DOMAINS */ 92 93 #endif 94 95 /* Can be used to override the logic in pci_scan_bus for skipping 96 already-configured bus numbers - to be used for buggy BIOSes 97 or architectures with incomplete PCI setup by the loader */ 98 static inline unsigned int pcibios_assign_all_busses(void) 99 { 100 return 1; 101 } 102 103 extern unsigned long PCIBIOS_MIN_IO; 104 extern unsigned long PCIBIOS_MIN_MEM; 105 106 #define PCIBIOS_MIN_CARDBUS_IO 0x4000 107 108 #define HAVE_PCI_MMAP 109 #define ARCH_GENERIC_PCI_MMAP_RESOURCE 110 111 /* 112 * Dynamic DMA mapping stuff. 113 * MIPS has everything mapped statically. 114 */ 115 116 #include <linux/types.h> 117 #include <linux/slab.h> 118 #include <linux/scatterlist.h> 119 #include <linux/string.h> 120 #include <asm/io.h> 121 122 #ifdef CONFIG_PCI_DOMAINS_GENERIC 123 static inline int pci_proc_domain(struct pci_bus *bus) 124 { 125 return pci_domain_nr(bus); 126 } 127 #elif defined(CONFIG_PCI_DOMAINS) 128 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index 129 130 static inline int pci_proc_domain(struct pci_bus *bus) 131 { 132 struct pci_controller *hose = bus->sysdata; 133 return hose->need_domain_info; 134 } 135 #endif /* CONFIG_PCI_DOMAINS */ 136 137 #endif /* __KERNEL__ */ 138 139 /* Do platform specific device initialization at pci_enable_device() time */ 140 extern int pcibios_plat_dev_init(struct pci_dev *dev); 141 142 #endif /* _ASM_PCI_H */ 143