1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994 - 1999, 2000, 03 Ralf Baechle 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 */ 9 #ifndef _ASM_PAGE_H 10 #define _ASM_PAGE_H 11 12 #include <spaces.h> 13 #include <linux/const.h> 14 #include <linux/kernel.h> 15 #include <asm/mipsregs.h> 16 17 #include <vdso/page.h> 18 19 /* 20 * This is used for calculating the real page sizes 21 * for FTLB or VTLB + FTLB configurations. 22 */ 23 static inline unsigned int page_size_ftlb(unsigned int mmuextdef) 24 { 25 switch (mmuextdef) { 26 case MIPS_CONF4_MMUEXTDEF_FTLBSIZEEXT: 27 if (PAGE_SIZE == (1 << 30)) 28 return 5; 29 if (PAGE_SIZE == (1llu << 32)) 30 return 6; 31 if (PAGE_SIZE > (256 << 10)) 32 return 7; /* reserved */ 33 fallthrough; 34 case MIPS_CONF4_MMUEXTDEF_VTLBSIZEEXT: 35 return (PAGE_SHIFT - 10) / 2; 36 default: 37 panic("Invalid FTLB configuration with Conf4_mmuextdef=%d value\n", 38 mmuextdef >> 14); 39 } 40 } 41 42 #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT 43 #define HPAGE_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3) 44 #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) 45 #define HPAGE_MASK (~(HPAGE_SIZE - 1)) 46 #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 47 #else /* !CONFIG_MIPS_HUGE_TLB_SUPPORT */ 48 #define HPAGE_SHIFT ({BUILD_BUG(); 0; }) 49 #define HPAGE_SIZE ({BUILD_BUG(); 0; }) 50 #define HPAGE_MASK ({BUILD_BUG(); 0; }) 51 #define HUGETLB_PAGE_ORDER ({BUILD_BUG(); 0; }) 52 #endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */ 53 54 #include <linux/pfn.h> 55 56 extern void build_clear_page(void); 57 extern void build_copy_page(void); 58 59 /* 60 * It's normally defined only for FLATMEM config but it's 61 * used in our early mem init code for all memory models. 62 * So always define it. 63 */ 64 #ifdef CONFIG_MIPS_AUTO_PFN_OFFSET 65 extern unsigned long ARCH_PFN_OFFSET; 66 # define ARCH_PFN_OFFSET ARCH_PFN_OFFSET 67 #else 68 # define ARCH_PFN_OFFSET PFN_UP(PHYS_OFFSET) 69 #endif 70 71 extern void clear_page(void * page); 72 extern void copy_page(void * to, void * from); 73 74 extern unsigned long shm_align_mask; 75 76 static inline unsigned long pages_do_alias(unsigned long addr1, 77 unsigned long addr2) 78 { 79 return (addr1 ^ addr2) & shm_align_mask; 80 } 81 82 struct page; 83 84 static inline void clear_user_page(void *addr, unsigned long vaddr, 85 struct page *page) 86 { 87 extern void (*flush_data_cache_page)(unsigned long addr); 88 89 clear_page(addr); 90 if (pages_do_alias((unsigned long) addr, vaddr & PAGE_MASK)) 91 flush_data_cache_page((unsigned long)addr); 92 } 93 #define clear_user_page clear_user_page 94 95 struct vm_area_struct; 96 extern void copy_user_highpage(struct page *to, struct page *from, 97 unsigned long vaddr, struct vm_area_struct *vma); 98 99 #define __HAVE_ARCH_COPY_USER_HIGHPAGE 100 101 /* 102 * These are used to make use of C type-checking.. 103 */ 104 #ifdef CONFIG_PHYS_ADDR_T_64BIT 105 #ifdef CONFIG_CPU_MIPS32 106 typedef struct { unsigned long pte_low, pte_high; } pte_t; 107 #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) 108 #define __pte(x) ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) 109 #else 110 typedef struct { unsigned long long pte; } pte_t; 111 #define pte_val(x) ((x).pte) 112 #define __pte(x) ((pte_t) { (x) } ) 113 #endif 114 #else 115 typedef struct { unsigned long pte; } pte_t; 116 #define pte_val(x) ((x).pte) 117 #define __pte(x) ((pte_t) { (x) } ) 118 #endif 119 typedef struct page *pgtable_t; 120 121 /* 122 * Right now we don't support 4-level pagetables, so all pud-related 123 * definitions come from <asm-generic/pgtable-nopud.h>. 124 */ 125 126 /* 127 * Finall the top of the hierarchy, the pgd 128 */ 129 typedef struct { unsigned long pgd; } pgd_t; 130 #define pgd_val(x) ((x).pgd) 131 #define __pgd(x) ((pgd_t) { (x) } ) 132 133 /* 134 * Manipulate page protection bits 135 */ 136 typedef struct { unsigned long pgprot; } pgprot_t; 137 #define pgprot_val(x) ((x).pgprot) 138 #define __pgprot(x) ((pgprot_t) { (x) } ) 139 #define pte_pgprot(x) __pgprot(pte_val(x) & ~_PFN_MASK) 140 141 /* 142 * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd 143 * pair of pages we only have a single global bit per pair of pages. When 144 * writing to the TLB make sure we always have the bit set for both pages 145 * or none. This macro is used to access the `buddy' of the pte we're just 146 * working on. 147 */ 148 #define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t))) 149 150 /* 151 * __pa()/__va() should be used only during mem init. 152 */ 153 static inline unsigned long ___pa(unsigned long x) 154 { 155 if (IS_ENABLED(CONFIG_64BIT)) { 156 /* 157 * For MIPS64 the virtual address may either be in one of 158 * the compatibility segments ckseg0 or ckseg1, or it may 159 * be in xkphys. 160 */ 161 return x < CKSEG0 ? XPHYSADDR(x) : CPHYSADDR(x); 162 } 163 164 if (!IS_ENABLED(CONFIG_EVA)) { 165 /* 166 * We're using the standard MIPS32 legacy memory map, ie. 167 * the address x is going to be in kseg0 or kseg1. We can 168 * handle either case by masking out the desired bits using 169 * CPHYSADDR. 170 */ 171 return CPHYSADDR(x); 172 } 173 174 /* 175 * EVA is in use so the memory map could be anything, making it not 176 * safe to just mask out bits. 177 */ 178 return x - PAGE_OFFSET + PHYS_OFFSET; 179 } 180 #define __pa(x) ___pa((unsigned long)(x)) 181 #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET)) 182 #include <asm/io.h> 183 184 /* 185 * RELOC_HIDE was originally added by 6007b903dfe5f1d13e0c711ac2894bdd4a61b1ad 186 * (lmo) rsp. 8431fd094d625b94d364fe393076ccef88e6ce18 (kernel.org). The 187 * discussion can be found in 188 * https://lore.kernel.org/lkml/a2ebde260608230500o3407b108hc03debb9da6e62c@mail.gmail.com 189 * 190 * It is unclear if the misscompilations mentioned in 191 * https://lore.kernel.org/lkml/1281303490-390-1-git-send-email-namhyung@gmail.com 192 * also affect MIPS so we keep this one until GCC 3.x has been retired 193 * before we can apply https://patchwork.linux-mips.org/patch/1541/ 194 */ 195 #define __pa_symbol_nodebug(x) __pa(RELOC_HIDE((unsigned long)(x), 0)) 196 197 #ifdef CONFIG_DEBUG_VIRTUAL 198 extern phys_addr_t __phys_addr_symbol(unsigned long x); 199 #else 200 #define __phys_addr_symbol(x) __pa_symbol_nodebug(x) 201 #endif 202 203 #ifndef __pa_symbol 204 #define __pa_symbol(x) __phys_addr_symbol((unsigned long)(x)) 205 #endif 206 207 #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 208 209 #define virt_to_pfn(kaddr) PFN_DOWN(virt_to_phys((void *)(kaddr))) 210 #define virt_to_page(kaddr) pfn_to_page(virt_to_pfn(kaddr)) 211 212 extern bool __virt_addr_valid(const volatile void *kaddr); 213 #define virt_addr_valid(kaddr) \ 214 __virt_addr_valid((const volatile void *) (kaddr)) 215 216 #define VM_DATA_DEFAULT_FLAGS VM_DATA_FLAGS_TSK_EXEC 217 218 extern unsigned long __kaslr_offset; 219 static inline unsigned long kaslr_offset(void) 220 { 221 return __kaslr_offset; 222 } 223 224 #include <asm-generic/memory_model.h> 225 #include <asm-generic/getorder.h> 226 227 #endif /* _ASM_PAGE_H */ 228