1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (c) 2014 Imagination Technologies Ltd. 7 * Author: Markos Chandras <markos.chandras@imgtec.com> 8 */ 9 10 #ifndef __ASM_MIPS_R2_TO_R6_EMUL_H 11 #define __ASM_MIPS_R2_TO_R6_EMUL_H 12 13 struct mips_r2_emulator_stats { 14 u64 movs; 15 u64 hilo; 16 u64 muls; 17 u64 divs; 18 u64 dsps; 19 u64 bops; 20 u64 traps; 21 u64 fpus; 22 u64 loads; 23 u64 stores; 24 u64 llsc; 25 u64 dsemul; 26 }; 27 28 struct mips_r2br_emulator_stats { 29 u64 jrs; 30 u64 bltzl; 31 u64 bgezl; 32 u64 bltzll; 33 u64 bgezll; 34 u64 bltzall; 35 u64 bgezall; 36 u64 bltzal; 37 u64 bgezal; 38 u64 beql; 39 u64 bnel; 40 u64 blezl; 41 u64 bgtzl; 42 }; 43 44 #ifdef CONFIG_DEBUG_FS 45 46 #define MIPS_R2_STATS(M) \ 47 do { \ 48 u32 nir; \ 49 int err; \ 50 \ 51 preempt_disable(); \ 52 __this_cpu_inc(mipsr2emustats.M); \ 53 err = __get_user(nir, (u32 __user *)regs->cp0_epc); \ 54 if (!err) { \ 55 if (nir == BREAK_MATH(0)) \ 56 __this_cpu_inc(mipsr2bdemustats.M); \ 57 } \ 58 preempt_enable(); \ 59 } while (0) 60 61 #define MIPS_R2BR_STATS(M) \ 62 do { \ 63 preempt_disable(); \ 64 __this_cpu_inc(mipsr2bremustats.M); \ 65 preempt_enable(); \ 66 } while (0) 67 68 #else 69 70 #define MIPS_R2_STATS(M) do { } while (0) 71 #define MIPS_R2BR_STATS(M) do { } while (0) 72 73 #endif /* CONFIG_DEBUG_FS */ 74 75 struct r2_decoder_table { 76 u32 mask; 77 u32 code; 78 int (*func)(struct pt_regs *regs, u32 inst); 79 }; 80 81 82 extern void do_trap_or_bp(struct pt_regs *regs, unsigned int code, int si_code, 83 const char *str); 84 85 #ifndef CONFIG_MIPSR2_TO_R6_EMULATOR 86 static int mipsr2_emulation; 87 static inline int mipsr2_decoder(struct pt_regs *regs, u32 inst, 88 unsigned long *fcr31) 89 { 90 return 0; 91 }; 92 #else 93 /* MIPS R2 Emulator ON/OFF */ 94 extern int mipsr2_emulation; 95 extern int mipsr2_decoder(struct pt_regs *regs, u32 inst, 96 unsigned long *fcr31); 97 #endif /* CONFIG_MIPSR2_TO_R6_EMULATOR */ 98 99 #define NO_R6EMU (cpu_has_mips_r6 && !mipsr2_emulation) 100 101 #endif /* __ASM_MIPS_R2_TO_R6_EMUL_H */ 102