1*de3eb02aSGabor Juhos /* 2*de3eb02aSGabor Juhos * Ralink RT305x specific CPU feature overrides 3*de3eb02aSGabor Juhos * 4*de3eb02aSGabor Juhos * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> 5*de3eb02aSGabor Juhos * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> 6*de3eb02aSGabor Juhos * 7*de3eb02aSGabor Juhos * This file was derived from: include/asm-mips/cpu-features.h 8*de3eb02aSGabor Juhos * Copyright (C) 2003, 2004 Ralf Baechle 9*de3eb02aSGabor Juhos * Copyright (C) 2004 Maciej W. Rozycki 10*de3eb02aSGabor Juhos * 11*de3eb02aSGabor Juhos * This program is free software; you can redistribute it and/or modify it 12*de3eb02aSGabor Juhos * under the terms of the GNU General Public License version 2 as published 13*de3eb02aSGabor Juhos * by the Free Software Foundation. 14*de3eb02aSGabor Juhos * 15*de3eb02aSGabor Juhos */ 16*de3eb02aSGabor Juhos #ifndef _RT305X_CPU_FEATURE_OVERRIDES_H 17*de3eb02aSGabor Juhos #define _RT305X_CPU_FEATURE_OVERRIDES_H 18*de3eb02aSGabor Juhos 19*de3eb02aSGabor Juhos #define cpu_has_tlb 1 20*de3eb02aSGabor Juhos #define cpu_has_4kex 1 21*de3eb02aSGabor Juhos #define cpu_has_3k_cache 0 22*de3eb02aSGabor Juhos #define cpu_has_4k_cache 1 23*de3eb02aSGabor Juhos #define cpu_has_tx39_cache 0 24*de3eb02aSGabor Juhos #define cpu_has_sb1_cache 0 25*de3eb02aSGabor Juhos #define cpu_has_fpu 0 26*de3eb02aSGabor Juhos #define cpu_has_32fpr 0 27*de3eb02aSGabor Juhos #define cpu_has_counter 1 28*de3eb02aSGabor Juhos #define cpu_has_watch 1 29*de3eb02aSGabor Juhos #define cpu_has_divec 1 30*de3eb02aSGabor Juhos 31*de3eb02aSGabor Juhos #define cpu_has_prefetch 1 32*de3eb02aSGabor Juhos #define cpu_has_ejtag 1 33*de3eb02aSGabor Juhos #define cpu_has_llsc 1 34*de3eb02aSGabor Juhos 35*de3eb02aSGabor Juhos #define cpu_has_mips16 1 36*de3eb02aSGabor Juhos #define cpu_has_mdmx 0 37*de3eb02aSGabor Juhos #define cpu_has_mips3d 0 38*de3eb02aSGabor Juhos #define cpu_has_smartmips 0 39*de3eb02aSGabor Juhos 40*de3eb02aSGabor Juhos #define cpu_has_mips32r1 1 41*de3eb02aSGabor Juhos #define cpu_has_mips32r2 1 42*de3eb02aSGabor Juhos #define cpu_has_mips64r1 0 43*de3eb02aSGabor Juhos #define cpu_has_mips64r2 0 44*de3eb02aSGabor Juhos 45*de3eb02aSGabor Juhos #define cpu_has_dsp 1 46*de3eb02aSGabor Juhos #define cpu_has_mipsmt 0 47*de3eb02aSGabor Juhos 48*de3eb02aSGabor Juhos #define cpu_has_64bits 0 49*de3eb02aSGabor Juhos #define cpu_has_64bit_zero_reg 0 50*de3eb02aSGabor Juhos #define cpu_has_64bit_gp_regs 0 51*de3eb02aSGabor Juhos #define cpu_has_64bit_addresses 0 52*de3eb02aSGabor Juhos 53*de3eb02aSGabor Juhos #define cpu_dcache_line_size() 32 54*de3eb02aSGabor Juhos #define cpu_icache_line_size() 32 55*de3eb02aSGabor Juhos 56*de3eb02aSGabor Juhos #endif /* _RT305X_CPU_FEATURE_OVERRIDES_H */ 57