xref: /linux/arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h (revision d2912cb15bdda8ba4a5dd73396ad62641af2f520)
1*d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2de3eb02aSGabor Juhos /*
3de3eb02aSGabor Juhos  * Ralink RT305x specific CPU feature overrides
4de3eb02aSGabor Juhos  *
5de3eb02aSGabor Juhos  * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
6de3eb02aSGabor Juhos  * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7de3eb02aSGabor Juhos  *
8de3eb02aSGabor Juhos  * This file was derived from: include/asm-mips/cpu-features.h
9de3eb02aSGabor Juhos  *	Copyright (C) 2003, 2004 Ralf Baechle
10de3eb02aSGabor Juhos  *	Copyright (C) 2004 Maciej W. Rozycki
11de3eb02aSGabor Juhos  */
12de3eb02aSGabor Juhos #ifndef _RT305X_CPU_FEATURE_OVERRIDES_H
13de3eb02aSGabor Juhos #define _RT305X_CPU_FEATURE_OVERRIDES_H
14de3eb02aSGabor Juhos 
15de3eb02aSGabor Juhos #define cpu_has_tlb		1
16de3eb02aSGabor Juhos #define cpu_has_4kex		1
17de3eb02aSGabor Juhos #define cpu_has_3k_cache	0
18de3eb02aSGabor Juhos #define cpu_has_4k_cache	1
19de3eb02aSGabor Juhos #define cpu_has_tx39_cache	0
20de3eb02aSGabor Juhos #define cpu_has_sb1_cache	0
21de3eb02aSGabor Juhos #define cpu_has_fpu		0
22de3eb02aSGabor Juhos #define cpu_has_32fpr		0
23de3eb02aSGabor Juhos #define cpu_has_counter		1
24de3eb02aSGabor Juhos #define cpu_has_watch		1
25de3eb02aSGabor Juhos #define cpu_has_divec		1
26de3eb02aSGabor Juhos 
27de3eb02aSGabor Juhos #define cpu_has_prefetch	1
28de3eb02aSGabor Juhos #define cpu_has_ejtag		1
29de3eb02aSGabor Juhos #define cpu_has_llsc		1
30de3eb02aSGabor Juhos 
31de3eb02aSGabor Juhos #define cpu_has_mips16		1
32de3eb02aSGabor Juhos #define cpu_has_mdmx		0
33de3eb02aSGabor Juhos #define cpu_has_mips3d		0
34de3eb02aSGabor Juhos #define cpu_has_smartmips	0
35de3eb02aSGabor Juhos 
36de3eb02aSGabor Juhos #define cpu_has_mips32r1	1
37de3eb02aSGabor Juhos #define cpu_has_mips32r2	1
38de3eb02aSGabor Juhos #define cpu_has_mips64r1	0
39de3eb02aSGabor Juhos #define cpu_has_mips64r2	0
40de3eb02aSGabor Juhos 
41de3eb02aSGabor Juhos #define cpu_has_dsp		1
42de3eb02aSGabor Juhos #define cpu_has_mipsmt		0
43de3eb02aSGabor Juhos 
44de3eb02aSGabor Juhos #define cpu_has_64bits		0
45de3eb02aSGabor Juhos #define cpu_has_64bit_zero_reg	0
46de3eb02aSGabor Juhos #define cpu_has_64bit_gp_regs	0
47de3eb02aSGabor Juhos #define cpu_has_64bit_addresses	0
48de3eb02aSGabor Juhos 
49de3eb02aSGabor Juhos #define cpu_dcache_line_size()	32
50de3eb02aSGabor Juhos #define cpu_icache_line_size()	32
51de3eb02aSGabor Juhos 
52de3eb02aSGabor Juhos #endif /* _RT305X_CPU_FEATURE_OVERRIDES_H */
53