1*d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 21df7addbSJohn Crispin /* 31df7addbSJohn Crispin * Ralink MT7621 specific CPU feature overrides 41df7addbSJohn Crispin * 51df7addbSJohn Crispin * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> 61df7addbSJohn Crispin * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> 71df7addbSJohn Crispin * Copyright (C) 2015 Felix Fietkau <nbd@openwrt.org> 81df7addbSJohn Crispin * 91df7addbSJohn Crispin * This file was derived from: include/asm-mips/cpu-features.h 101df7addbSJohn Crispin * Copyright (C) 2003, 2004 Ralf Baechle 111df7addbSJohn Crispin * Copyright (C) 2004 Maciej W. Rozycki 121df7addbSJohn Crispin */ 131df7addbSJohn Crispin #ifndef _MT7621_CPU_FEATURE_OVERRIDES_H 141df7addbSJohn Crispin #define _MT7621_CPU_FEATURE_OVERRIDES_H 151df7addbSJohn Crispin 161df7addbSJohn Crispin #define cpu_has_tlb 1 171df7addbSJohn Crispin #define cpu_has_4kex 1 181df7addbSJohn Crispin #define cpu_has_3k_cache 0 191df7addbSJohn Crispin #define cpu_has_4k_cache 1 201df7addbSJohn Crispin #define cpu_has_tx39_cache 0 211df7addbSJohn Crispin #define cpu_has_sb1_cache 0 221df7addbSJohn Crispin #define cpu_has_fpu 0 231df7addbSJohn Crispin #define cpu_has_32fpr 0 241df7addbSJohn Crispin #define cpu_has_counter 1 251df7addbSJohn Crispin #define cpu_has_watch 1 261df7addbSJohn Crispin #define cpu_has_divec 1 271df7addbSJohn Crispin 281df7addbSJohn Crispin #define cpu_has_prefetch 1 291df7addbSJohn Crispin #define cpu_has_ejtag 1 301df7addbSJohn Crispin #define cpu_has_llsc 1 311df7addbSJohn Crispin 321df7addbSJohn Crispin #define cpu_has_mips16 1 331df7addbSJohn Crispin #define cpu_has_mdmx 0 341df7addbSJohn Crispin #define cpu_has_mips3d 0 351df7addbSJohn Crispin #define cpu_has_smartmips 0 361df7addbSJohn Crispin 371df7addbSJohn Crispin #define cpu_has_mips32r1 1 381df7addbSJohn Crispin #define cpu_has_mips32r2 1 391df7addbSJohn Crispin #define cpu_has_mips64r1 0 401df7addbSJohn Crispin #define cpu_has_mips64r2 0 411df7addbSJohn Crispin 421df7addbSJohn Crispin #define cpu_has_dsp 1 431df7addbSJohn Crispin #define cpu_has_dsp2 0 441df7addbSJohn Crispin #define cpu_has_mipsmt 1 451df7addbSJohn Crispin 461df7addbSJohn Crispin #define cpu_has_64bits 0 471df7addbSJohn Crispin #define cpu_has_64bit_zero_reg 0 481df7addbSJohn Crispin #define cpu_has_64bit_gp_regs 0 491df7addbSJohn Crispin #define cpu_has_64bit_addresses 0 501df7addbSJohn Crispin 511df7addbSJohn Crispin #define cpu_dcache_line_size() 32 521df7addbSJohn Crispin #define cpu_icache_line_size() 32 531df7addbSJohn Crispin 541df7addbSJohn Crispin #define cpu_has_dc_aliases 0 551df7addbSJohn Crispin #define cpu_has_vtag_icache 0 561df7addbSJohn Crispin 571df7addbSJohn Crispin #define cpu_has_rixi 0 581df7addbSJohn Crispin #define cpu_has_tlbinv 0 591df7addbSJohn Crispin #define cpu_has_userlocal 1 601df7addbSJohn Crispin 611df7addbSJohn Crispin #endif /* _MT7621_CPU_FEATURE_OVERRIDES_H */ 62