1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef BCM63XX_DEV_ENET_H_ 3 #define BCM63XX_DEV_ENET_H_ 4 5 #include <linux/if_ether.h> 6 #include <linux/init.h> 7 8 #include <bcm63xx_regs.h> 9 10 /* 11 * on board ethernet platform data 12 */ 13 struct bcm63xx_enet_platform_data { 14 char mac_addr[ETH_ALEN]; 15 16 int has_phy; 17 18 /* if has_phy, then set use_internal_phy */ 19 int use_internal_phy; 20 21 /* or fill phy info to use an external one */ 22 int phy_id; 23 int has_phy_interrupt; 24 int phy_interrupt; 25 26 /* if has_phy, use autonegotiated pause parameters or force 27 * them */ 28 int pause_auto; 29 int pause_rx; 30 int pause_tx; 31 32 /* if !has_phy, set desired forced speed/duplex */ 33 int force_speed_100; 34 int force_duplex_full; 35 36 /* if !has_phy, set callback to perform mii device 37 * init/remove */ 38 int (*mii_config)(struct net_device *dev, int probe, 39 int (*mii_read)(struct net_device *dev, 40 int phy_id, int reg), 41 void (*mii_write)(struct net_device *dev, 42 int phy_id, int reg, int val)); 43 44 /* DMA channel enable mask */ 45 u32 dma_chan_en_mask; 46 47 /* DMA channel interrupt mask */ 48 u32 dma_chan_int_mask; 49 50 /* DMA engine has internal SRAM */ 51 bool dma_has_sram; 52 53 /* DMA channel register width */ 54 unsigned int dma_chan_width; 55 56 /* DMA descriptor shift */ 57 unsigned int dma_desc_shift; 58 59 /* dma channel ids */ 60 int rx_chan; 61 int tx_chan; 62 }; 63 64 /* 65 * on board ethernet switch platform data 66 */ 67 #define ENETSW_MAX_PORT 8 68 #define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */ 69 #define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */ 70 71 #define ENETSW_RGMII_PORT0 4 72 73 struct bcm63xx_enetsw_port { 74 int used; 75 int phy_id; 76 77 int bypass_link; 78 int force_speed; 79 int force_duplex_full; 80 81 const char *name; 82 }; 83 84 struct bcm63xx_enetsw_platform_data { 85 char mac_addr[ETH_ALEN]; 86 int num_ports; 87 struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT]; 88 89 /* DMA channel enable mask */ 90 u32 dma_chan_en_mask; 91 92 /* DMA channel interrupt mask */ 93 u32 dma_chan_int_mask; 94 95 /* DMA channel register width */ 96 unsigned int dma_chan_width; 97 98 /* DMA engine has internal SRAM */ 99 bool dma_has_sram; 100 }; 101 102 int __init bcm63xx_enet_register(int unit, 103 const struct bcm63xx_enet_platform_data *pd); 104 105 int bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd); 106 107 enum bcm63xx_regs_enetdmac { 108 ENETDMAC_CHANCFG, 109 ENETDMAC_IR, 110 ENETDMAC_IRMASK, 111 ENETDMAC_MAXBURST, 112 ENETDMAC_BUFALLOC, 113 ENETDMAC_RSTART, 114 ENETDMAC_FC, 115 ENETDMAC_LEN, 116 }; 117 118 static inline unsigned long bcm63xx_enetdmacreg(enum bcm63xx_regs_enetdmac reg) 119 { 120 extern const unsigned long *bcm63xx_regs_enetdmac; 121 122 return bcm63xx_regs_enetdmac[reg]; 123 } 124 125 126 #endif /* ! BCM63XX_DEV_ENET_H_ */ 127