1 /* 2 * gpio-au1300.h -- GPIO control for Au1300 GPIC and compatibles. 3 * 4 * Copyright (c) 2009-2011 Manuel Lauss <manuel.lauss@googlemail.com> 5 */ 6 7 #ifndef _GPIO_AU1300_H_ 8 #define _GPIO_AU1300_H_ 9 10 #include <asm/addrspace.h> 11 #include <asm/io.h> 12 #include <asm/mach-au1x00/au1000.h> 13 14 /* with the current GPIC design, up to 128 GPIOs are possible. 15 * The only implementation so far is in the Au1300, which has 75 externally 16 * available GPIOs. 17 */ 18 #define AU1300_GPIO_BASE 0 19 #define AU1300_GPIO_NUM 75 20 #define AU1300_GPIO_MAX (AU1300_GPIO_BASE + AU1300_GPIO_NUM - 1) 21 22 #define AU1300_GPIC_ADDR \ 23 (void __iomem *)KSEG1ADDR(AU1300_GPIC_PHYS_ADDR) 24 25 static inline int au1300_gpio_get_value(unsigned int gpio) 26 { 27 void __iomem *roff = AU1300_GPIC_ADDR; 28 int bit; 29 30 gpio -= AU1300_GPIO_BASE; 31 roff += GPIC_GPIO_BANKOFF(gpio); 32 bit = GPIC_GPIO_TO_BIT(gpio); 33 return __raw_readl(roff + AU1300_GPIC_PINVAL) & bit; 34 } 35 36 static inline int au1300_gpio_direction_input(unsigned int gpio) 37 { 38 void __iomem *roff = AU1300_GPIC_ADDR; 39 unsigned long bit; 40 41 gpio -= AU1300_GPIO_BASE; 42 43 roff += GPIC_GPIO_BANKOFF(gpio); 44 bit = GPIC_GPIO_TO_BIT(gpio); 45 __raw_writel(bit, roff + AU1300_GPIC_DEVCLR); 46 wmb(); 47 48 return 0; 49 } 50 51 static inline int au1300_gpio_set_value(unsigned int gpio, int v) 52 { 53 void __iomem *roff = AU1300_GPIC_ADDR; 54 unsigned long bit; 55 56 gpio -= AU1300_GPIO_BASE; 57 58 roff += GPIC_GPIO_BANKOFF(gpio); 59 bit = GPIC_GPIO_TO_BIT(gpio); 60 __raw_writel(bit, roff + (v ? AU1300_GPIC_PINVAL 61 : AU1300_GPIC_PINVALCLR)); 62 wmb(); 63 64 return 0; 65 } 66 67 static inline int au1300_gpio_direction_output(unsigned int gpio, int v) 68 { 69 /* hw switches to output automatically */ 70 return au1300_gpio_set_value(gpio, v); 71 } 72 73 static inline int au1300_gpio_to_irq(unsigned int gpio) 74 { 75 return AU1300_FIRST_INT + (gpio - AU1300_GPIO_BASE); 76 } 77 78 static inline int au1300_irq_to_gpio(unsigned int irq) 79 { 80 return (irq - AU1300_FIRST_INT) + AU1300_GPIO_BASE; 81 } 82 83 static inline int au1300_gpio_is_valid(unsigned int gpio) 84 { 85 int ret; 86 87 switch (alchemy_get_cputype()) { 88 case ALCHEMY_CPU_AU1300: 89 ret = ((gpio >= AU1300_GPIO_BASE) && (gpio <= AU1300_GPIO_MAX)); 90 break; 91 default: 92 ret = 0; 93 } 94 return ret; 95 } 96 97 static inline int au1300_gpio_cansleep(unsigned int gpio) 98 { 99 return 0; 100 } 101 102 /* hardware remembers gpio 0-63 levels on powerup */ 103 static inline int au1300_gpio_getinitlvl(unsigned int gpio) 104 { 105 void __iomem *roff = AU1300_GPIC_ADDR; 106 unsigned long v; 107 108 if (unlikely(gpio > 63)) 109 return 0; 110 else if (gpio > 31) { 111 gpio -= 32; 112 roff += 4; 113 } 114 115 v = __raw_readl(roff + AU1300_GPIC_RSTVAL); 116 return (v >> gpio) & 1; 117 } 118 119 /**********************************************************************/ 120 121 /* Linux gpio framework integration. 122 * 123 * 4 use cases of Alchemy GPIOS: 124 *(1) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=y: 125 * Board must register gpiochips. 126 *(2) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=n: 127 * A gpiochip for the 75 GPIOs is registered. 128 * 129 *(3) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=y: 130 * the boards' gpio.h must provide the linux gpio wrapper functions, 131 * 132 *(4) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=n: 133 * inlinable gpio functions are provided which enable access to the 134 * Au1300 gpios only by using the numbers straight out of the data- 135 * sheets. 136 137 * Cases 1 and 3 are intended for boards which want to provide their own 138 * GPIO namespace and -operations (i.e. for example you have 8 GPIOs 139 * which are in part provided by spare Au1300 GPIO pins and in part by 140 * an external FPGA but you still want them to be accssible in linux 141 * as gpio0-7. The board can of course use the alchemy_gpioX_* functions 142 * as required). 143 */ 144 145 #ifndef CONFIG_GPIOLIB 146 147 #ifdef CONFIG_ALCHEMY_GPIOINT_AU1300 148 149 #ifndef CONFIG_ALCHEMY_GPIO_INDIRECT /* case (4) */ 150 151 static inline int gpio_direction_input(unsigned int gpio) 152 { 153 return au1300_gpio_direction_input(gpio); 154 } 155 156 static inline int gpio_direction_output(unsigned int gpio, int v) 157 { 158 return au1300_gpio_direction_output(gpio, v); 159 } 160 161 static inline int gpio_get_value(unsigned int gpio) 162 { 163 return au1300_gpio_get_value(gpio); 164 } 165 166 static inline void gpio_set_value(unsigned int gpio, int v) 167 { 168 au1300_gpio_set_value(gpio, v); 169 } 170 171 static inline int gpio_get_value_cansleep(unsigned gpio) 172 { 173 return gpio_get_value(gpio); 174 } 175 176 static inline void gpio_set_value_cansleep(unsigned gpio, int value) 177 { 178 gpio_set_value(gpio, value); 179 } 180 181 static inline int gpio_is_valid(unsigned int gpio) 182 { 183 return au1300_gpio_is_valid(gpio); 184 } 185 186 static inline int gpio_cansleep(unsigned int gpio) 187 { 188 return au1300_gpio_cansleep(gpio); 189 } 190 191 static inline int gpio_to_irq(unsigned int gpio) 192 { 193 return au1300_gpio_to_irq(gpio); 194 } 195 196 static inline int irq_to_gpio(unsigned int irq) 197 { 198 return au1300_irq_to_gpio(irq); 199 } 200 201 static inline int gpio_request(unsigned int gpio, const char *label) 202 { 203 return 0; 204 } 205 206 static inline void gpio_free(unsigned int gpio) 207 { 208 } 209 210 static inline int gpio_set_debounce(unsigned gpio, unsigned debounce) 211 { 212 return -ENOSYS; 213 } 214 215 static inline void gpio_unexport(unsigned gpio) 216 { 217 } 218 219 static inline int gpio_export(unsigned gpio, bool direction_may_change) 220 { 221 return -ENOSYS; 222 } 223 224 static inline int gpio_sysfs_set_active_low(unsigned gpio, int value) 225 { 226 return -ENOSYS; 227 } 228 229 static inline int gpio_export_link(struct device *dev, const char *name, 230 unsigned gpio) 231 { 232 return -ENOSYS; 233 } 234 235 #endif /* !CONFIG_ALCHEMY_GPIO_INDIRECT */ 236 237 #endif /* CONFIG_ALCHEMY_GPIOINT_AU1300 */ 238 239 #endif /* CONFIG GPIOLIB */ 240 241 #endif /* _GPIO_AU1300_H_ */ 242