xref: /linux/arch/mips/include/asm/mach-ath79/ath79.h (revision b43ab901d671e3e3cad425ea5e9a3c74e266dcdd)
1 /*
2  *  Atheros AR71XX/AR724X/AR913X common definitions
3  *
4  *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6  *
7  *  Parts of this file are based on Atheros' 2.6.15 BSP
8  *
9  *  This program is free software; you can redistribute it and/or modify it
10  *  under the terms of the GNU General Public License version 2 as published
11  *  by the Free Software Foundation.
12  */
13 
14 #ifndef __ASM_MACH_ATH79_H
15 #define __ASM_MACH_ATH79_H
16 
17 #include <linux/types.h>
18 #include <linux/io.h>
19 
20 enum ath79_soc_type {
21 	ATH79_SOC_UNKNOWN,
22 	ATH79_SOC_AR7130,
23 	ATH79_SOC_AR7141,
24 	ATH79_SOC_AR7161,
25 	ATH79_SOC_AR7240,
26 	ATH79_SOC_AR7241,
27 	ATH79_SOC_AR7242,
28 	ATH79_SOC_AR9130,
29 	ATH79_SOC_AR9132,
30 	ATH79_SOC_AR9330,
31 	ATH79_SOC_AR9331,
32 };
33 
34 extern enum ath79_soc_type ath79_soc;
35 extern unsigned int ath79_soc_rev;
36 
37 static inline int soc_is_ar71xx(void)
38 {
39 	return (ath79_soc == ATH79_SOC_AR7130 ||
40 		ath79_soc == ATH79_SOC_AR7141 ||
41 		ath79_soc == ATH79_SOC_AR7161);
42 }
43 
44 static inline int soc_is_ar724x(void)
45 {
46 	return (ath79_soc == ATH79_SOC_AR7240 ||
47 		ath79_soc == ATH79_SOC_AR7241 ||
48 		ath79_soc == ATH79_SOC_AR7242);
49 }
50 
51 static inline int soc_is_ar7240(void)
52 {
53 	return (ath79_soc == ATH79_SOC_AR7240);
54 }
55 
56 static inline int soc_is_ar7241(void)
57 {
58 	return (ath79_soc == ATH79_SOC_AR7241);
59 }
60 
61 static inline int soc_is_ar7242(void)
62 {
63 	return (ath79_soc == ATH79_SOC_AR7242);
64 }
65 
66 static inline int soc_is_ar913x(void)
67 {
68 	return (ath79_soc == ATH79_SOC_AR9130 ||
69 		ath79_soc == ATH79_SOC_AR9132);
70 }
71 
72 static inline int soc_is_ar933x(void)
73 {
74 	return (ath79_soc == ATH79_SOC_AR9330 ||
75 		ath79_soc == ATH79_SOC_AR9331);
76 }
77 
78 extern void __iomem *ath79_ddr_base;
79 extern void __iomem *ath79_pll_base;
80 extern void __iomem *ath79_reset_base;
81 
82 static inline void ath79_pll_wr(unsigned reg, u32 val)
83 {
84 	__raw_writel(val, ath79_pll_base + reg);
85 }
86 
87 static inline u32 ath79_pll_rr(unsigned reg)
88 {
89 	return __raw_readl(ath79_pll_base + reg);
90 }
91 
92 static inline void ath79_reset_wr(unsigned reg, u32 val)
93 {
94 	__raw_writel(val, ath79_reset_base + reg);
95 }
96 
97 static inline u32 ath79_reset_rr(unsigned reg)
98 {
99 	return __raw_readl(ath79_reset_base + reg);
100 }
101 
102 void ath79_device_reset_set(u32 mask);
103 void ath79_device_reset_clear(u32 mask);
104 
105 #endif /* __ASM_MACH_ATH79_H */
106