xref: /linux/arch/mips/include/asm/mach-ath79/ar933x_uart.h (revision d2912cb15bdda8ba4a5dd73396ad62641af2f520)
1*d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
20bd3acdfSGabor Juhos /*
30bd3acdfSGabor Juhos  *  Atheros AR933X UART defines
40bd3acdfSGabor Juhos  *
50bd3acdfSGabor Juhos  *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
60bd3acdfSGabor Juhos  */
70bd3acdfSGabor Juhos 
80bd3acdfSGabor Juhos #ifndef __AR933X_UART_H
90bd3acdfSGabor Juhos #define __AR933X_UART_H
100bd3acdfSGabor Juhos 
110bd3acdfSGabor Juhos #define AR933X_UART_REGS_SIZE		20
120bd3acdfSGabor Juhos #define AR933X_UART_FIFO_SIZE		16
130bd3acdfSGabor Juhos 
140bd3acdfSGabor Juhos #define AR933X_UART_DATA_REG		0x00
150bd3acdfSGabor Juhos #define AR933X_UART_CS_REG		0x04
160bd3acdfSGabor Juhos #define AR933X_UART_CLOCK_REG		0x08
170bd3acdfSGabor Juhos #define AR933X_UART_INT_REG		0x0c
180bd3acdfSGabor Juhos #define AR933X_UART_INT_EN_REG		0x10
190bd3acdfSGabor Juhos 
200bd3acdfSGabor Juhos #define AR933X_UART_DATA_TX_RX_MASK	0xff
210bd3acdfSGabor Juhos #define AR933X_UART_DATA_RX_CSR		BIT(8)
220bd3acdfSGabor Juhos #define AR933X_UART_DATA_TX_CSR		BIT(9)
230bd3acdfSGabor Juhos 
240bd3acdfSGabor Juhos #define AR933X_UART_CS_PARITY_S		0
250bd3acdfSGabor Juhos #define AR933X_UART_CS_PARITY_M		0x3
260bd3acdfSGabor Juhos #define	  AR933X_UART_CS_PARITY_NONE	0
270bd3acdfSGabor Juhos #define	  AR933X_UART_CS_PARITY_ODD	1
280bd3acdfSGabor Juhos #define	  AR933X_UART_CS_PARITY_EVEN	2
290bd3acdfSGabor Juhos #define AR933X_UART_CS_IF_MODE_S	2
300bd3acdfSGabor Juhos #define AR933X_UART_CS_IF_MODE_M	0x3
310bd3acdfSGabor Juhos #define	  AR933X_UART_CS_IF_MODE_NONE	0
320bd3acdfSGabor Juhos #define	  AR933X_UART_CS_IF_MODE_DTE	1
330bd3acdfSGabor Juhos #define	  AR933X_UART_CS_IF_MODE_DCE	2
340bd3acdfSGabor Juhos #define AR933X_UART_CS_FLOW_CTRL_S	4
350bd3acdfSGabor Juhos #define AR933X_UART_CS_FLOW_CTRL_M	0x3
360bd3acdfSGabor Juhos #define AR933X_UART_CS_DMA_EN		BIT(6)
370bd3acdfSGabor Juhos #define AR933X_UART_CS_TX_READY_ORIDE	BIT(7)
380bd3acdfSGabor Juhos #define AR933X_UART_CS_RX_READY_ORIDE	BIT(8)
390bd3acdfSGabor Juhos #define AR933X_UART_CS_TX_READY		BIT(9)
400bd3acdfSGabor Juhos #define AR933X_UART_CS_RX_BREAK		BIT(10)
410bd3acdfSGabor Juhos #define AR933X_UART_CS_TX_BREAK		BIT(11)
420bd3acdfSGabor Juhos #define AR933X_UART_CS_HOST_INT		BIT(12)
430bd3acdfSGabor Juhos #define AR933X_UART_CS_HOST_INT_EN	BIT(13)
440bd3acdfSGabor Juhos #define AR933X_UART_CS_TX_BUSY		BIT(14)
450bd3acdfSGabor Juhos #define AR933X_UART_CS_RX_BUSY		BIT(15)
460bd3acdfSGabor Juhos 
470bd3acdfSGabor Juhos #define AR933X_UART_CLOCK_STEP_M	0xffff
480bd3acdfSGabor Juhos #define AR933X_UART_CLOCK_SCALE_M	0xfff
490bd3acdfSGabor Juhos #define AR933X_UART_CLOCK_SCALE_S	16
500bd3acdfSGabor Juhos #define AR933X_UART_CLOCK_STEP_M	0xffff
510bd3acdfSGabor Juhos 
520bd3acdfSGabor Juhos #define AR933X_UART_INT_RX_VALID	BIT(0)
530bd3acdfSGabor Juhos #define AR933X_UART_INT_TX_READY	BIT(1)
540bd3acdfSGabor Juhos #define AR933X_UART_INT_RX_FRAMING_ERR	BIT(2)
550bd3acdfSGabor Juhos #define AR933X_UART_INT_RX_OFLOW_ERR	BIT(3)
560bd3acdfSGabor Juhos #define AR933X_UART_INT_TX_OFLOW_ERR	BIT(4)
570bd3acdfSGabor Juhos #define AR933X_UART_INT_RX_PARITY_ERR	BIT(5)
580bd3acdfSGabor Juhos #define AR933X_UART_INT_RX_BREAK_ON	BIT(6)
590bd3acdfSGabor Juhos #define AR933X_UART_INT_RX_BREAK_OFF	BIT(7)
600bd3acdfSGabor Juhos #define AR933X_UART_INT_RX_FULL		BIT(8)
610bd3acdfSGabor Juhos #define AR933X_UART_INT_TX_EMPTY	BIT(9)
620bd3acdfSGabor Juhos #define AR933X_UART_INT_ALLINTS		0x3ff
630bd3acdfSGabor Juhos 
640bd3acdfSGabor Juhos #endif /* __AR933X_UART_H */
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