xref: /linux/arch/mips/include/asm/ip32/ip32_ints.h (revision 384740dc49ea651ba350704d13ff6be9976e37fe)
1*384740dcSRalf Baechle /*
2*384740dcSRalf Baechle  * This file is subject to the terms and conditions of the GNU General Public
3*384740dcSRalf Baechle  * License.  See the file "COPYING" in the main directory of this archive
4*384740dcSRalf Baechle  * for more details.
5*384740dcSRalf Baechle  *
6*384740dcSRalf Baechle  * Copyright (C) 2000 Harald Koerfgen
7*384740dcSRalf Baechle  */
8*384740dcSRalf Baechle 
9*384740dcSRalf Baechle #ifndef __ASM_IP32_INTS_H
10*384740dcSRalf Baechle #define __ASM_IP32_INTS_H
11*384740dcSRalf Baechle 
12*384740dcSRalf Baechle #include <asm/irq.h>
13*384740dcSRalf Baechle 
14*384740dcSRalf Baechle /*
15*384740dcSRalf Baechle  * This list reflects the assignment of interrupt numbers to
16*384740dcSRalf Baechle  * interrupting events.  Order is fairly irrelevant to handling
17*384740dcSRalf Baechle  * priority.  This differs from irix.
18*384740dcSRalf Baechle  */
19*384740dcSRalf Baechle 
20*384740dcSRalf Baechle enum ip32_irq_no {
21*384740dcSRalf Baechle 	/*
22*384740dcSRalf Baechle 	 * CPU interrupts are 0 ... 7
23*384740dcSRalf Baechle 	 */
24*384740dcSRalf Baechle 
25*384740dcSRalf Baechle 	CRIME_IRQ_BASE			= MIPS_CPU_IRQ_BASE + 8,
26*384740dcSRalf Baechle 
27*384740dcSRalf Baechle 	/*
28*384740dcSRalf Baechle 	 * MACE
29*384740dcSRalf Baechle 	 */
30*384740dcSRalf Baechle 	MACE_VID_IN1_IRQ		= CRIME_IRQ_BASE,
31*384740dcSRalf Baechle 	MACE_VID_IN2_IRQ,
32*384740dcSRalf Baechle 	MACE_VID_OUT_IRQ,
33*384740dcSRalf Baechle 	MACE_ETHERNET_IRQ,
34*384740dcSRalf Baechle 	/* SUPERIO, MISC, and AUDIO are MACEISA */
35*384740dcSRalf Baechle 	__MACE_SUPERIO,
36*384740dcSRalf Baechle 	__MACE_MISC,
37*384740dcSRalf Baechle 	__MACE_AUDIO,
38*384740dcSRalf Baechle 	MACE_PCI_BRIDGE_IRQ,
39*384740dcSRalf Baechle 
40*384740dcSRalf Baechle 	/*
41*384740dcSRalf Baechle 	 * MACEPCI
42*384740dcSRalf Baechle 	 */
43*384740dcSRalf Baechle 	MACEPCI_SCSI0_IRQ,
44*384740dcSRalf Baechle 	MACEPCI_SCSI1_IRQ,
45*384740dcSRalf Baechle 	MACEPCI_SLOT0_IRQ,
46*384740dcSRalf Baechle 	MACEPCI_SLOT1_IRQ,
47*384740dcSRalf Baechle 	MACEPCI_SLOT2_IRQ,
48*384740dcSRalf Baechle 	MACEPCI_SHARED0_IRQ,
49*384740dcSRalf Baechle 	MACEPCI_SHARED1_IRQ,
50*384740dcSRalf Baechle 	MACEPCI_SHARED2_IRQ,
51*384740dcSRalf Baechle 
52*384740dcSRalf Baechle 	/*
53*384740dcSRalf Baechle 	 * CRIME
54*384740dcSRalf Baechle 	 */
55*384740dcSRalf Baechle 	CRIME_GBE0_IRQ,
56*384740dcSRalf Baechle 	CRIME_GBE1_IRQ,
57*384740dcSRalf Baechle 	CRIME_GBE2_IRQ,
58*384740dcSRalf Baechle 	CRIME_GBE3_IRQ,
59*384740dcSRalf Baechle 	CRIME_CPUERR_IRQ,
60*384740dcSRalf Baechle 	CRIME_MEMERR_IRQ,
61*384740dcSRalf Baechle 	CRIME_RE_EMPTY_E_IRQ,
62*384740dcSRalf Baechle 	CRIME_RE_FULL_E_IRQ,
63*384740dcSRalf Baechle 	CRIME_RE_IDLE_E_IRQ,
64*384740dcSRalf Baechle 	CRIME_RE_EMPTY_L_IRQ,
65*384740dcSRalf Baechle 	CRIME_RE_FULL_L_IRQ,
66*384740dcSRalf Baechle 	CRIME_RE_IDLE_L_IRQ,
67*384740dcSRalf Baechle 	CRIME_SOFT0_IRQ,
68*384740dcSRalf Baechle 	CRIME_SOFT1_IRQ,
69*384740dcSRalf Baechle 	CRIME_SOFT2_IRQ,
70*384740dcSRalf Baechle 	CRIME_SYSCORERR_IRQ		= CRIME_SOFT2_IRQ,
71*384740dcSRalf Baechle 	CRIME_VICE_IRQ,
72*384740dcSRalf Baechle 
73*384740dcSRalf Baechle 	/*
74*384740dcSRalf Baechle 	 * MACEISA
75*384740dcSRalf Baechle 	 */
76*384740dcSRalf Baechle 	MACEISA_AUDIO_SW_IRQ,
77*384740dcSRalf Baechle 	MACEISA_AUDIO_SC_IRQ,
78*384740dcSRalf Baechle 	MACEISA_AUDIO1_DMAT_IRQ,
79*384740dcSRalf Baechle 	MACEISA_AUDIO1_OF_IRQ,
80*384740dcSRalf Baechle 	MACEISA_AUDIO2_DMAT_IRQ,
81*384740dcSRalf Baechle 	MACEISA_AUDIO2_MERR_IRQ,
82*384740dcSRalf Baechle 	MACEISA_AUDIO3_DMAT_IRQ,
83*384740dcSRalf Baechle 	MACEISA_AUDIO3_MERR_IRQ,
84*384740dcSRalf Baechle 	MACEISA_RTC_IRQ,
85*384740dcSRalf Baechle 	MACEISA_KEYB_IRQ,
86*384740dcSRalf Baechle 	/* MACEISA_KEYB_POLL is not an IRQ */
87*384740dcSRalf Baechle 	__MACEISA_KEYB_POLL,
88*384740dcSRalf Baechle 	MACEISA_MOUSE_IRQ,
89*384740dcSRalf Baechle 	/* MACEISA_MOUSE_POLL is not an IRQ */
90*384740dcSRalf Baechle 	__MACEISA_MOUSE_POLL,
91*384740dcSRalf Baechle 	MACEISA_TIMER0_IRQ,
92*384740dcSRalf Baechle 	MACEISA_TIMER1_IRQ,
93*384740dcSRalf Baechle 	MACEISA_TIMER2_IRQ,
94*384740dcSRalf Baechle 	MACEISA_PARALLEL_IRQ,
95*384740dcSRalf Baechle 	MACEISA_PAR_CTXA_IRQ,
96*384740dcSRalf Baechle 	MACEISA_PAR_CTXB_IRQ,
97*384740dcSRalf Baechle 	MACEISA_PAR_MERR_IRQ,
98*384740dcSRalf Baechle 	MACEISA_SERIAL1_IRQ,
99*384740dcSRalf Baechle 	MACEISA_SERIAL1_TDMAT_IRQ,
100*384740dcSRalf Baechle 	MACEISA_SERIAL1_TDMAPR_IRQ,
101*384740dcSRalf Baechle 	MACEISA_SERIAL1_TDMAME_IRQ,
102*384740dcSRalf Baechle 	MACEISA_SERIAL1_RDMAT_IRQ,
103*384740dcSRalf Baechle 	MACEISA_SERIAL1_RDMAOR_IRQ,
104*384740dcSRalf Baechle 	MACEISA_SERIAL2_IRQ,
105*384740dcSRalf Baechle 	MACEISA_SERIAL2_TDMAT_IRQ,
106*384740dcSRalf Baechle 	MACEISA_SERIAL2_TDMAPR_IRQ,
107*384740dcSRalf Baechle 	MACEISA_SERIAL2_TDMAME_IRQ,
108*384740dcSRalf Baechle 	MACEISA_SERIAL2_RDMAT_IRQ,
109*384740dcSRalf Baechle 	MACEISA_SERIAL2_RDMAOR_IRQ,
110*384740dcSRalf Baechle 
111*384740dcSRalf Baechle 	IP32_IRQ_MAX			= MACEISA_SERIAL2_RDMAOR_IRQ
112*384740dcSRalf Baechle };
113*384740dcSRalf Baechle 
114*384740dcSRalf Baechle #endif /* __ASM_IP32_INTS_H */
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