xref: /linux/arch/mips/include/asm/ginvt.h (revision 3f0a50f345f78183f6e9b39c2f45ca5dcaa511ca)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __MIPS_ASM_GINVT_H__
3 #define __MIPS_ASM_GINVT_H__
4 
5 #include <asm/mipsregs.h>
6 
7 enum ginvt_type {
8 	GINVT_FULL,
9 	GINVT_VA,
10 	GINVT_MMID,
11 };
12 
13 #ifdef TOOLCHAIN_SUPPORTS_GINV
14 # define _ASM_SET_GINV	".set	ginv\n"
15 # define _ASM_UNSET_GINV
16 #else
17 # define _ASM_SET_GINV							\
18 	_ASM_MACRO_1R1I(ginvt, rs, type,				\
19 			_ASM_INSN_IF_MIPS(0x7c0000bd | (__rs << 21) | (\\type << 8))	\
20 			_ASM_INSN32_IF_MM(0x0000717c | (__rs << 16) | (\\type << 9)))
21 # define _ASM_UNSET_GINV ".purgem ginvt\n"
22 #endif
23 
24 static __always_inline void ginvt(unsigned long addr, enum ginvt_type type)
25 {
26 	asm volatile(
27 		".set	push\n"
28 		_ASM_SET_GINV
29 		"	ginvt	%0, %1\n"
30 		_ASM_UNSET_GINV
31 		".set	pop"
32 		: /* no outputs */
33 		: "r"(addr), "i"(type)
34 		: "memory");
35 }
36 
37 static inline void ginvt_full(void)
38 {
39 	ginvt(0, GINVT_FULL);
40 }
41 
42 static inline void ginvt_va(unsigned long addr)
43 {
44 	addr &= PAGE_MASK << 1;
45 	ginvt(addr, GINVT_VA);
46 }
47 
48 static inline void ginvt_mmid(void)
49 {
50 	ginvt(0, GINVT_MMID);
51 }
52 
53 static inline void ginvt_va_mmid(unsigned long addr)
54 {
55 	addr &= PAGE_MASK << 1;
56 	ginvt(addr, GINVT_VA | GINVT_MMID);
57 }
58 
59 #endif /* __MIPS_ASM_GINVT_H__ */
60