1*384740dcSRalf Baechle /* 2*384740dcSRalf Baechle * Definitions for the FPU register names 3*384740dcSRalf Baechle * 4*384740dcSRalf Baechle * This file is subject to the terms and conditions of the GNU General Public 5*384740dcSRalf Baechle * License. See the file "COPYING" in the main directory of this archive 6*384740dcSRalf Baechle * for more details. 7*384740dcSRalf Baechle * 8*384740dcSRalf Baechle * Copyright (C) 1995, 1999 Ralf Baechle 9*384740dcSRalf Baechle * Copyright (C) 1985 MIPS Computer Systems, Inc. 10*384740dcSRalf Baechle * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc. 11*384740dcSRalf Baechle */ 12*384740dcSRalf Baechle #ifndef _ASM_FPREGDEF_H 13*384740dcSRalf Baechle #define _ASM_FPREGDEF_H 14*384740dcSRalf Baechle 15*384740dcSRalf Baechle #include <asm/sgidefs.h> 16*384740dcSRalf Baechle 17*384740dcSRalf Baechle #if _MIPS_SIM == _MIPS_SIM_ABI32 18*384740dcSRalf Baechle 19*384740dcSRalf Baechle /* 20*384740dcSRalf Baechle * These definitions only cover the R3000-ish 16/32 register model. 21*384740dcSRalf Baechle * But we're trying to be R3000 friendly anyway ... 22*384740dcSRalf Baechle */ 23*384740dcSRalf Baechle #define fv0 $f0 /* return value */ 24*384740dcSRalf Baechle #define fv0f $f1 25*384740dcSRalf Baechle #define fv1 $f2 26*384740dcSRalf Baechle #define fv1f $f3 27*384740dcSRalf Baechle #define fa0 $f12 /* argument registers */ 28*384740dcSRalf Baechle #define fa0f $f13 29*384740dcSRalf Baechle #define fa1 $f14 30*384740dcSRalf Baechle #define fa1f $f15 31*384740dcSRalf Baechle #define ft0 $f4 /* caller saved */ 32*384740dcSRalf Baechle #define ft0f $f5 33*384740dcSRalf Baechle #define ft1 $f6 34*384740dcSRalf Baechle #define ft1f $f7 35*384740dcSRalf Baechle #define ft2 $f8 36*384740dcSRalf Baechle #define ft2f $f9 37*384740dcSRalf Baechle #define ft3 $f10 38*384740dcSRalf Baechle #define ft3f $f11 39*384740dcSRalf Baechle #define ft4 $f16 40*384740dcSRalf Baechle #define ft4f $f17 41*384740dcSRalf Baechle #define ft5 $f18 42*384740dcSRalf Baechle #define ft5f $f19 43*384740dcSRalf Baechle #define fs0 $f20 /* callee saved */ 44*384740dcSRalf Baechle #define fs0f $f21 45*384740dcSRalf Baechle #define fs1 $f22 46*384740dcSRalf Baechle #define fs1f $f23 47*384740dcSRalf Baechle #define fs2 $f24 48*384740dcSRalf Baechle #define fs2f $f25 49*384740dcSRalf Baechle #define fs3 $f26 50*384740dcSRalf Baechle #define fs3f $f27 51*384740dcSRalf Baechle #define fs4 $f28 52*384740dcSRalf Baechle #define fs4f $f29 53*384740dcSRalf Baechle #define fs5 $f30 54*384740dcSRalf Baechle #define fs5f $f31 55*384740dcSRalf Baechle 56*384740dcSRalf Baechle #define fcr31 $31 /* FPU status register */ 57*384740dcSRalf Baechle 58*384740dcSRalf Baechle #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 59*384740dcSRalf Baechle 60*384740dcSRalf Baechle #if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 61*384740dcSRalf Baechle 62*384740dcSRalf Baechle #define fv0 $f0 /* return value */ 63*384740dcSRalf Baechle #define fv1 $f2 64*384740dcSRalf Baechle #define fa0 $f12 /* argument registers */ 65*384740dcSRalf Baechle #define fa1 $f13 66*384740dcSRalf Baechle #define fa2 $f14 67*384740dcSRalf Baechle #define fa3 $f15 68*384740dcSRalf Baechle #define fa4 $f16 69*384740dcSRalf Baechle #define fa5 $f17 70*384740dcSRalf Baechle #define fa6 $f18 71*384740dcSRalf Baechle #define fa7 $f19 72*384740dcSRalf Baechle #define ft0 $f4 /* caller saved */ 73*384740dcSRalf Baechle #define ft1 $f5 74*384740dcSRalf Baechle #define ft2 $f6 75*384740dcSRalf Baechle #define ft3 $f7 76*384740dcSRalf Baechle #define ft4 $f8 77*384740dcSRalf Baechle #define ft5 $f9 78*384740dcSRalf Baechle #define ft6 $f10 79*384740dcSRalf Baechle #define ft7 $f11 80*384740dcSRalf Baechle #define ft8 $f20 81*384740dcSRalf Baechle #define ft9 $f21 82*384740dcSRalf Baechle #define ft10 $f22 83*384740dcSRalf Baechle #define ft11 $f23 84*384740dcSRalf Baechle #define ft12 $f1 85*384740dcSRalf Baechle #define ft13 $f3 86*384740dcSRalf Baechle #define fs0 $f24 /* callee saved */ 87*384740dcSRalf Baechle #define fs1 $f25 88*384740dcSRalf Baechle #define fs2 $f26 89*384740dcSRalf Baechle #define fs3 $f27 90*384740dcSRalf Baechle #define fs4 $f28 91*384740dcSRalf Baechle #define fs5 $f29 92*384740dcSRalf Baechle #define fs6 $f30 93*384740dcSRalf Baechle #define fs7 $f31 94*384740dcSRalf Baechle 95*384740dcSRalf Baechle #define fcr31 $31 96*384740dcSRalf Baechle 97*384740dcSRalf Baechle #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */ 98*384740dcSRalf Baechle 99*384740dcSRalf Baechle #endif /* _ASM_FPREGDEF_H */ 100