xref: /linux/arch/mips/include/asm/elf.h (revision f337967d6d87da39f6e59d90430f3bec0909edf5)
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Much of this is taken from binutils and GNU libc ...
7  */
8 #ifndef _ASM_ELF_H
9 #define _ASM_ELF_H
10 
11 #include <linux/auxvec.h>
12 #include <linux/fs.h>
13 #include <uapi/linux/elf.h>
14 
15 #include <asm/current.h>
16 
17 /* ELF header e_flags defines. */
18 /* MIPS architecture level. */
19 #define EF_MIPS_ARCH_1		0x00000000	/* -mips1 code.	 */
20 #define EF_MIPS_ARCH_2		0x10000000	/* -mips2 code.	 */
21 #define EF_MIPS_ARCH_3		0x20000000	/* -mips3 code.	 */
22 #define EF_MIPS_ARCH_4		0x30000000	/* -mips4 code.	 */
23 #define EF_MIPS_ARCH_5		0x40000000	/* -mips5 code.	 */
24 #define EF_MIPS_ARCH_32		0x50000000	/* MIPS32 code.	 */
25 #define EF_MIPS_ARCH_64		0x60000000	/* MIPS64 code.	 */
26 #define EF_MIPS_ARCH_32R2	0x70000000	/* MIPS32 R2 code.  */
27 #define EF_MIPS_ARCH_64R2	0x80000000	/* MIPS64 R2 code.  */
28 
29 /* The ABI of a file. */
30 #define EF_MIPS_ABI_O32		0x00001000	/* O32 ABI.  */
31 #define EF_MIPS_ABI_O64		0x00002000	/* O32 extended for 64 bit.  */
32 
33 #define PT_MIPS_REGINFO		0x70000000
34 #define PT_MIPS_RTPROC		0x70000001
35 #define PT_MIPS_OPTIONS		0x70000002
36 #define PT_MIPS_ABIFLAGS	0x70000003
37 
38 /* Flags in the e_flags field of the header */
39 #define EF_MIPS_NOREORDER	0x00000001
40 #define EF_MIPS_PIC		0x00000002
41 #define EF_MIPS_CPIC		0x00000004
42 #define EF_MIPS_ABI2		0x00000020
43 #define EF_MIPS_OPTIONS_FIRST	0x00000080
44 #define EF_MIPS_32BITMODE	0x00000100
45 #define EF_MIPS_FP64		0x00000200
46 #define EF_MIPS_NAN2008		0x00000400
47 #define EF_MIPS_ABI		0x0000f000
48 #define EF_MIPS_ARCH		0xf0000000
49 
50 #define DT_MIPS_RLD_VERSION	0x70000001
51 #define DT_MIPS_TIME_STAMP	0x70000002
52 #define DT_MIPS_ICHECKSUM	0x70000003
53 #define DT_MIPS_IVERSION	0x70000004
54 #define DT_MIPS_FLAGS		0x70000005
55 	#define RHF_NONE	0x00000000
56 	#define RHF_HARDWAY	0x00000001
57 	#define RHF_NOTPOT	0x00000002
58 	#define RHF_SGI_ONLY	0x00000010
59 #define DT_MIPS_BASE_ADDRESS	0x70000006
60 #define DT_MIPS_CONFLICT	0x70000008
61 #define DT_MIPS_LIBLIST		0x70000009
62 #define DT_MIPS_LOCAL_GOTNO	0x7000000a
63 #define DT_MIPS_CONFLICTNO	0x7000000b
64 #define DT_MIPS_LIBLISTNO	0x70000010
65 #define DT_MIPS_SYMTABNO	0x70000011
66 #define DT_MIPS_UNREFEXTNO	0x70000012
67 #define DT_MIPS_GOTSYM		0x70000013
68 #define DT_MIPS_HIPAGENO	0x70000014
69 #define DT_MIPS_RLD_MAP		0x70000016
70 
71 #define R_MIPS_NONE		0
72 #define R_MIPS_16		1
73 #define R_MIPS_32		2
74 #define R_MIPS_REL32		3
75 #define R_MIPS_26		4
76 #define R_MIPS_HI16		5
77 #define R_MIPS_LO16		6
78 #define R_MIPS_GPREL16		7
79 #define R_MIPS_LITERAL		8
80 #define R_MIPS_GOT16		9
81 #define R_MIPS_PC16		10
82 #define R_MIPS_CALL16		11
83 #define R_MIPS_GPREL32		12
84 /* The remaining relocs are defined on Irix, although they are not
85    in the MIPS ELF ABI.	 */
86 #define R_MIPS_UNUSED1		13
87 #define R_MIPS_UNUSED2		14
88 #define R_MIPS_UNUSED3		15
89 #define R_MIPS_SHIFT5		16
90 #define R_MIPS_SHIFT6		17
91 #define R_MIPS_64		18
92 #define R_MIPS_GOT_DISP		19
93 #define R_MIPS_GOT_PAGE		20
94 #define R_MIPS_GOT_OFST		21
95 /*
96  * The following two relocation types are specified in the MIPS ABI
97  * conformance guide version 1.2 but not yet in the psABI.
98  */
99 #define R_MIPS_GOTHI16		22
100 #define R_MIPS_GOTLO16		23
101 #define R_MIPS_SUB		24
102 #define R_MIPS_INSERT_A		25
103 #define R_MIPS_INSERT_B		26
104 #define R_MIPS_DELETE		27
105 #define R_MIPS_HIGHER		28
106 #define R_MIPS_HIGHEST		29
107 /*
108  * The following two relocation types are specified in the MIPS ABI
109  * conformance guide version 1.2 but not yet in the psABI.
110  */
111 #define R_MIPS_CALLHI16		30
112 #define R_MIPS_CALLLO16		31
113 /*
114  * Introduced for MIPSr6.
115  */
116 #define R_MIPS_PC21_S2		60
117 #define R_MIPS_PC26_S2		61
118 /*
119  * This range is reserved for vendor specific relocations.
120  */
121 #define R_MIPS_LOVENDOR		100
122 #define R_MIPS_HIVENDOR		127
123 
124 #define SHN_MIPS_ACCOMON	0xff00		/* Allocated common symbols */
125 #define SHN_MIPS_TEXT		0xff01		/* Allocated test symbols.  */
126 #define SHN_MIPS_DATA		0xff02		/* Allocated data symbols.  */
127 #define SHN_MIPS_SCOMMON	0xff03		/* Small common symbols */
128 #define SHN_MIPS_SUNDEFINED	0xff04		/* Small undefined symbols */
129 
130 #define SHT_MIPS_LIST		0x70000000
131 #define SHT_MIPS_CONFLICT	0x70000002
132 #define SHT_MIPS_GPTAB		0x70000003
133 #define SHT_MIPS_UCODE		0x70000004
134 #define SHT_MIPS_DEBUG		0x70000005
135 #define SHT_MIPS_REGINFO	0x70000006
136 #define SHT_MIPS_PACKAGE	0x70000007
137 #define SHT_MIPS_PACKSYM	0x70000008
138 #define SHT_MIPS_RELD		0x70000009
139 #define SHT_MIPS_IFACE		0x7000000b
140 #define SHT_MIPS_CONTENT	0x7000000c
141 #define SHT_MIPS_OPTIONS	0x7000000d
142 #define SHT_MIPS_SHDR		0x70000010
143 #define SHT_MIPS_FDESC		0x70000011
144 #define SHT_MIPS_EXTSYM		0x70000012
145 #define SHT_MIPS_DENSE		0x70000013
146 #define SHT_MIPS_PDESC		0x70000014
147 #define SHT_MIPS_LOCSYM		0x70000015
148 #define SHT_MIPS_AUXSYM		0x70000016
149 #define SHT_MIPS_OPTSYM		0x70000017
150 #define SHT_MIPS_LOCSTR		0x70000018
151 #define SHT_MIPS_LINE		0x70000019
152 #define SHT_MIPS_RFDESC		0x7000001a
153 #define SHT_MIPS_DELTASYM	0x7000001b
154 #define SHT_MIPS_DELTAINST	0x7000001c
155 #define SHT_MIPS_DELTACLASS	0x7000001d
156 #define SHT_MIPS_DWARF		0x7000001e
157 #define SHT_MIPS_DELTADECL	0x7000001f
158 #define SHT_MIPS_SYMBOL_LIB	0x70000020
159 #define SHT_MIPS_EVENTS		0x70000021
160 #define SHT_MIPS_TRANSLATE	0x70000022
161 #define SHT_MIPS_PIXIE		0x70000023
162 #define SHT_MIPS_XLATE		0x70000024
163 #define SHT_MIPS_XLATE_DEBUG	0x70000025
164 #define SHT_MIPS_WHIRL		0x70000026
165 #define SHT_MIPS_EH_REGION	0x70000027
166 #define SHT_MIPS_XLATE_OLD	0x70000028
167 #define SHT_MIPS_PDR_EXCEPTION	0x70000029
168 
169 #define SHF_MIPS_GPREL		0x10000000
170 #define SHF_MIPS_MERGE		0x20000000
171 #define SHF_MIPS_ADDR		0x40000000
172 #define SHF_MIPS_STRING		0x80000000
173 #define SHF_MIPS_NOSTRIP	0x08000000
174 #define SHF_MIPS_LOCAL		0x04000000
175 #define SHF_MIPS_NAMES		0x02000000
176 #define SHF_MIPS_NODUPES	0x01000000
177 
178 #ifndef ELF_ARCH
179 /* ELF register definitions */
180 #define ELF_NGREG	45
181 #define ELF_NFPREG	33
182 
183 typedef unsigned long elf_greg_t;
184 typedef elf_greg_t elf_gregset_t[ELF_NGREG];
185 
186 typedef double elf_fpreg_t;
187 typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
188 
189 struct mips_elf_abiflags_v0 {
190 	uint16_t version;	/* Version of flags structure */
191 	uint8_t isa_level;	/* The level of the ISA: 1-5, 32, 64 */
192 	uint8_t isa_rev;	/* The revision of ISA: 0 for MIPS V and below,
193 				   1-n otherwise */
194 	uint8_t gpr_size;	/* The size of general purpose registers */
195 	uint8_t cpr1_size;	/* The size of co-processor 1 registers */
196 	uint8_t cpr2_size;	/* The size of co-processor 2 registers */
197 	uint8_t fp_abi;		/* The floating-point ABI */
198 	uint32_t isa_ext;	/* Mask of processor-specific extensions */
199 	uint32_t ases;		/* Mask of ASEs used */
200 	uint32_t flags1;	/* Mask of general flags */
201 	uint32_t flags2;
202 };
203 
204 #define MIPS_ABI_FP_ANY		0	/* FP ABI doesn't matter */
205 #define MIPS_ABI_FP_DOUBLE	1	/* -mdouble-float */
206 #define MIPS_ABI_FP_SINGLE	2	/* -msingle-float */
207 #define MIPS_ABI_FP_SOFT	3	/* -msoft-float */
208 #define MIPS_ABI_FP_OLD_64	4	/* -mips32r2 -mfp64 */
209 #define MIPS_ABI_FP_XX		5	/* -mfpxx */
210 #define MIPS_ABI_FP_64		6	/* -mips32r2 -mfp64 */
211 #define MIPS_ABI_FP_64A		7	/* -mips32r2 -mfp64 -mno-odd-spreg */
212 
213 #ifdef CONFIG_32BIT
214 
215 /*
216  * In order to be sure that we don't attempt to execute an O32 binary which
217  * requires 64 bit FP (FR=1) on a system which does not support it we refuse
218  * to execute any binary which has bits specified by the following macro set
219  * in its ELF header flags.
220  */
221 #ifdef CONFIG_MIPS_O32_FP64_SUPPORT
222 # define __MIPS_O32_FP64_MUST_BE_ZERO	0
223 #else
224 # define __MIPS_O32_FP64_MUST_BE_ZERO	EF_MIPS_FP64
225 #endif
226 
227 /*
228  * This is used to ensure we don't load something for the wrong architecture.
229  */
230 #define elf_check_arch(hdr)						\
231 ({									\
232 	int __res = 1;							\
233 	struct elfhdr *__h = (hdr);					\
234 									\
235 	if (!mips_elf_check_machine(__h))				\
236 		__res = 0;						\
237 	if (__h->e_ident[EI_CLASS] != ELFCLASS32)			\
238 		__res = 0;						\
239 	if ((__h->e_flags & EF_MIPS_ABI2) != 0)				\
240 		__res = 0;						\
241 	if (((__h->e_flags & EF_MIPS_ABI) != 0) &&			\
242 	    ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32))		\
243 		__res = 0;						\
244 	if (__h->e_flags & __MIPS_O32_FP64_MUST_BE_ZERO)		\
245 		__res = 0;						\
246 									\
247 	__res;								\
248 })
249 
250 /*
251  * These are used to set parameters in the core dumps.
252  */
253 #define ELF_CLASS	ELFCLASS32
254 
255 #endif /* CONFIG_32BIT */
256 
257 #ifdef CONFIG_64BIT
258 /*
259  * This is used to ensure we don't load something for the wrong architecture.
260  */
261 #define elf_check_arch(hdr)						\
262 ({									\
263 	int __res = 1;							\
264 	struct elfhdr *__h = (hdr);					\
265 									\
266 	if (!mips_elf_check_machine(__h))				\
267 		__res = 0;						\
268 	if (__h->e_ident[EI_CLASS] != ELFCLASS64)			\
269 		__res = 0;						\
270 									\
271 	__res;								\
272 })
273 
274 /*
275  * These are used to set parameters in the core dumps.
276  */
277 #define ELF_CLASS	ELFCLASS64
278 
279 #endif /* CONFIG_64BIT */
280 
281 /*
282  * These are used to set parameters in the core dumps.
283  */
284 #ifdef __MIPSEB__
285 #define ELF_DATA	ELFDATA2MSB
286 #elif defined(__MIPSEL__)
287 #define ELF_DATA	ELFDATA2LSB
288 #endif
289 #define ELF_ARCH	EM_MIPS
290 
291 #endif /* !defined(ELF_ARCH) */
292 
293 #define mips_elf_check_machine(x) ((x)->e_machine == EM_MIPS)
294 
295 #define vmcore_elf32_check_arch mips_elf_check_machine
296 #define vmcore_elf64_check_arch mips_elf_check_machine
297 
298 struct mips_abi;
299 
300 extern struct mips_abi mips_abi;
301 extern struct mips_abi mips_abi_32;
302 extern struct mips_abi mips_abi_n32;
303 
304 #ifdef CONFIG_32BIT
305 
306 #define SET_PERSONALITY2(ex, state)					\
307 do {									\
308 	if (personality(current->personality) != PER_LINUX)		\
309 		set_personality(PER_LINUX);				\
310 									\
311 	clear_thread_flag(TIF_HYBRID_FPREGS);				\
312 	set_thread_flag(TIF_32BIT_FPREGS);				\
313 									\
314 	mips_set_personality_fp(state);					\
315 									\
316 	current->thread.abi = &mips_abi;				\
317 									\
318 	mips_set_personality_nan(state);				\
319 } while (0)
320 
321 #endif /* CONFIG_32BIT */
322 
323 #ifdef CONFIG_64BIT
324 
325 #ifdef CONFIG_MIPS32_N32
326 #define __SET_PERSONALITY32_N32()					\
327 	do {								\
328 		set_thread_flag(TIF_32BIT_ADDR);			\
329 		current->thread.abi = &mips_abi_n32;			\
330 	} while (0)
331 #else
332 #define __SET_PERSONALITY32_N32()					\
333 	do { } while (0)
334 #endif
335 
336 #ifdef CONFIG_MIPS32_O32
337 #define __SET_PERSONALITY32_O32(ex, state)				\
338 	do {								\
339 		set_thread_flag(TIF_32BIT_REGS);			\
340 		set_thread_flag(TIF_32BIT_ADDR);			\
341 		clear_thread_flag(TIF_HYBRID_FPREGS);			\
342 		set_thread_flag(TIF_32BIT_FPREGS);			\
343 									\
344 		mips_set_personality_fp(state);				\
345 									\
346 		current->thread.abi = &mips_abi_32;			\
347 	} while (0)
348 #else
349 #define __SET_PERSONALITY32_O32(ex, state)				\
350 	do { } while (0)
351 #endif
352 
353 #ifdef CONFIG_MIPS32_COMPAT
354 #define __SET_PERSONALITY32(ex, state)					\
355 do {									\
356 	if ((((ex).e_flags & EF_MIPS_ABI2) != 0) &&			\
357 	     ((ex).e_flags & EF_MIPS_ABI) == 0)				\
358 		__SET_PERSONALITY32_N32();				\
359 	else								\
360 		__SET_PERSONALITY32_O32(ex, state);			\
361 } while (0)
362 #else
363 #define __SET_PERSONALITY32(ex, state) do { } while (0)
364 #endif
365 
366 #define SET_PERSONALITY2(ex, state)					\
367 do {									\
368 	unsigned int p;							\
369 									\
370 	clear_thread_flag(TIF_32BIT_REGS);				\
371 	clear_thread_flag(TIF_32BIT_FPREGS);				\
372 	clear_thread_flag(TIF_HYBRID_FPREGS);				\
373 	clear_thread_flag(TIF_32BIT_ADDR);				\
374 									\
375 	if ((ex).e_ident[EI_CLASS] == ELFCLASS32)			\
376 		__SET_PERSONALITY32(ex, state);				\
377 	else								\
378 		current->thread.abi = &mips_abi;			\
379 									\
380 	mips_set_personality_nan(state);				\
381 									\
382 	p = personality(current->personality);				\
383 	if (p != PER_LINUX32 && p != PER_LINUX)				\
384 		set_personality(PER_LINUX);				\
385 } while (0)
386 
387 #endif /* CONFIG_64BIT */
388 
389 #define CORE_DUMP_USE_REGSET
390 #define ELF_EXEC_PAGESIZE	PAGE_SIZE
391 
392 /* This yields a mask that user programs can use to figure out what
393    instruction set this cpu supports.  This could be done in userspace,
394    but it's not easy, and we've already done it here.  */
395 
396 #define ELF_HWCAP	(elf_hwcap)
397 extern unsigned int elf_hwcap;
398 #include <asm/hwcap.h>
399 
400 /*
401  * This yields a string that ld.so will use to load implementation
402  * specific libraries for optimization.	 This is more specific in
403  * intent than poking at uname or /proc/cpuinfo.
404  */
405 
406 #define ELF_PLATFORM  __elf_platform
407 extern const char *__elf_platform;
408 
409 /*
410  * See comments in asm-alpha/elf.h, this is the same thing
411  * on the MIPS.
412  */
413 #define ELF_PLAT_INIT(_r, load_addr)	do { \
414 	_r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0;	\
415 	_r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0;	\
416 	_r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0;	\
417 	_r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0;	\
418 	_r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0;	\
419 	_r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0;	\
420 	_r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0;	\
421 	_r->regs[30] = _r->regs[31] = 0;				\
422 } while (0)
423 
424 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
425    use of this is to invoke "./ld.so someprog" to test out a new version of
426    the loader.	We need to make sure that it is out of the way of the program
427    that it will "exec", and that there is sufficient room for the brk.	*/
428 
429 #ifndef ELF_ET_DYN_BASE
430 #define ELF_ET_DYN_BASE		(TASK_SIZE / 3 * 2)
431 #endif
432 
433 #define ARCH_DLINFO							\
434 do {									\
435 	NEW_AUX_ENT(AT_SYSINFO_EHDR,					\
436 		    (unsigned long)current->mm->context.vdso);		\
437 } while (0)
438 
439 #define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
440 struct linux_binprm;
441 extern int arch_setup_additional_pages(struct linux_binprm *bprm,
442 				       int uses_interp);
443 
444 struct arch_elf_state {
445 	int nan_2008;
446 	int fp_abi;
447 	int interp_fp_abi;
448 	int overall_fp_mode;
449 };
450 
451 #define MIPS_ABI_FP_UNKNOWN	(-1)	/* Unknown FP ABI (kernel internal) */
452 
453 #define INIT_ARCH_ELF_STATE {			\
454 	.nan_2008 = -1,				\
455 	.fp_abi = MIPS_ABI_FP_UNKNOWN,		\
456 	.interp_fp_abi = MIPS_ABI_FP_UNKNOWN,	\
457 	.overall_fp_mode = -1,			\
458 }
459 
460 /* Whether to accept legacy-NaN and 2008-NaN user binaries.  */
461 extern bool mips_use_nan_legacy;
462 extern bool mips_use_nan_2008;
463 
464 extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf,
465 			    bool is_interp, struct arch_elf_state *state);
466 
467 extern int arch_check_elf(void *ehdr, bool has_interpreter, void *interp_ehdr,
468 			  struct arch_elf_state *state);
469 
470 extern void mips_set_personality_nan(struct arch_elf_state *state);
471 extern void mips_set_personality_fp(struct arch_elf_state *state);
472 
473 #endif /* _ASM_ELF_H */
474