xref: /linux/arch/mips/include/asm/dsp.h (revision 87c9c16317882dd6dbbc07e349bc3223e14f3244)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Copyright (C) 2005 Mips Technologies
4  * Author: Chris Dearman, chris@mips.com derived from fpu.h
5  */
6 #ifndef _ASM_DSP_H
7 #define _ASM_DSP_H
8 
9 #include <asm/cpu.h>
10 #include <asm/cpu-features.h>
11 #include <asm/hazards.h>
12 #include <asm/mipsregs.h>
13 
14 #define DSP_DEFAULT	0x00000000
15 #define DSP_MASK	0x3f
16 
17 #define __enable_dsp_hazard()						\
18 do {									\
19 	asm("_ehb");							\
20 } while (0)
21 
22 static inline void __init_dsp(void)
23 {
24 	mthi1(0);
25 	mtlo1(0);
26 	mthi2(0);
27 	mtlo2(0);
28 	mthi3(0);
29 	mtlo3(0);
30 	wrdsp(DSP_DEFAULT, DSP_MASK);
31 }
32 
33 static inline void init_dsp(void)
34 {
35 	if (cpu_has_dsp)
36 		__init_dsp();
37 }
38 
39 #define __save_dsp(tsk)							\
40 do {									\
41 	tsk->thread.dsp.dspr[0] = mfhi1();				\
42 	tsk->thread.dsp.dspr[1] = mflo1();				\
43 	tsk->thread.dsp.dspr[2] = mfhi2();				\
44 	tsk->thread.dsp.dspr[3] = mflo2();				\
45 	tsk->thread.dsp.dspr[4] = mfhi3();				\
46 	tsk->thread.dsp.dspr[5] = mflo3();				\
47 	tsk->thread.dsp.dspcontrol = rddsp(DSP_MASK);			\
48 } while (0)
49 
50 #define save_dsp(tsk)							\
51 do {									\
52 	if (cpu_has_dsp)						\
53 		__save_dsp(tsk);					\
54 } while (0)
55 
56 #define __restore_dsp(tsk)						\
57 do {									\
58 	mthi1(tsk->thread.dsp.dspr[0]);					\
59 	mtlo1(tsk->thread.dsp.dspr[1]);					\
60 	mthi2(tsk->thread.dsp.dspr[2]);					\
61 	mtlo2(tsk->thread.dsp.dspr[3]);					\
62 	mthi3(tsk->thread.dsp.dspr[4]);					\
63 	mtlo3(tsk->thread.dsp.dspr[5]);					\
64 	wrdsp(tsk->thread.dsp.dspcontrol, DSP_MASK);			\
65 } while (0)
66 
67 #define restore_dsp(tsk)						\
68 do {									\
69 	if (cpu_has_dsp)						\
70 		__restore_dsp(tsk);					\
71 } while (0)
72 
73 #define __get_dsp_regs(tsk)						\
74 ({									\
75 	if (tsk == current)						\
76 		__save_dsp(current);					\
77 									\
78 	tsk->thread.dsp.dspr;						\
79 })
80 
81 #endif /* _ASM_DSP_H */
82