1*384740dcSRalf Baechle /* 2*384740dcSRalf Baechle * Hardware info about DECstation 5000/2x0 systems (otherwise known as 3*384740dcSRalf Baechle * 3max+) and DECsystem 5900 systems (otherwise known as bigmax) which 4*384740dcSRalf Baechle * differ mechanically but are otherwise identical (both are known as 5*384740dcSRalf Baechle * KN03). 6*384740dcSRalf Baechle * 7*384740dcSRalf Baechle * This file is subject to the terms and conditions of the GNU General Public 8*384740dcSRalf Baechle * License. See the file "COPYING" in the main directory of this archive 9*384740dcSRalf Baechle * for more details. 10*384740dcSRalf Baechle * 11*384740dcSRalf Baechle * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions 12*384740dcSRalf Baechle * are by courtesy of Chris Fraser. 13*384740dcSRalf Baechle * Copyright (C) 2000, 2002, 2003, 2005 Maciej W. Rozycki 14*384740dcSRalf Baechle */ 15*384740dcSRalf Baechle #ifndef __ASM_MIPS_DEC_KN03_H 16*384740dcSRalf Baechle #define __ASM_MIPS_DEC_KN03_H 17*384740dcSRalf Baechle 18*384740dcSRalf Baechle #include <asm/dec/ecc.h> 19*384740dcSRalf Baechle #include <asm/dec/ioasic_addrs.h> 20*384740dcSRalf Baechle 21*384740dcSRalf Baechle #define KN03_SLOT_BASE 0x1f800000 22*384740dcSRalf Baechle 23*384740dcSRalf Baechle /* 24*384740dcSRalf Baechle * CPU interrupt bits. 25*384740dcSRalf Baechle */ 26*384740dcSRalf Baechle #define KN03_CPU_INR_HALT 6 /* HALT button */ 27*384740dcSRalf Baechle #define KN03_CPU_INR_BUS 5 /* memory, I/O bus read/write errors */ 28*384740dcSRalf Baechle #define KN03_CPU_INR_RES_4 4 /* unused */ 29*384740dcSRalf Baechle #define KN03_CPU_INR_RTC 3 /* DS1287 RTC */ 30*384740dcSRalf Baechle #define KN03_CPU_INR_CASCADE 2 /* I/O ASIC cascade */ 31*384740dcSRalf Baechle 32*384740dcSRalf Baechle /* 33*384740dcSRalf Baechle * I/O ASIC interrupt bits. Star marks denote non-IRQ status bits. 34*384740dcSRalf Baechle */ 35*384740dcSRalf Baechle #define KN03_IO_INR_3MAXP 15 /* (*) 3max+/bigmax ID */ 36*384740dcSRalf Baechle #define KN03_IO_INR_NVRAM 14 /* (*) NVRAM clear jumper */ 37*384740dcSRalf Baechle #define KN03_IO_INR_TC2 13 /* TURBOchannel slot #2 */ 38*384740dcSRalf Baechle #define KN03_IO_INR_TC1 12 /* TURBOchannel slot #1 */ 39*384740dcSRalf Baechle #define KN03_IO_INR_TC0 11 /* TURBOchannel slot #0 */ 40*384740dcSRalf Baechle #define KN03_IO_INR_NRMOD 10 /* (*) NRMOD manufacturing jumper */ 41*384740dcSRalf Baechle #define KN03_IO_INR_ASC 9 /* ASC (NCR53C94) SCSI */ 42*384740dcSRalf Baechle #define KN03_IO_INR_LANCE 8 /* LANCE (Am7990) Ethernet */ 43*384740dcSRalf Baechle #define KN03_IO_INR_SCC1 7 /* SCC (Z85C30) serial #1 */ 44*384740dcSRalf Baechle #define KN03_IO_INR_SCC0 6 /* SCC (Z85C30) serial #0 */ 45*384740dcSRalf Baechle #define KN03_IO_INR_RTC 5 /* DS1287 RTC */ 46*384740dcSRalf Baechle #define KN03_IO_INR_PSU 4 /* power supply unit warning */ 47*384740dcSRalf Baechle #define KN03_IO_INR_RES_3 3 /* unused */ 48*384740dcSRalf Baechle #define KN03_IO_INR_ASC_DATA 2 /* SCSI data ready (for PIO) */ 49*384740dcSRalf Baechle #define KN03_IO_INR_PBNC 1 /* ~HALT button debouncer */ 50*384740dcSRalf Baechle #define KN03_IO_INR_PBNO 0 /* HALT button debouncer */ 51*384740dcSRalf Baechle 52*384740dcSRalf Baechle 53*384740dcSRalf Baechle /* 54*384740dcSRalf Baechle * Memory Control Register bits. 55*384740dcSRalf Baechle */ 56*384740dcSRalf Baechle #define KN03_MCR_RES_16 (0xffff<<16) /* unused */ 57*384740dcSRalf Baechle #define KN03_MCR_DIAGCHK (1<<15) /* diagn/norml ECC reads */ 58*384740dcSRalf Baechle #define KN03_MCR_DIAGGEN (1<<14) /* diagn/norml ECC writes */ 59*384740dcSRalf Baechle #define KN03_MCR_CORRECT (1<<13) /* ECC correct/check */ 60*384740dcSRalf Baechle #define KN03_MCR_RES_11 (0x3<<12) /* unused */ 61*384740dcSRalf Baechle #define KN03_MCR_BNK32M (1<<10) /* 32M/8M stride */ 62*384740dcSRalf Baechle #define KN03_MCR_RES_7 (0x7<<7) /* unused */ 63*384740dcSRalf Baechle #define KN03_MCR_CHECK (0x7f<<0) /* diagnostic check bits */ 64*384740dcSRalf Baechle 65*384740dcSRalf Baechle /* 66*384740dcSRalf Baechle * I/O ASIC System Support Register bits. 67*384740dcSRalf Baechle */ 68*384740dcSRalf Baechle #define KN03_IO_SSR_TXDIS1 (1<<14) /* SCC1 transmit disable */ 69*384740dcSRalf Baechle #define KN03_IO_SSR_TXDIS0 (1<<13) /* SCC0 transmit disable */ 70*384740dcSRalf Baechle #define KN03_IO_SSR_RES_12 (1<<12) /* unused */ 71*384740dcSRalf Baechle 72*384740dcSRalf Baechle #define KN03_IO_SSR_LEDS (0xff<<0) /* ~diagnostic LEDs */ 73*384740dcSRalf Baechle 74*384740dcSRalf Baechle #endif /* __ASM_MIPS_DEC_KN03_H */ 75