xref: /linux/arch/mips/include/asm/dec/kn02ca.h (revision 384740dc49ea651ba350704d13ff6be9976e37fe)
1*384740dcSRalf Baechle /*
2*384740dcSRalf Baechle  *	include/asm-mips/dec/kn02ca.h
3*384740dcSRalf Baechle  *
4*384740dcSRalf Baechle  *	Personal DECstation 5000/xx (Maxine or KN02-CA) definitions.
5*384740dcSRalf Baechle  *
6*384740dcSRalf Baechle  *	Copyright (C) 2002, 2003  Maciej W. Rozycki
7*384740dcSRalf Baechle  *
8*384740dcSRalf Baechle  *	This program is free software; you can redistribute it and/or
9*384740dcSRalf Baechle  *	modify it under the terms of the GNU General Public License
10*384740dcSRalf Baechle  *	as published by the Free Software Foundation; either version
11*384740dcSRalf Baechle  *	2 of the License, or (at your option) any later version.
12*384740dcSRalf Baechle  */
13*384740dcSRalf Baechle #ifndef __ASM_MIPS_DEC_KN02CA_H
14*384740dcSRalf Baechle #define __ASM_MIPS_DEC_KN02CA_H
15*384740dcSRalf Baechle 
16*384740dcSRalf Baechle #include <asm/dec/kn02xa.h>		/* For common definitions. */
17*384740dcSRalf Baechle 
18*384740dcSRalf Baechle /*
19*384740dcSRalf Baechle  * CPU interrupt bits.
20*384740dcSRalf Baechle  */
21*384740dcSRalf Baechle #define KN02CA_CPU_INR_HALT	6	/* HALT from ACCESS.Bus */
22*384740dcSRalf Baechle #define KN02CA_CPU_INR_CASCADE	5	/* I/O ASIC cascade */
23*384740dcSRalf Baechle #define KN02CA_CPU_INR_BUS	4	/* memory, I/O bus read/write errors */
24*384740dcSRalf Baechle #define KN02CA_CPU_INR_RTC	3	/* DS1287 RTC */
25*384740dcSRalf Baechle #define KN02CA_CPU_INR_TIMER	2	/* ARC periodic timer */
26*384740dcSRalf Baechle 
27*384740dcSRalf Baechle /*
28*384740dcSRalf Baechle  * I/O ASIC interrupt bits.  Star marks denote non-IRQ status bits.
29*384740dcSRalf Baechle  */
30*384740dcSRalf Baechle #define KN02CA_IO_INR_FLOPPY	15	/* 82077 FDC */
31*384740dcSRalf Baechle #define KN02CA_IO_INR_NVRAM	14	/* (*) NVRAM clear jumper */
32*384740dcSRalf Baechle #define KN02CA_IO_INR_POWERON	13	/* (*) ACCESS.Bus/power-on reset */
33*384740dcSRalf Baechle #define KN02CA_IO_INR_TC0	12	/* TURBOchannel slot #0 */
34*384740dcSRalf Baechle #define KN02CA_IO_INR_TIMER	12	/* ARC periodic timer (?) */
35*384740dcSRalf Baechle #define KN02CA_IO_INR_ISDN	11	/* Am79C30A ISDN */
36*384740dcSRalf Baechle #define KN02CA_IO_INR_NRMOD	10	/* (*) NRMOD manufacturing jumper */
37*384740dcSRalf Baechle #define KN02CA_IO_INR_ASC	9	/* ASC (NCR53C94) SCSI */
38*384740dcSRalf Baechle #define KN02CA_IO_INR_LANCE	8	/* LANCE (Am7990) Ethernet */
39*384740dcSRalf Baechle #define KN02CA_IO_INR_HDFLOPPY	7	/* (*) HD (1.44MB) floppy status */
40*384740dcSRalf Baechle #define KN02CA_IO_INR_SCC0	6	/* SCC (Z85C30) serial #0 */
41*384740dcSRalf Baechle #define KN02CA_IO_INR_TC1	5	/* TURBOchannel slot #1 */
42*384740dcSRalf Baechle #define KN02CA_IO_INR_XDFLOPPY	4	/* (*) XD (2.88MB) floppy status */
43*384740dcSRalf Baechle #define KN02CA_IO_INR_VIDEO	3	/* framebuffer */
44*384740dcSRalf Baechle #define KN02CA_IO_INR_XVIDEO	2	/* ~framebuffer */
45*384740dcSRalf Baechle #define KN02CA_IO_INR_AB_XMIT	1	/* ACCESS.bus transmit */
46*384740dcSRalf Baechle #define KN02CA_IO_INR_AB_RECV	0	/* ACCESS.bus receive */
47*384740dcSRalf Baechle 
48*384740dcSRalf Baechle 
49*384740dcSRalf Baechle /*
50*384740dcSRalf Baechle  * Memory Error Register bits.
51*384740dcSRalf Baechle  */
52*384740dcSRalf Baechle #define KN02CA_MER_INTR		(1<<27)		/* ARC IRQ status & ack */
53*384740dcSRalf Baechle 
54*384740dcSRalf Baechle /*
55*384740dcSRalf Baechle  * Memory Size Register bits.
56*384740dcSRalf Baechle  */
57*384740dcSRalf Baechle #define KN02CA_MSR_INTREN	(1<<26)		/* ARC periodic IRQ enable */
58*384740dcSRalf Baechle #define KN02CA_MSR_MS10EN	(1<<25)		/* 10/1ms IRQ period select */
59*384740dcSRalf Baechle #define KN02CA_MSR_PFORCE	(0xf<<21)	/* byte lane error force */
60*384740dcSRalf Baechle #define KN02CA_MSR_MABEN	(1<<20)		/* A side VFB address enable */
61*384740dcSRalf Baechle #define KN02CA_MSR_LASTBANK	(0x7<<17)	/* onboard RAM bank # */
62*384740dcSRalf Baechle 
63*384740dcSRalf Baechle /*
64*384740dcSRalf Baechle  * I/O ASIC System Support Register bits.
65*384740dcSRalf Baechle  */
66*384740dcSRalf Baechle #define KN03CA_IO_SSR_RES_14	(1<<14)		/* unused */
67*384740dcSRalf Baechle #define KN03CA_IO_SSR_RES_13	(1<<13)		/* unused */
68*384740dcSRalf Baechle #define KN03CA_IO_SSR_ISDN_RST	(1<<12)		/* ~ISDN (Am79C30A) reset */
69*384740dcSRalf Baechle 
70*384740dcSRalf Baechle #define KN03CA_IO_SSR_FLOPPY_RST (1<<7)		/* ~FDC (82077) reset */
71*384740dcSRalf Baechle #define KN03CA_IO_SSR_VIDEO_RST	(1<<6)		/* ~framebuffer reset */
72*384740dcSRalf Baechle #define KN03CA_IO_SSR_AB_RST	(1<<5)		/* ACCESS.bus reset */
73*384740dcSRalf Baechle #define KN03CA_IO_SSR_RES_4	(1<<4)		/* unused */
74*384740dcSRalf Baechle #define KN03CA_IO_SSR_RES_3	(1<<4)		/* unused */
75*384740dcSRalf Baechle #define KN03CA_IO_SSR_RES_2	(1<<2)		/* unused */
76*384740dcSRalf Baechle #define KN03CA_IO_SSR_RES_1	(1<<1)		/* unused */
77*384740dcSRalf Baechle #define KN03CA_IO_SSR_LED	(1<<0)		/* power LED */
78*384740dcSRalf Baechle 
79*384740dcSRalf Baechle #endif /* __ASM_MIPS_DEC_KN02CA_H */
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