1384740dcSRalf Baechle /* 2384740dcSRalf Baechle * This file is subject to the terms and conditions of the GNU General Public 3384740dcSRalf Baechle * License. See the file COPYING in the main directory of this archive 4384740dcSRalf Baechle * for more details. 5384740dcSRalf Baechle * 6384740dcSRalf Baechle * Copyright (C) 1995, 1996, 2003 by Ralf Baechle 7384740dcSRalf Baechle * Copyright (C) 1995, 1996 Andreas Busse 8384740dcSRalf Baechle * Copyright (C) 1995, 1996 Stoned Elipot 9384740dcSRalf Baechle * Copyright (C) 1995, 1996 Paul M. Antoine. 103209e70eSWu Zhangjin * Copyright (C) 2009 Zhang Le 11384740dcSRalf Baechle */ 12384740dcSRalf Baechle #ifndef _ASM_BOOTINFO_H 13384740dcSRalf Baechle #define _ASM_BOOTINFO_H 14384740dcSRalf Baechle 15384740dcSRalf Baechle #include <linux/types.h> 16384740dcSRalf Baechle #include <asm/setup.h> 17384740dcSRalf Baechle 18384740dcSRalf Baechle /* 19384740dcSRalf Baechle * The MACH_ IDs are sort of equivalent to PCI product IDs. As such the 20384740dcSRalf Baechle * numbers do not necessarily reflect technical relations or similarities 21384740dcSRalf Baechle * between systems. 22384740dcSRalf Baechle */ 23384740dcSRalf Baechle 24384740dcSRalf Baechle /* 25384740dcSRalf Baechle * Valid machtype values for group unknown 26384740dcSRalf Baechle */ 27384740dcSRalf Baechle #define MACH_UNKNOWN 0 /* whatever... */ 28384740dcSRalf Baechle 29384740dcSRalf Baechle /* 30384740dcSRalf Baechle * Valid machtype for group DEC 31384740dcSRalf Baechle */ 32384740dcSRalf Baechle #define MACH_DSUNKNOWN 0 33384740dcSRalf Baechle #define MACH_DS23100 1 /* DECstation 2100 or 3100 */ 34384740dcSRalf Baechle #define MACH_DS5100 2 /* DECsystem 5100 */ 35384740dcSRalf Baechle #define MACH_DS5000_200 3 /* DECstation 5000/200 */ 36384740dcSRalf Baechle #define MACH_DS5000_1XX 4 /* DECstation 5000/120, 125, 133, 150 */ 37384740dcSRalf Baechle #define MACH_DS5000_XX 5 /* DECstation 5000/20, 25, 33, 50 */ 38384740dcSRalf Baechle #define MACH_DS5000_2X0 6 /* DECstation 5000/240, 260 */ 39384740dcSRalf Baechle #define MACH_DS5400 7 /* DECsystem 5400 */ 40384740dcSRalf Baechle #define MACH_DS5500 8 /* DECsystem 5500 */ 41384740dcSRalf Baechle #define MACH_DS5800 9 /* DECsystem 5800 */ 42384740dcSRalf Baechle #define MACH_DS5900 10 /* DECsystem 5900 */ 43384740dcSRalf Baechle 44384740dcSRalf Baechle /* 45384740dcSRalf Baechle * Valid machtype for group PMC-MSP 46384740dcSRalf Baechle */ 47384740dcSRalf Baechle #define MACH_MSP4200_EVAL 0 /* PMC-Sierra MSP4200 Evaluation */ 48384740dcSRalf Baechle #define MACH_MSP4200_GW 1 /* PMC-Sierra MSP4200 Gateway demo */ 49384740dcSRalf Baechle #define MACH_MSP4200_FPGA 2 /* PMC-Sierra MSP4200 Emulation */ 50384740dcSRalf Baechle #define MACH_MSP7120_EVAL 3 /* PMC-Sierra MSP7120 Evaluation */ 51384740dcSRalf Baechle #define MACH_MSP7120_GW 4 /* PMC-Sierra MSP7120 Residential GW */ 52384740dcSRalf Baechle #define MACH_MSP7120_FPGA 5 /* PMC-Sierra MSP7120 Emulation */ 53384740dcSRalf Baechle #define MACH_MSP_OTHER 255 /* PMC-Sierra unknown board type */ 54384740dcSRalf Baechle 55384740dcSRalf Baechle /* 56384740dcSRalf Baechle * Valid machtype for group Mikrotik 57384740dcSRalf Baechle */ 58384740dcSRalf Baechle #define MACH_MIKROTIK_RB532 0 /* Mikrotik RouterBoard 532 */ 59384740dcSRalf Baechle #define MACH_MIKROTIK_RB532A 1 /* Mikrotik RouterBoard 532A */ 60384740dcSRalf Baechle 613209e70eSWu Zhangjin /* 623209e70eSWu Zhangjin * Valid machtype for Loongson family 633209e70eSWu Zhangjin */ 643209e70eSWu Zhangjin #define MACH_LOONGSON_UNKNOWN 0 653209e70eSWu Zhangjin #define MACH_LEMOTE_FL2E 1 663209e70eSWu Zhangjin #define MACH_LEMOTE_FL2F 2 673209e70eSWu Zhangjin #define MACH_LEMOTE_ML2F7 3 683209e70eSWu Zhangjin #define MACH_LEMOTE_YL2F89 4 693209e70eSWu Zhangjin #define MACH_DEXXON_GDIUM2F10 5 70e13fb776SWu Zhangjin #define MACH_LEMOTE_NAS 6 716e552c9bSWu Zhangjin #define MACH_LEMOTE_LL2F 7 726e552c9bSWu Zhangjin #define MACH_LOONGSON_END 8 733209e70eSWu Zhangjin 7483ccf69dSLars-Peter Clausen /* 7583ccf69dSLars-Peter Clausen * Valid machtype for group INGENIC 7683ccf69dSLars-Peter Clausen */ 7783ccf69dSLars-Peter Clausen #define MACH_INGENIC_JZ4730 0 /* JZ4730 SOC */ 7883ccf69dSLars-Peter Clausen #define MACH_INGENIC_JZ4740 1 /* JZ4740 SOC */ 7983ccf69dSLars-Peter Clausen 80384740dcSRalf Baechle extern char *system_type; 81384740dcSRalf Baechle const char *get_system_type(void); 82384740dcSRalf Baechle 83384740dcSRalf Baechle extern unsigned long mips_machtype; 84384740dcSRalf Baechle 85384740dcSRalf Baechle #define BOOT_MEM_MAP_MAX 32 86384740dcSRalf Baechle #define BOOT_MEM_RAM 1 87384740dcSRalf Baechle #define BOOT_MEM_ROM_DATA 2 88384740dcSRalf Baechle #define BOOT_MEM_RESERVED 3 8943064c0cSDavid Daney #define BOOT_MEM_INIT_RAM 4 90384740dcSRalf Baechle 91384740dcSRalf Baechle /* 92384740dcSRalf Baechle * A memory map that's built upon what was determined 93384740dcSRalf Baechle * or specified on the command line. 94384740dcSRalf Baechle */ 95384740dcSRalf Baechle struct boot_mem_map { 96384740dcSRalf Baechle int nr_map; 97384740dcSRalf Baechle struct boot_mem_map_entry { 98384740dcSRalf Baechle phys_t addr; /* start of memory segment */ 99384740dcSRalf Baechle phys_t size; /* size of memory segment */ 100384740dcSRalf Baechle long type; /* type of memory segment */ 101384740dcSRalf Baechle } map[BOOT_MEM_MAP_MAX]; 102384740dcSRalf Baechle }; 103384740dcSRalf Baechle 104384740dcSRalf Baechle extern struct boot_mem_map boot_mem_map; 105384740dcSRalf Baechle 106384740dcSRalf Baechle extern void add_memory_region(phys_t start, phys_t size, long type); 1074d9f77d2SJohn Crispin extern void detect_memory_region(phys_t start, phys_t sz_min, phys_t sz_max); 108384740dcSRalf Baechle 109384740dcSRalf Baechle extern void prom_init(void); 110384740dcSRalf Baechle extern void prom_free_prom_memory(void); 111384740dcSRalf Baechle 112384740dcSRalf Baechle extern void free_init_pages(const char *what, 113384740dcSRalf Baechle unsigned long begin, unsigned long end); 114384740dcSRalf Baechle 115*0893d3fbSMarkos Chandras extern void (*free_init_pages_eva)(void *begin, void *end); 116*0893d3fbSMarkos Chandras 117384740dcSRalf Baechle /* 118384740dcSRalf Baechle * Initial kernel command line, usually setup by prom_init() 119384740dcSRalf Baechle */ 1207580c9c3SDmitri Vorobiev extern char arcs_cmdline[COMMAND_LINE_SIZE]; 121384740dcSRalf Baechle 122384740dcSRalf Baechle /* 123384740dcSRalf Baechle * Registers a0, a1, a3 and a4 as passed to the kernel entry by firmware 124384740dcSRalf Baechle */ 125384740dcSRalf Baechle extern unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3; 126384740dcSRalf Baechle 127384740dcSRalf Baechle /* 128384740dcSRalf Baechle * Platform memory detection hook called by setup_arch 129384740dcSRalf Baechle */ 130384740dcSRalf Baechle extern void plat_mem_setup(void); 131384740dcSRalf Baechle 132ee71b7d2SDavid Daney #ifdef CONFIG_SWIOTLB 133ee71b7d2SDavid Daney /* 134ee71b7d2SDavid Daney * Optional platform hook to call swiotlb_setup(). 135ee71b7d2SDavid Daney */ 136ee71b7d2SDavid Daney extern void plat_swiotlb_setup(void); 137ee71b7d2SDavid Daney 138ee71b7d2SDavid Daney #else 139ee71b7d2SDavid Daney 140ee71b7d2SDavid Daney static inline void plat_swiotlb_setup(void) {} 141ee71b7d2SDavid Daney 142ee71b7d2SDavid Daney #endif /* CONFIG_SWIOTLB */ 143ee71b7d2SDavid Daney 144384740dcSRalf Baechle #endif /* _ASM_BOOTINFO_H */ 145