xref: /linux/arch/mips/boot/dts/realtek/rtl930x.dtsi (revision 7f71507851fc7764b36a3221839607d3a45c2025)
1// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
2
3#include "rtl83xx.dtsi"
4
5/ {
6	compatible = "realtek,rtl9302-soc";
7
8	cpus {
9		#address-cells = <1>;
10		#size-cells = <0>;
11
12		cpu@0 {
13			device_type = "cpu";
14			compatible = "mips,mips34Kc";
15			reg = <0>;
16			clocks = <&baseclk 0>;
17			clock-names = "cpu";
18		};
19	};
20
21	baseclk: clock-800mhz {
22		compatible = "fixed-clock";
23		#clock-cells = <0>;
24		clock-frequency = <800000000>;
25	};
26
27	lx_clk: clock-175mhz {
28		compatible = "fixed-clock";
29		#clock-cells = <0>;
30		clock-frequency  = <175000000>;
31	};
32
33	switch0: switch@1b000000 {
34		compatible = "realtek,rtl9301-switch", "syscon", "simple-mfd";
35		reg = <0x1b000000 0x10000>;
36		#address-cells = <1>;
37		#size-cells = <1>;
38
39		reboot@c {
40			compatible = "syscon-reboot";
41			reg = <0x0c 0x4>;
42			value = <0x01>;
43		};
44
45		i2c0: i2c@36c {
46			compatible = "realtek,rtl9301-i2c";
47			reg = <0x36c 0x14>;
48			#address-cells = <1>;
49			#size-cells = <0>;
50			status = "disabled";
51		};
52
53		i2c1: i2c@388 {
54			compatible = "realtek,rtl9301-i2c";
55			reg = <0x388 0x14>;
56			#address-cells = <1>;
57			#size-cells = <0>;
58			status = "disabled";
59		};
60	};
61};
62
63&soc {
64	ranges = <0x0 0x18000000 0x20000>;
65
66	intc: interrupt-controller@3000 {
67		compatible = "realtek,rtl9300-intc", "realtek,rtl-intc";
68		reg = <0x3000 0x18>, <0x3018 0x18>;
69		interrupt-controller;
70		#interrupt-cells = <1>;
71
72		interrupt-parent = <&cpuintc>;
73		interrupts = <2>, <3>, <4>, <5>, <6>, <7>;
74	};
75
76	spi0: spi@1200 {
77		compatible = "realtek,rtl8380-spi";
78		reg = <0x1200 0x100>;
79
80		#address-cells = <1>;
81		#size-cells = <0>;
82	};
83
84	timer0: timer@3200 {
85		compatible = "realtek,rtl9302-timer", "realtek,otto-timer";
86		reg = <0x3200 0x10>, <0x3210 0x10>, <0x3220 0x10>,
87		    <0x3230 0x10>, <0x3240 0x10>;
88
89		interrupt-parent = <&intc>;
90		interrupts = <7>, <8>, <9>, <10>, <11>;
91		clocks = <&lx_clk>;
92	};
93
94	snand: spi@1a400 {
95		compatible = "realtek,rtl9301-snand";
96		reg = <0x1a400 0x44>;
97		interrupt-parent = <&intc>;
98		interrupts = <19>;
99		clocks = <&lx_clk>;
100		#address-cells = <1>;
101		#size-cells = <0>;
102		status = "disabled";
103	};
104};
105
106&uart0 {
107	/delete-property/ clock-frequency;
108	clocks = <&lx_clk>;
109
110	interrupt-parent = <&intc>;
111	interrupts = <30>;
112};
113
114&uart1 {
115	/delete-property/ clock-frequency;
116	clocks = <&lx_clk>;
117
118	interrupt-parent = <&intc>;
119	interrupts = <31>;
120};
121
122