1// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause 2 3/ { 4 #address-cells = <1>; 5 #size-cells = <1>; 6 7 aliases { 8 serial0 = &uart0; 9 serial1 = &uart1; 10 }; 11 12 cpus { 13 #address-cells = <1>; 14 #size-cells = <0>; 15 16 cpu@0 { 17 device_type = "cpu"; 18 compatible = "mips,mips4KEc"; 19 reg = <0>; 20 clocks = <&baseclk>; 21 }; 22 }; 23 24 baseclk: baseclk { 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; 27 clock-frequency = <500000000>; 28 }; 29 30 cpuintc: cpuintc { 31 compatible = "mti,cpu-interrupt-controller"; 32 #address-cells = <0>; 33 #interrupt-cells = <1>; 34 interrupt-controller; 35 }; 36 37 soc@18000000 { 38 compatible = "simple-bus"; 39 #address-cells = <1>; 40 #size-cells = <1>; 41 ranges = <0x0 0x18000000 0x10000>; 42 43 uart0: serial@2000 { 44 compatible = "ns16550a"; 45 reg = <0x2000 0x100>; 46 47 clock-frequency = <200000000>; 48 49 interrupt-parent = <&intc>; 50 interrupts = <31>; 51 52 reg-io-width = <1>; 53 reg-shift = <2>; 54 fifo-size = <1>; 55 no-loopback-test; 56 57 status = "disabled"; 58 }; 59 60 uart1: serial@2100 { 61 compatible = "ns16550a"; 62 reg = <0x2100 0x100>; 63 64 clock-frequency = <200000000>; 65 66 interrupt-parent = <&intc>; 67 interrupts = <30>; 68 69 reg-io-width = <1>; 70 reg-shift = <2>; 71 fifo-size = <1>; 72 no-loopback-test; 73 74 status = "disabled"; 75 }; 76 77 intc: interrupt-controller@3000 { 78 compatible = "realtek,rtl8380-intc", "realtek,rtl-intc"; 79 reg = <0x3000 0x20>; 80 interrupt-controller; 81 #interrupt-cells = <1>; 82 83 interrupt-parent = <&cpuintc>; 84 interrupts = <2>, <3>, <4>, <5>, <6>; 85 }; 86 }; 87}; 88