xref: /linux/arch/mips/boot/dts/mscc/ocelot_pcb123.dts (revision 31d1b7710262fba12282b24083f20dc76e0efc93)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/* Copyright (c) 2017 Microsemi Corporation */
3
4/dts-v1/;
5
6#include "ocelot.dtsi"
7
8/ {
9	compatible = "mscc,ocelot-pcb123", "mscc,ocelot";
10
11	chosen {
12		stdout-path = "serial0:115200n8";
13	};
14
15	memory@0 {
16		device_type = "memory";
17		reg = <0x0 0x0e000000>;
18	};
19};
20
21&uart0 {
22	status = "okay";
23};
24
25&uart2 {
26	status = "okay";
27};
28
29&spi {
30	status = "okay";
31
32	flash@0 {
33		compatible = "macronix,mx25l25635f", "jedec,spi-nor";
34		spi-max-frequency = <20000000>;
35		reg = <0>;
36	};
37};
38
39&i2c {
40	clock-frequency = <100000>;
41	i2c-sda-hold-time-ns = <300>;
42	status = "okay";
43};
44
45&mdio0 {
46	status = "okay";
47};
48
49&port0 {
50	phy-handle = <&phy0>;
51};
52
53&port1 {
54	phy-handle = <&phy1>;
55};
56
57&port2 {
58	phy-handle = <&phy2>;
59};
60
61&port3 {
62	phy-handle = <&phy3>;
63};
64