xref: /linux/arch/mips/boot/dts/mscc/jaguar2_pcb111.dts (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1f84778f7SGregory CLEMENT// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2f84778f7SGregory CLEMENT/*
3f84778f7SGregory CLEMENT * Copyright (c) 2018 Microsemi Corporation
4f84778f7SGregory CLEMENT */
5f84778f7SGregory CLEMENT
6f84778f7SGregory CLEMENT/dts-v1/;
7f84778f7SGregory CLEMENT#include "jaguar2_common.dtsi"
8f84778f7SGregory CLEMENT
9f84778f7SGregory CLEMENT/ {
10f84778f7SGregory CLEMENT	model = "Jaguar2 Cu48 PCB111 Reference Board";
11f84778f7SGregory CLEMENT	compatible = "mscc,jr2-pcb111", "mscc,jr2";
12f84778f7SGregory CLEMENT
13f84778f7SGregory CLEMENT	aliases {
14f84778f7SGregory CLEMENT		i2c0    = &i2c0;
15f84778f7SGregory CLEMENT		i2c149  = &i2c149;
16f84778f7SGregory CLEMENT		i2c150  = &i2c150;
17f84778f7SGregory CLEMENT		i2c151  = &i2c151;
18f84778f7SGregory CLEMENT		i2c152  = &i2c152;
19f84778f7SGregory CLEMENT		i2c203  = &i2c203;
20f84778f7SGregory CLEMENT	};
21f84778f7SGregory CLEMENT
22f84778f7SGregory CLEMENT	i2c0_imux: i2c0-imux {
23f84778f7SGregory CLEMENT		compatible = "i2c-mux-pinctrl";
24f84778f7SGregory CLEMENT		#address-cells = <1>;
25f84778f7SGregory CLEMENT		#size-cells = <0>;
26f84778f7SGregory CLEMENT		i2c-parent = <&i2c0>;
27f84778f7SGregory CLEMENT		pinctrl-names =
28f84778f7SGregory CLEMENT			"i2c149", "i2c150", "i2c151", "i2c152", "i2c203", "idle";
29f84778f7SGregory CLEMENT		pinctrl-0 = <&i2cmux_0>;
30f84778f7SGregory CLEMENT		pinctrl-1 = <&i2cmux_1>;
31f84778f7SGregory CLEMENT		pinctrl-2 = <&i2cmux_2>;
32f84778f7SGregory CLEMENT		pinctrl-3 = <&i2cmux_3>;
33f84778f7SGregory CLEMENT		pinctrl-4 = <&i2cmux_pins_i>; // Added by convention for PoE
34f84778f7SGregory CLEMENT		pinctrl-5 = <&i2cmux_pins_i>;
35f84778f7SGregory CLEMENT		i2c149: i2c@0 {
36f84778f7SGregory CLEMENT			reg = <0x0>;
37f84778f7SGregory CLEMENT			#address-cells = <1>;
38f84778f7SGregory CLEMENT			#size-cells = <0>;
39f84778f7SGregory CLEMENT		};
40f84778f7SGregory CLEMENT		i2c150: i2c@1 {
41f84778f7SGregory CLEMENT			reg = <0x1>;
42f84778f7SGregory CLEMENT			#address-cells = <1>;
43f84778f7SGregory CLEMENT			#size-cells = <0>;
44f84778f7SGregory CLEMENT		};
45f84778f7SGregory CLEMENT		i2c151: i2c@2 {
46f84778f7SGregory CLEMENT			reg = <0x2>;
47f84778f7SGregory CLEMENT			#address-cells = <1>;
48f84778f7SGregory CLEMENT			#size-cells = <0>;
49f84778f7SGregory CLEMENT		};
50f84778f7SGregory CLEMENT		i2c152: i2c@3 {
51f84778f7SGregory CLEMENT			reg = <0x3>;
52f84778f7SGregory CLEMENT			#address-cells = <1>;
53f84778f7SGregory CLEMENT			#size-cells = <0>;
54f84778f7SGregory CLEMENT		};
55f84778f7SGregory CLEMENT		i2c203: i2c@4 {
56f84778f7SGregory CLEMENT			reg = <0x4>;
57f84778f7SGregory CLEMENT			#address-cells = <1>;
58f84778f7SGregory CLEMENT			#size-cells = <0>;
59f84778f7SGregory CLEMENT		};
60f84778f7SGregory CLEMENT	};
61f84778f7SGregory CLEMENT};
62f84778f7SGregory CLEMENT
63f84778f7SGregory CLEMENT&gpio {
64f84778f7SGregory CLEMENT	synce_builtin_pins: synce-builtin-pins {
65f84778f7SGregory CLEMENT		// GPIO 49 == SI_nCS13
66f84778f7SGregory CLEMENT		pins = "GPIO_49";
67f84778f7SGregory CLEMENT		function = "si";
68f84778f7SGregory CLEMENT	};
69f84778f7SGregory CLEMENT	cpld_pins: cpld-pins {
70f84778f7SGregory CLEMENT		// GPIO 50 == SI_nCS14
71f84778f7SGregory CLEMENT		pins = "GPIO_50";
72f84778f7SGregory CLEMENT		function = "si";
73f84778f7SGregory CLEMENT	};
74f84778f7SGregory CLEMENT	cpld_fifo_pins: synce-builtin-pins {
75f84778f7SGregory CLEMENT		// GPIO 51 == SI_nCS15
76f84778f7SGregory CLEMENT		pins = "GPIO_51";
77f84778f7SGregory CLEMENT		function = "si";
78f84778f7SGregory CLEMENT	};
79f84778f7SGregory CLEMENT};
80f84778f7SGregory CLEMENT
81f84778f7SGregory CLEMENT&gpio {
82*3949aaa6SMichael Walle	i2cmux_pins_i: i2cmux-pins {
83f84778f7SGregory CLEMENT		pins = "GPIO_17", "GPIO_18";
84f84778f7SGregory CLEMENT		function = "twi_scl_m";
85f84778f7SGregory CLEMENT		output-low;
86f84778f7SGregory CLEMENT	};
87*3949aaa6SMichael Walle	i2cmux_0: i2cmux-0-pins {
88f84778f7SGregory CLEMENT		pins = "GPIO_17";
89f84778f7SGregory CLEMENT		function = "twi_scl_m";
90f84778f7SGregory CLEMENT		output-high;
91f84778f7SGregory CLEMENT	};
92*3949aaa6SMichael Walle	i2cmux_1: i2cmux-1-pins {
93f84778f7SGregory CLEMENT		pins = "GPIO_18";
94f84778f7SGregory CLEMENT		function = "twi_scl_m";
95f84778f7SGregory CLEMENT		output-high;
96f84778f7SGregory CLEMENT	};
97*3949aaa6SMichael Walle	i2cmux_2: i2cmux-2-pins {
98f84778f7SGregory CLEMENT		pins = "GPIO_20";
99f84778f7SGregory CLEMENT		function = "twi_scl_m";
100f84778f7SGregory CLEMENT		output-high;
101f84778f7SGregory CLEMENT	};
102*3949aaa6SMichael Walle	i2cmux_3: i2cmux-3-pins {
103f84778f7SGregory CLEMENT		pins = "GPIO_21";
104f84778f7SGregory CLEMENT		function = "twi_scl_m";
105f84778f7SGregory CLEMENT		output-high;
106f84778f7SGregory CLEMENT	};
107f84778f7SGregory CLEMENT};
108