xref: /linux/arch/mips/boot/dts/loongson/ls7a-pch.dtsi (revision ec16a3cdf37e507013062f9c4a2067eacdd12b62)
1// SPDX-License-Identifier: GPL-2.0
2
3/ {
4	pch: bus@10000000 {
5		compatible = "simple-bus";
6		#address-cells = <2>;
7		#size-cells = <2>;
8		ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9				0 0x20000000 0 0x20000000 0 0x10000000
10				0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
11				0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
12
13		pic: interrupt-controller@10000000 {
14			compatible = "loongson,pch-pic-1.0";
15			reg = <0 0x10000000 0 0x400>;
16			interrupt-controller;
17			interrupt-parent = <&htvec>;
18			loongson,pic-base-vec = <0>;
19			#interrupt-cells = <2>;
20		};
21
22		rtc0: rtc@100d0100 {
23			compatible = "loongson,ls7a-rtc";
24			reg = <0 0x100d0100 0 0x78>;
25			interrupt-parent = <&pic>;
26			interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
27		};
28
29		ls7a_uart0: serial@10080000 {
30			compatible = "ns16550a";
31			reg = <0 0x10080000 0 0x100>;
32			clock-frequency = <50000000>;
33			interrupt-parent = <&pic>;
34			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
35			no-loopback-test;
36		};
37
38		ls7a_uart1: serial@10080100 {
39			status = "disabled";
40			compatible = "ns16550a";
41			reg = <0 0x10080100 0 0x100>;
42			clock-frequency = <50000000>;
43			interrupt-parent = <&pic>;
44			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
45			no-loopback-test;
46		};
47
48		ls7a_uart2: serial@10080200 {
49			status = "disabled";
50			compatible = "ns16550a";
51			reg = <0 0x10080200 0 0x100>;
52			clock-frequency = <50000000>;
53			interrupt-parent = <&pic>;
54			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
55			no-loopback-test;
56		};
57
58		ls7a_uart3: serial@10080300 {
59			status = "disabled";
60			compatible = "ns16550a";
61			reg = <0 0x10080300 0 0x100>;
62			clock-frequency = <50000000>;
63			interrupt-parent = <&pic>;
64			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
65			no-loopback-test;
66		};
67
68		pci@1a000000 {
69			compatible = "loongson,ls7a-pci";
70			device_type = "pci";
71			#address-cells = <3>;
72			#size-cells = <2>;
73			msi-parent = <&msi>;
74
75			reg = <0 0x1a000000 0 0x02000000>,
76				<0xefe 0x00000000 0 0x20000000>;
77
78			ranges = <0x01000000 0x0 0x00020000 0x0 0x18020000 0x0 0x00020000>,
79				 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
80
81			ohci@4,0 {
82				compatible = "pci0014,7a24.0",
83						   "pci0014,7a24",
84						   "pciclass0c0310",
85						   "pciclass0c03";
86
87				reg = <0x2000 0x0 0x0 0x0 0x0>;
88				interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
89				interrupt-parent = <&pic>;
90			};
91
92			ehci@4,1 {
93				compatible = "pci0014,7a14.0",
94						   "pci0014,7a14",
95						   "pciclass0c0320",
96						   "pciclass0c03";
97
98				reg = <0x2100 0x0 0x0 0x0 0x0>;
99				interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
100				interrupt-parent = <&pic>;
101			};
102
103			ohci@5,0 {
104				compatible = "pci0014,7a24.0",
105						   "pci0014,7a24",
106						   "pciclass0c0310",
107						   "pciclass0c03";
108
109				reg = <0x2800 0x0 0x0 0x0 0x0>;
110				interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
111				interrupt-parent = <&pic>;
112			};
113
114			ehci@5,1 {
115				compatible = "pci0014,7a14.0",
116						   "pci0014,7a14",
117						   "pciclass0c0320",
118						   "pciclass0c03";
119
120				reg = <0x2900 0x0 0x0 0x0 0x0>;
121				interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
122				interrupt-parent = <&pic>;
123			};
124
125			sata@8,0 {
126				compatible = "pci0014,7a08.0",
127						   "pci0014,7a08",
128						   "pciclass010601",
129						   "pciclass0106";
130
131				reg = <0x4000 0x0 0x0 0x0 0x0>;
132				interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
133				interrupt-parent = <&pic>;
134			};
135
136			sata@8,1 {
137				compatible = "pci0014,7a08.0",
138						   "pci0014,7a08",
139						   "pciclass010601",
140						   "pciclass0106";
141
142				reg = <0x4100 0x0 0x0 0x0 0x0>;
143				interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
144				interrupt-parent = <&pic>;
145			};
146
147			sata@8,2 {
148				compatible = "pci0014,7a08.0",
149						   "pci0014,7a08",
150						   "pciclass010601",
151						   "pciclass0106";
152
153				reg = <0x4200 0x0 0x0 0x0 0x0>;
154				interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
155				interrupt-parent = <&pic>;
156			};
157
158			gpu@6,0 {
159				compatible = "pci0014,7a15.0",
160						   "pci0014,7a15",
161						   "pciclass030200",
162						   "pciclass0302";
163
164				reg = <0x3000 0x0 0x0 0x0 0x0>;
165				interrupts = <29 IRQ_TYPE_LEVEL_HIGH>;
166				interrupt-parent = <&pic>;
167			};
168
169			dc@6,1 {
170				compatible = "pci0014,7a06.0",
171						   "pci0014,7a06",
172						   "pciclass030000",
173						   "pciclass0300";
174
175				reg = <0x3100 0x0 0x0 0x0 0x0>;
176				interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
177				interrupt-parent = <&pic>;
178			};
179
180			hda@7,0 {
181				compatible = "pci0014,7a07.0",
182						   "pci0014,7a07",
183						   "pciclass040300",
184						   "pciclass0403";
185
186				reg = <0x3800 0x0 0x0 0x0 0x0>;
187				interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
188				interrupt-parent = <&pic>;
189			};
190
191			gmac@3,0 {
192				compatible = "pci0014,7a03.0",
193						   "pci0014,7a03",
194						   "pciclass020000",
195						   "pciclass0200";
196
197				reg = <0x1800 0x0 0x0 0x0 0x0>;
198				interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
199					     <13 IRQ_TYPE_LEVEL_HIGH>;
200				interrupt-names = "macirq", "eth_lpi";
201				interrupt-parent = <&pic>;
202				phy-mode = "rgmii";
203				mdio {
204					#address-cells = <1>;
205					#size-cells = <0>;
206					compatible = "snps,dwmac-mdio";
207					phy0: ethernet-phy@0 {
208						reg = <0>;
209					};
210				};
211			};
212
213			gmac@3,1 {
214				compatible = "pci0014,7a03.0",
215						   "pci0014,7a03",
216						   "pciclass020000",
217						   "pciclass0200",
218						   "loongson, pci-gmac";
219
220				reg = <0x1900 0x0 0x0 0x0 0x0>;
221				interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
222					     <15 IRQ_TYPE_LEVEL_HIGH>;
223				interrupt-names = "macirq", "eth_lpi";
224				interrupt-parent = <&pic>;
225				phy-mode = "rgmii";
226				mdio {
227					#address-cells = <1>;
228					#size-cells = <0>;
229					compatible = "snps,dwmac-mdio";
230					phy1: ethernet-phy@1 {
231						reg = <0>;
232					};
233				};
234			};
235
236			pcie@9,0 {
237				compatible = "pci0014,7a19.1",
238						   "pci0014,7a19",
239						   "pciclass060400",
240						   "pciclass0604";
241
242				reg = <0x4800 0x0 0x0 0x0 0x0>;
243				interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;
244				interrupt-parent = <&pic>;
245
246				#address-cells = <3>;
247				#size-cells = <2>;
248				device_type = "pci";
249				#interrupt-cells = <1>;
250				interrupt-map-mask = <0 0 0 0>;
251				interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
252				ranges;
253			};
254
255			pcie@a,0 {
256				compatible = "pci0014,7a09.1",
257						   "pci0014,7a09",
258						   "pciclass060400",
259						   "pciclass0604";
260
261				reg = <0x5000 0x0 0x0 0x0 0x0>;
262				interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;
263				interrupt-parent = <&pic>;
264
265				#address-cells = <3>;
266				#size-cells = <2>;
267				device_type = "pci";
268				#interrupt-cells = <1>;
269				interrupt-map-mask = <0 0 0 0>;
270				interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
271				ranges;
272			};
273
274			pcie@b,0 {
275				compatible = "pci0014,7a09.1",
276						   "pci0014,7a09",
277						   "pciclass060400",
278						   "pciclass0604";
279
280				reg = <0x5800 0x0 0x0 0x0 0x0>;
281				interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
282				interrupt-parent = <&pic>;
283
284				#address-cells = <3>;
285				#size-cells = <2>;
286				device_type = "pci";
287				#interrupt-cells = <1>;
288				interrupt-map-mask = <0 0 0 0>;
289				interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
290				ranges;
291			};
292
293			pcie@c,0 {
294				compatible = "pci0014,7a09.1",
295						   "pci0014,7a09",
296						   "pciclass060400",
297						   "pciclass0604";
298
299				reg = <0x6000 0x0 0x0 0x0 0x0>;
300				interrupts = <35 IRQ_TYPE_LEVEL_HIGH>;
301				interrupt-parent = <&pic>;
302
303				#address-cells = <3>;
304				#size-cells = <2>;
305				device_type = "pci";
306				#interrupt-cells = <1>;
307				interrupt-map-mask = <0 0 0 0>;
308				interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
309				ranges;
310			};
311
312			pcie@d,0 {
313				compatible = "pci0014,7a19.1",
314						   "pci0014,7a19",
315						   "pciclass060400",
316						   "pciclass0604";
317
318				reg = <0x6800 0x0 0x0 0x0 0x0>;
319				interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
320				interrupt-parent = <&pic>;
321
322				#address-cells = <3>;
323				#size-cells = <2>;
324				device_type = "pci";
325				#interrupt-cells = <1>;
326				interrupt-map-mask = <0 0 0 0>;
327				interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
328				ranges;
329			};
330
331			pcie@e,0 {
332				compatible = "pci0014,7a09.1",
333						   "pci0014,7a09",
334						   "pciclass060400",
335						   "pciclass0604";
336
337				reg = <0x7000 0x0 0x0 0x0 0x0>;
338				interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
339				interrupt-parent = <&pic>;
340
341				#address-cells = <3>;
342				#size-cells = <2>;
343				device_type = "pci";
344				#interrupt-cells = <1>;
345				interrupt-map-mask = <0 0 0 0>;
346				interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
347				ranges;
348			};
349
350			pcie@f,0 {
351				compatible = "pci0014,7a29.1",
352						   "pci0014,7a29",
353						   "pciclass060400",
354						   "pciclass0604";
355
356				reg = <0x7800 0x0 0x0 0x0 0x0>;
357				interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
358				interrupt-parent = <&pic>;
359
360				#address-cells = <3>;
361				#size-cells = <2>;
362				device_type = "pci";
363				#interrupt-cells = <1>;
364				interrupt-map-mask = <0 0 0 0>;
365				interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
366				ranges;
367			};
368
369			pcie@10,0 {
370				compatible = "pci0014,7a19.1",
371						   "pci0014,7a19",
372						   "pciclass060400",
373						   "pciclass0604";
374
375				reg = <0x8000 0x0 0x0 0x0 0x0>;
376				interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
377				interrupt-parent = <&pic>;
378
379				#address-cells = <3>;
380				#size-cells = <2>;
381				device_type = "pci";
382				#interrupt-cells = <1>;
383				interrupt-map-mask = <0 0 0 0>;
384				interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;
385				ranges;
386			};
387
388			pcie@11,0 {
389				compatible = "pci0014,7a29.1",
390						   "pci0014,7a29",
391						   "pciclass060400",
392						   "pciclass0604";
393
394				reg = <0x8800 0x0 0x0 0x0 0x0>;
395				interrupts = <42 IRQ_TYPE_LEVEL_HIGH>;
396				interrupt-parent = <&pic>;
397
398				#address-cells = <3>;
399				#size-cells = <2>;
400				device_type = "pci";
401				#interrupt-cells = <1>;
402				interrupt-map-mask = <0 0 0 0>;
403				interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;
404				ranges;
405			};
406
407			pcie@12,0 {
408				compatible = "pci0014,7a19.1",
409						   "pci0014,7a19",
410						   "pciclass060400",
411						   "pciclass0604";
412
413				reg = <0x9000 0x0 0x0 0x0 0x0>;
414				interrupts = <43 IRQ_TYPE_LEVEL_HIGH>;
415				interrupt-parent = <&pic>;
416
417				#address-cells = <3>;
418				#size-cells = <2>;
419				device_type = "pci";
420				#interrupt-cells = <1>;
421				interrupt-map-mask = <0 0 0 0>;
422				interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;
423				ranges;
424			};
425
426			pcie@13,0 {
427				compatible = "pci0014,7a29.1",
428						   "pci0014,7a29",
429						   "pciclass060400",
430						   "pciclass0604";
431
432				reg = <0x9800 0x0 0x0 0x0 0x0>;
433				interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
434				interrupt-parent = <&pic>;
435
436				#address-cells = <3>;
437				#size-cells = <2>;
438				device_type = "pci";
439				#interrupt-cells = <1>;
440				interrupt-map-mask = <0 0 0 0>;
441				interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;
442				ranges;
443			};
444
445			pcie@14,0 {
446				compatible = "pci0014,7a19.1",
447						   "pci0014,7a19",
448						   "pciclass060400",
449						   "pciclass0604";
450
451				reg = <0xa000 0x0 0x0 0x0 0x0>;
452				interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
453				interrupt-parent = <&pic>;
454
455				#address-cells = <3>;
456				#size-cells = <2>;
457				device_type = "pci";
458				#interrupt-cells = <1>;
459				interrupt-map-mask = <0 0 0 0>;
460				interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
461				ranges;
462			};
463		};
464
465		isa@18000000 {
466			compatible = "isa";
467			#address-cells = <2>;
468			#size-cells = <1>;
469			ranges = <1 0 0 0x18000000 0x20000>;
470		};
471	};
472};
473