xref: /linux/arch/mips/boot/dts/loongson/ls7a-pch.dtsi (revision 9f771739a04919226081a107167596de75108fbb) 
1// SPDX-License-Identifier: GPL-2.0
2
3/ {
4	pch: bus@10000000 {
5		compatible = "simple-bus";
6		#address-cells = <2>;
7		#size-cells = <2>;
8		ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9				0 0x20000000 0 0x20000000 0 0x10000000
10				0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
11				0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
12
13		pic: interrupt-controller@10000000 {
14			compatible = "loongson,pch-pic-1.0";
15			reg = <0 0x10000000 0 0x400>;
16			interrupt-controller;
17			interrupt-parent = <&htvec>;
18			loongson,pic-base-vec = <0>;
19			#interrupt-cells = <2>;
20		};
21
22		rtc0: rtc@100d0100 {
23			compatible = "loongson,ls7a-rtc";
24			reg = <0 0x100d0100 0 0x78>;
25			interrupt-parent = <&pic>;
26			interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
27		};
28
29		ls7a_uart0: serial@10080000 {
30			compatible = "ns16550a";
31			reg = <0 0x10080000 0 0x100>;
32			clock-frequency = <50000000>;
33			interrupt-parent = <&pic>;
34			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
35			no-loopback-test;
36		};
37
38		ls7a_uart1: serial@10080100 {
39			status = "disabled";
40			compatible = "ns16550a";
41			reg = <0 0x10080100 0 0x100>;
42			clock-frequency = <50000000>;
43			interrupt-parent = <&pic>;
44			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
45			no-loopback-test;
46		};
47
48		ls7a_uart2: serial@10080200 {
49			status = "disabled";
50			compatible = "ns16550a";
51			reg = <0 0x10080200 0 0x100>;
52			clock-frequency = <50000000>;
53			interrupt-parent = <&pic>;
54			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
55			no-loopback-test;
56		};
57
58		ls7a_uart3: serial@10080300 {
59			status = "disabled";
60			compatible = "ns16550a";
61			reg = <0 0x10080300 0 0x100>;
62			clock-frequency = <50000000>;
63			interrupt-parent = <&pic>;
64			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
65			no-loopback-test;
66		};
67
68		pci@1a000000 {
69			compatible = "loongson,ls7a-pci";
70			device_type = "pci";
71			#address-cells = <3>;
72			#size-cells = <2>;
73			#interrupt-cells = <2>;
74			msi-parent = <&msi>;
75
76			reg = <0 0x1a000000 0 0x02000000>,
77				<0xefe 0x00000000 0 0x20000000>;
78
79			ranges = <0x01000000 0x0 0x00020000 0x0 0x18020000 0x0 0x00020000>,
80				 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
81
82			ohci@4,0 {
83				compatible = "pci0014,7a24.0",
84						   "pci0014,7a24",
85						   "pciclass0c0310",
86						   "pciclass0c03";
87
88				reg = <0x2000 0x0 0x0 0x0 0x0>;
89				interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
90				interrupt-parent = <&pic>;
91			};
92
93			ehci@4,1 {
94				compatible = "pci0014,7a14.0",
95						   "pci0014,7a14",
96						   "pciclass0c0320",
97						   "pciclass0c03";
98
99				reg = <0x2100 0x0 0x0 0x0 0x0>;
100				interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
101				interrupt-parent = <&pic>;
102			};
103
104			ohci@5,0 {
105				compatible = "pci0014,7a24.0",
106						   "pci0014,7a24",
107						   "pciclass0c0310",
108						   "pciclass0c03";
109
110				reg = <0x2800 0x0 0x0 0x0 0x0>;
111				interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
112				interrupt-parent = <&pic>;
113			};
114
115			ehci@5,1 {
116				compatible = "pci0014,7a14.0",
117						   "pci0014,7a14",
118						   "pciclass0c0320",
119						   "pciclass0c03";
120
121				reg = <0x2900 0x0 0x0 0x0 0x0>;
122				interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
123				interrupt-parent = <&pic>;
124			};
125
126			sata@8,0 {
127				compatible = "pci0014,7a08.0",
128						   "pci0014,7a08",
129						   "pciclass010601",
130						   "pciclass0106";
131
132				reg = <0x4000 0x0 0x0 0x0 0x0>;
133				interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
134				interrupt-parent = <&pic>;
135			};
136
137			sata@8,1 {
138				compatible = "pci0014,7a08.0",
139						   "pci0014,7a08",
140						   "pciclass010601",
141						   "pciclass0106";
142
143				reg = <0x4100 0x0 0x0 0x0 0x0>;
144				interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
145				interrupt-parent = <&pic>;
146			};
147
148			sata@8,2 {
149				compatible = "pci0014,7a08.0",
150						   "pci0014,7a08",
151						   "pciclass010601",
152						   "pciclass0106";
153
154				reg = <0x4200 0x0 0x0 0x0 0x0>;
155				interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
156				interrupt-parent = <&pic>;
157			};
158
159			gpu@6,0 {
160				compatible = "pci0014,7a15.0",
161						   "pci0014,7a15",
162						   "pciclass030200",
163						   "pciclass0302";
164
165				reg = <0x3000 0x0 0x0 0x0 0x0>;
166				interrupts = <29 IRQ_TYPE_LEVEL_HIGH>;
167				interrupt-parent = <&pic>;
168			};
169
170			dc@6,1 {
171				compatible = "pci0014,7a06.0",
172						   "pci0014,7a06",
173						   "pciclass030000",
174						   "pciclass0300";
175
176				reg = <0x3100 0x0 0x0 0x0 0x0>;
177				interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
178				interrupt-parent = <&pic>;
179			};
180
181			hda@7,0 {
182				compatible = "pci0014,7a07.0",
183						   "pci0014,7a07",
184						   "pciclass040300",
185						   "pciclass0403";
186
187				reg = <0x3800 0x0 0x0 0x0 0x0>;
188				interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
189				interrupt-parent = <&pic>;
190			};
191
192			gmac@3,0 {
193				compatible = "pci0014,7a03.0",
194						   "pci0014,7a03",
195						   "pciclass020000",
196						   "pciclass0200",
197						   "loongson, pci-gmac";
198
199				reg = <0x1800 0x0 0x0 0x0 0x0>;
200				interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
201					     <13 IRQ_TYPE_LEVEL_HIGH>;
202				interrupt-names = "macirq", "eth_lpi";
203				interrupt-parent = <&pic>;
204				phy-mode = "rgmii";
205				mdio {
206					#address-cells = <1>;
207					#size-cells = <0>;
208					compatible = "snps,dwmac-mdio";
209					phy0: ethernet-phy@0 {
210						reg = <0>;
211					};
212				};
213			};
214
215			gmac@3,1 {
216				compatible = "pci0014,7a03.0",
217						   "pci0014,7a03",
218						   "pciclass020000",
219						   "pciclass0200",
220						   "loongson, pci-gmac";
221
222				reg = <0x1900 0x0 0x0 0x0 0x0>;
223				interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
224					     <15 IRQ_TYPE_LEVEL_HIGH>;
225				interrupt-names = "macirq", "eth_lpi";
226				interrupt-parent = <&pic>;
227				phy-mode = "rgmii";
228				mdio {
229					#address-cells = <1>;
230					#size-cells = <0>;
231					compatible = "snps,dwmac-mdio";
232					phy1: ethernet-phy@1 {
233						reg = <0>;
234					};
235				};
236			};
237
238			pci_bridge@9,0 {
239				compatible = "pci0014,7a19.1",
240						   "pci0014,7a19",
241						   "pciclass060400",
242						   "pciclass0604";
243
244				reg = <0x4800 0x0 0x0 0x0 0x0>;
245				interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;
246				interrupt-parent = <&pic>;
247
248				#interrupt-cells = <1>;
249				interrupt-map-mask = <0 0 0 0>;
250				interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
251			};
252
253			pci_bridge@a,0 {
254				compatible = "pci0014,7a09.1",
255						   "pci0014,7a09",
256						   "pciclass060400",
257						   "pciclass0604";
258
259				reg = <0x5000 0x0 0x0 0x0 0x0>;
260				interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;
261				interrupt-parent = <&pic>;
262
263				#interrupt-cells = <1>;
264				interrupt-map-mask = <0 0 0 0>;
265				interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
266			};
267
268			pci_bridge@b,0 {
269				compatible = "pci0014,7a09.1",
270						   "pci0014,7a09",
271						   "pciclass060400",
272						   "pciclass0604";
273
274				reg = <0x5800 0x0 0x0 0x0 0x0>;
275				interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
276				interrupt-parent = <&pic>;
277
278				#interrupt-cells = <1>;
279				interrupt-map-mask = <0 0 0 0>;
280				interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
281			};
282
283			pci_bridge@c,0 {
284				compatible = "pci0014,7a09.1",
285						   "pci0014,7a09",
286						   "pciclass060400",
287						   "pciclass0604";
288
289				reg = <0x6000 0x0 0x0 0x0 0x0>;
290				interrupts = <35 IRQ_TYPE_LEVEL_HIGH>;
291				interrupt-parent = <&pic>;
292
293				#interrupt-cells = <1>;
294				interrupt-map-mask = <0 0 0 0>;
295				interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
296			};
297
298			pci_bridge@d,0 {
299				compatible = "pci0014,7a19.1",
300						   "pci0014,7a19",
301						   "pciclass060400",
302						   "pciclass0604";
303
304				reg = <0x6800 0x0 0x0 0x0 0x0>;
305				interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
306				interrupt-parent = <&pic>;
307
308				#interrupt-cells = <1>;
309				interrupt-map-mask = <0 0 0 0>;
310				interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
311			};
312
313			pci_bridge@e,0 {
314				compatible = "pci0014,7a09.1",
315						   "pci0014,7a09",
316						   "pciclass060400",
317						   "pciclass0604";
318
319				reg = <0x7000 0x0 0x0 0x0 0x0>;
320				interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
321				interrupt-parent = <&pic>;
322
323				#interrupt-cells = <1>;
324				interrupt-map-mask = <0 0 0 0>;
325				interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
326			};
327
328			pci_bridge@f,0 {
329				compatible = "pci0014,7a29.1",
330						   "pci0014,7a29",
331						   "pciclass060400",
332						   "pciclass0604";
333
334				reg = <0x7800 0x0 0x0 0x0 0x0>;
335				interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
336				interrupt-parent = <&pic>;
337
338				#interrupt-cells = <1>;
339				interrupt-map-mask = <0 0 0 0>;
340				interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
341			};
342
343			pci_bridge@10,0 {
344				compatible = "pci0014,7a19.1",
345						   "pci0014,7a19",
346						   "pciclass060400",
347						   "pciclass0604";
348
349				reg = <0x8000 0x0 0x0 0x0 0x0>;
350				interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
351				interrupt-parent = <&pic>;
352
353				#interrupt-cells = <1>;
354				interrupt-map-mask = <0 0 0 0>;
355				interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;
356			};
357
358			pci_bridge@11,0 {
359				compatible = "pci0014,7a29.1",
360						   "pci0014,7a29",
361						   "pciclass060400",
362						   "pciclass0604";
363
364				reg = <0x8800 0x0 0x0 0x0 0x0>;
365				interrupts = <42 IRQ_TYPE_LEVEL_HIGH>;
366				interrupt-parent = <&pic>;
367
368				#interrupt-cells = <1>;
369				interrupt-map-mask = <0 0 0 0>;
370				interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;
371			};
372
373			pci_bridge@12,0 {
374				compatible = "pci0014,7a19.1",
375						   "pci0014,7a19",
376						   "pciclass060400",
377						   "pciclass0604";
378
379				reg = <0x9000 0x0 0x0 0x0 0x0>;
380				interrupts = <43 IRQ_TYPE_LEVEL_HIGH>;
381				interrupt-parent = <&pic>;
382
383				#interrupt-cells = <1>;
384				interrupt-map-mask = <0 0 0 0>;
385				interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;
386			};
387
388			pci_bridge@13,0 {
389				compatible = "pci0014,7a29.1",
390						   "pci0014,7a29",
391						   "pciclass060400",
392						   "pciclass0604";
393
394				reg = <0x9800 0x0 0x0 0x0 0x0>;
395				interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
396				interrupt-parent = <&pic>;
397
398				#interrupt-cells = <1>;
399				interrupt-map-mask = <0 0 0 0>;
400				interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;
401			};
402
403			pci_bridge@14,0 {
404				compatible = "pci0014,7a19.1",
405						   "pci0014,7a19",
406						   "pciclass060400",
407						   "pciclass0604";
408
409				reg = <0xa000 0x0 0x0 0x0 0x0>;
410				interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
411				interrupt-parent = <&pic>;
412
413				#interrupt-cells = <1>;
414				interrupt-map-mask = <0 0 0 0>;
415				interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
416			};
417		};
418
419		isa@18000000 {
420			compatible = "isa";
421			#address-cells = <2>;
422			#size-cells = <1>;
423			ranges = <1 0 0 0x18000000 0x20000>;
424		};
425	};
426};
427