1// SPDX-License-Identifier: GPL-2.0 2#include <dt-bindings/clock/jz4740-cgu.h> 3 4/ { 5 #address-cells = <1>; 6 #size-cells = <1>; 7 compatible = "ingenic,jz4740"; 8 9 cpuintc: interrupt-controller { 10 #address-cells = <0>; 11 #interrupt-cells = <1>; 12 interrupt-controller; 13 compatible = "mti,cpu-interrupt-controller"; 14 }; 15 16 intc: interrupt-controller@10001000 { 17 compatible = "ingenic,jz4740-intc"; 18 reg = <0x10001000 0x14>; 19 20 interrupt-controller; 21 #interrupt-cells = <1>; 22 23 interrupt-parent = <&cpuintc>; 24 interrupts = <2>; 25 }; 26 27 ext: ext { 28 compatible = "fixed-clock"; 29 #clock-cells = <0>; 30 }; 31 32 rtc: rtc { 33 compatible = "fixed-clock"; 34 #clock-cells = <0>; 35 clock-frequency = <32768>; 36 }; 37 38 cgu: jz4740-cgu@10000000 { 39 compatible = "ingenic,jz4740-cgu"; 40 reg = <0x10000000 0x100>; 41 42 clocks = <&ext>, <&rtc>; 43 clock-names = "ext", "rtc"; 44 45 #clock-cells = <1>; 46 }; 47 48 watchdog: watchdog@10002000 { 49 compatible = "ingenic,jz4740-watchdog"; 50 reg = <0x10002000 0x10>; 51 52 clocks = <&cgu JZ4740_CLK_RTC>; 53 clock-names = "rtc"; 54 }; 55 56 rtc_dev: rtc@10003000 { 57 compatible = "ingenic,jz4740-rtc"; 58 reg = <0x10003000 0x40>; 59 60 interrupt-parent = <&intc>; 61 interrupts = <15>; 62 63 clocks = <&cgu JZ4740_CLK_RTC>; 64 clock-names = "rtc"; 65 }; 66 67 pinctrl: pin-controller@10010000 { 68 compatible = "ingenic,jz4740-pinctrl"; 69 reg = <0x10010000 0x400>; 70 71 #address-cells = <1>; 72 #size-cells = <0>; 73 74 gpa: gpio@0 { 75 compatible = "ingenic,jz4740-gpio"; 76 reg = <0>; 77 78 gpio-controller; 79 gpio-ranges = <&pinctrl 0 0 32>; 80 #gpio-cells = <2>; 81 82 interrupt-controller; 83 #interrupt-cells = <2>; 84 85 interrupt-parent = <&intc>; 86 interrupts = <28>; 87 }; 88 89 gpb: gpio@1 { 90 compatible = "ingenic,jz4740-gpio"; 91 reg = <1>; 92 93 gpio-controller; 94 gpio-ranges = <&pinctrl 0 32 32>; 95 #gpio-cells = <2>; 96 97 interrupt-controller; 98 #interrupt-cells = <2>; 99 100 interrupt-parent = <&intc>; 101 interrupts = <27>; 102 }; 103 104 gpc: gpio@2 { 105 compatible = "ingenic,jz4740-gpio"; 106 reg = <2>; 107 108 gpio-controller; 109 gpio-ranges = <&pinctrl 0 64 32>; 110 #gpio-cells = <2>; 111 112 interrupt-controller; 113 #interrupt-cells = <2>; 114 115 interrupt-parent = <&intc>; 116 interrupts = <26>; 117 }; 118 119 gpd: gpio@3 { 120 compatible = "ingenic,jz4740-gpio"; 121 reg = <3>; 122 123 gpio-controller; 124 gpio-ranges = <&pinctrl 0 96 32>; 125 #gpio-cells = <2>; 126 127 interrupt-controller; 128 #interrupt-cells = <2>; 129 130 interrupt-parent = <&intc>; 131 interrupts = <25>; 132 }; 133 }; 134 135 uart0: serial@10030000 { 136 compatible = "ingenic,jz4740-uart"; 137 reg = <0x10030000 0x100>; 138 139 interrupt-parent = <&intc>; 140 interrupts = <9>; 141 142 clocks = <&ext>, <&cgu JZ4740_CLK_UART0>; 143 clock-names = "baud", "module"; 144 }; 145 146 uart1: serial@10031000 { 147 compatible = "ingenic,jz4740-uart"; 148 reg = <0x10031000 0x100>; 149 150 interrupt-parent = <&intc>; 151 interrupts = <8>; 152 153 clocks = <&ext>, <&cgu JZ4740_CLK_UART1>; 154 clock-names = "baud", "module"; 155 }; 156 157 dmac: dma-controller@13020000 { 158 compatible = "ingenic,jz4740-dma"; 159 reg = <0x13020000 0xbc 160 0x13020300 0x14>; 161 #dma-cells = <2>; 162 163 interrupt-parent = <&intc>; 164 interrupts = <20>; 165 166 clocks = <&cgu JZ4740_CLK_DMA>; 167 168 /* Disable dmac until we have something that uses it */ 169 status = "disabled"; 170 }; 171 172 uhc: uhc@13030000 { 173 compatible = "ingenic,jz4740-ohci", "generic-ohci"; 174 reg = <0x13030000 0x1000>; 175 176 clocks = <&cgu JZ4740_CLK_UHC>; 177 assigned-clocks = <&cgu JZ4740_CLK_UHC>; 178 assigned-clock-rates = <48000000>; 179 180 interrupt-parent = <&intc>; 181 interrupts = <3>; 182 183 status = "disabled"; 184 }; 185}; 186