18945e37eSKevin Cernekee/ { 28945e37eSKevin Cernekee #address-cells = <1>; 38945e37eSKevin Cernekee #size-cells = <1>; 48945e37eSKevin Cernekee compatible = "brcm,bcm7358"; 58945e37eSKevin Cernekee 68945e37eSKevin Cernekee cpus { 78945e37eSKevin Cernekee #address-cells = <1>; 88945e37eSKevin Cernekee #size-cells = <0>; 98945e37eSKevin Cernekee 108945e37eSKevin Cernekee mips-hpt-frequency = <375000000>; 118945e37eSKevin Cernekee 128945e37eSKevin Cernekee cpu@0 { 138945e37eSKevin Cernekee compatible = "brcm,bmips3300"; 148945e37eSKevin Cernekee device_type = "cpu"; 158945e37eSKevin Cernekee reg = <0>; 168945e37eSKevin Cernekee }; 178945e37eSKevin Cernekee }; 188945e37eSKevin Cernekee 198945e37eSKevin Cernekee aliases { 208945e37eSKevin Cernekee uart0 = &uart0; 21*8bac078cSJaedon Shin uart1 = &uart1; 22*8bac078cSJaedon Shin uart2 = &uart2; 238945e37eSKevin Cernekee }; 248945e37eSKevin Cernekee 258945e37eSKevin Cernekee cpu_intc: cpu_intc { 268945e37eSKevin Cernekee #address-cells = <0>; 278945e37eSKevin Cernekee compatible = "mti,cpu-interrupt-controller"; 288945e37eSKevin Cernekee 298945e37eSKevin Cernekee interrupt-controller; 308945e37eSKevin Cernekee #interrupt-cells = <1>; 318945e37eSKevin Cernekee }; 328945e37eSKevin Cernekee 338945e37eSKevin Cernekee clocks { 348945e37eSKevin Cernekee uart_clk: uart_clk { 358945e37eSKevin Cernekee compatible = "fixed-clock"; 368945e37eSKevin Cernekee #clock-cells = <0>; 378945e37eSKevin Cernekee clock-frequency = <81000000>; 388945e37eSKevin Cernekee }; 398945e37eSKevin Cernekee }; 408945e37eSKevin Cernekee 418945e37eSKevin Cernekee rdb { 428945e37eSKevin Cernekee #address-cells = <1>; 438945e37eSKevin Cernekee #size-cells = <1>; 448945e37eSKevin Cernekee 458945e37eSKevin Cernekee compatible = "simple-bus"; 468945e37eSKevin Cernekee ranges = <0 0x10000000 0x01000000>; 478945e37eSKevin Cernekee 488945e37eSKevin Cernekee periph_intc: periph_intc@411400 { 498945e37eSKevin Cernekee compatible = "brcm,bcm7038-l1-intc"; 508945e37eSKevin Cernekee reg = <0x411400 0x30>; 518945e37eSKevin Cernekee 528945e37eSKevin Cernekee interrupt-controller; 538945e37eSKevin Cernekee #interrupt-cells = <1>; 548945e37eSKevin Cernekee 558945e37eSKevin Cernekee interrupt-parent = <&cpu_intc>; 568945e37eSKevin Cernekee interrupts = <2>; 578945e37eSKevin Cernekee }; 588945e37eSKevin Cernekee 598945e37eSKevin Cernekee sun_l2_intc: sun_l2_intc@403000 { 608945e37eSKevin Cernekee compatible = "brcm,l2-intc"; 618945e37eSKevin Cernekee reg = <0x403000 0x30>; 628945e37eSKevin Cernekee interrupt-controller; 638945e37eSKevin Cernekee #interrupt-cells = <1>; 648945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 658945e37eSKevin Cernekee interrupts = <48>; 668945e37eSKevin Cernekee }; 678945e37eSKevin Cernekee 688945e37eSKevin Cernekee gisb-arb@400000 { 698945e37eSKevin Cernekee compatible = "brcm,bcm7400-gisb-arb"; 708945e37eSKevin Cernekee reg = <0x400000 0xdc>; 718945e37eSKevin Cernekee native-endian; 728945e37eSKevin Cernekee interrupt-parent = <&sun_l2_intc>; 738945e37eSKevin Cernekee interrupts = <0>, <2>; 748945e37eSKevin Cernekee brcm,gisb-arb-master-mask = <0x2f3>; 758945e37eSKevin Cernekee brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0", 768945e37eSKevin Cernekee "rdc_0", "raaga_0", 778945e37eSKevin Cernekee "avd_0", "jtag_0"; 788945e37eSKevin Cernekee }; 798945e37eSKevin Cernekee 808945e37eSKevin Cernekee upg_irq0_intc: upg_irq0_intc@406600 { 818945e37eSKevin Cernekee compatible = "brcm,bcm7120-l2-intc"; 828945e37eSKevin Cernekee reg = <0x406600 0x8>; 838945e37eSKevin Cernekee 848945e37eSKevin Cernekee brcm,int-map-mask = <0x44>; 858945e37eSKevin Cernekee brcm,int-fwd-mask = <0x70000>; 868945e37eSKevin Cernekee 878945e37eSKevin Cernekee interrupt-controller; 888945e37eSKevin Cernekee #interrupt-cells = <1>; 898945e37eSKevin Cernekee 908945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 918945e37eSKevin Cernekee interrupts = <56>; 928945e37eSKevin Cernekee }; 938945e37eSKevin Cernekee 948945e37eSKevin Cernekee sun_top_ctrl: syscon@404000 { 958945e37eSKevin Cernekee compatible = "brcm,bcm7358-sun-top-ctrl", "syscon"; 968945e37eSKevin Cernekee reg = <0x404000 0x51c>; 978945e37eSKevin Cernekee little-endian; 988945e37eSKevin Cernekee }; 998945e37eSKevin Cernekee 1008945e37eSKevin Cernekee reboot { 1018945e37eSKevin Cernekee compatible = "brcm,brcmstb-reboot"; 1028945e37eSKevin Cernekee syscon = <&sun_top_ctrl 0x304 0x308>; 1038945e37eSKevin Cernekee }; 1048945e37eSKevin Cernekee 1058945e37eSKevin Cernekee uart0: serial@406800 { 1068945e37eSKevin Cernekee compatible = "ns16550a"; 1078945e37eSKevin Cernekee reg = <0x406800 0x20>; 1088945e37eSKevin Cernekee reg-io-width = <0x4>; 1098945e37eSKevin Cernekee reg-shift = <0x2>; 1108945e37eSKevin Cernekee native-endian; 1118945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 1128945e37eSKevin Cernekee interrupts = <61>; 1138945e37eSKevin Cernekee clocks = <&uart_clk>; 1148945e37eSKevin Cernekee status = "disabled"; 1158945e37eSKevin Cernekee }; 1168945e37eSKevin Cernekee 117*8bac078cSJaedon Shin uart1: serial@406840 { 118*8bac078cSJaedon Shin compatible = "ns16550a"; 119*8bac078cSJaedon Shin reg = <0x406840 0x20>; 120*8bac078cSJaedon Shin reg-io-width = <0x4>; 121*8bac078cSJaedon Shin reg-shift = <0x2>; 122*8bac078cSJaedon Shin native-endian; 123*8bac078cSJaedon Shin interrupt-parent = <&periph_intc>; 124*8bac078cSJaedon Shin interrupts = <62>; 125*8bac078cSJaedon Shin clocks = <&uart_clk>; 126*8bac078cSJaedon Shin status = "disabled"; 127*8bac078cSJaedon Shin }; 128*8bac078cSJaedon Shin 129*8bac078cSJaedon Shin uart2: serial@406880 { 130*8bac078cSJaedon Shin compatible = "ns16550a"; 131*8bac078cSJaedon Shin reg = <0x406880 0x20>; 132*8bac078cSJaedon Shin reg-io-width = <0x4>; 133*8bac078cSJaedon Shin reg-shift = <0x2>; 134*8bac078cSJaedon Shin native-endian; 135*8bac078cSJaedon Shin interrupt-parent = <&periph_intc>; 136*8bac078cSJaedon Shin interrupts = <63>; 137*8bac078cSJaedon Shin clocks = <&uart_clk>; 138*8bac078cSJaedon Shin status = "disabled"; 139*8bac078cSJaedon Shin }; 140*8bac078cSJaedon Shin 1418945e37eSKevin Cernekee enet0: ethernet@430000 { 1428945e37eSKevin Cernekee phy-mode = "internal"; 1438945e37eSKevin Cernekee phy-handle = <&phy1>; 1448945e37eSKevin Cernekee mac-address = [ 00 10 18 36 23 1a ]; 1458945e37eSKevin Cernekee compatible = "brcm,genet-v2"; 1468945e37eSKevin Cernekee #address-cells = <0x1>; 1478945e37eSKevin Cernekee #size-cells = <0x1>; 1488945e37eSKevin Cernekee reg = <0x430000 0x4c8c>; 1498945e37eSKevin Cernekee interrupts = <24>, <25>; 1508945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 1518945e37eSKevin Cernekee status = "disabled"; 1528945e37eSKevin Cernekee 1538945e37eSKevin Cernekee mdio@e14 { 1548945e37eSKevin Cernekee compatible = "brcm,genet-mdio-v2"; 1558945e37eSKevin Cernekee #address-cells = <0x1>; 1568945e37eSKevin Cernekee #size-cells = <0x0>; 1578945e37eSKevin Cernekee reg = <0xe14 0x8>; 1588945e37eSKevin Cernekee 1598945e37eSKevin Cernekee phy1: ethernet-phy@1 { 1608945e37eSKevin Cernekee max-speed = <100>; 1618945e37eSKevin Cernekee reg = <0x1>; 1628945e37eSKevin Cernekee compatible = "brcm,40nm-ephy", 1638945e37eSKevin Cernekee "ethernet-phy-ieee802.3-c22"; 1648945e37eSKevin Cernekee }; 1658945e37eSKevin Cernekee }; 1668945e37eSKevin Cernekee }; 1678945e37eSKevin Cernekee 1688945e37eSKevin Cernekee ehci0: usb@480300 { 1698945e37eSKevin Cernekee compatible = "brcm,bcm7358-ehci", "generic-ehci"; 1708945e37eSKevin Cernekee reg = <0x480300 0x100>; 1718945e37eSKevin Cernekee native-endian; 1728945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 1738945e37eSKevin Cernekee interrupts = <65>; 1748945e37eSKevin Cernekee status = "disabled"; 1758945e37eSKevin Cernekee }; 1768945e37eSKevin Cernekee 1778945e37eSKevin Cernekee ohci0: usb@480400 { 1788945e37eSKevin Cernekee compatible = "brcm,bcm7358-ohci", "generic-ohci"; 1798945e37eSKevin Cernekee reg = <0x480400 0x100>; 1808945e37eSKevin Cernekee native-endian; 1818945e37eSKevin Cernekee no-big-frame-no; 1828945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 1838945e37eSKevin Cernekee interrupts = <66>; 1848945e37eSKevin Cernekee status = "disabled"; 1858945e37eSKevin Cernekee }; 1868945e37eSKevin Cernekee }; 1878945e37eSKevin Cernekee}; 188