xref: /linux/arch/mips/boot/dts/brcm/bcm7346.dtsi (revision 93df8a1ed6231727c5db94a80b1a6bd5ee67cec3)
1/ {
2	#address-cells = <1>;
3	#size-cells = <1>;
4	compatible = "brcm,bcm7346";
5
6	cpus {
7		#address-cells = <1>;
8		#size-cells = <0>;
9
10		mips-hpt-frequency = <163125000>;
11
12		cpu@0 {
13			compatible = "brcm,bmips5000";
14			device_type = "cpu";
15			reg = <0>;
16		};
17
18		cpu@1 {
19			compatible = "brcm,bmips5000";
20			device_type = "cpu";
21			reg = <1>;
22		};
23	};
24
25	aliases {
26		uart0 = &uart0;
27		uart1 = &uart1;
28		uart2 = &uart2;
29	};
30
31	cpu_intc: cpu_intc {
32		#address-cells = <0>;
33		compatible = "mti,cpu-interrupt-controller";
34
35		interrupt-controller;
36		#interrupt-cells = <1>;
37	};
38
39	clocks {
40		uart_clk: uart_clk {
41			compatible = "fixed-clock";
42			#clock-cells = <0>;
43			clock-frequency = <81000000>;
44		};
45	};
46
47	rdb {
48		#address-cells = <1>;
49		#size-cells = <1>;
50
51		compatible = "simple-bus";
52		ranges = <0 0x10000000 0x01000000>;
53
54		periph_intc: periph_intc@411400 {
55			compatible = "brcm,bcm7038-l1-intc";
56			reg = <0x411400 0x30>, <0x411600 0x30>;
57
58			interrupt-controller;
59			#interrupt-cells = <1>;
60
61			interrupt-parent = <&cpu_intc>;
62			interrupts = <2>, <3>;
63		};
64
65		sun_l2_intc: sun_l2_intc@403000 {
66			compatible = "brcm,l2-intc";
67			reg = <0x403000 0x30>;
68			interrupt-controller;
69			#interrupt-cells = <1>;
70			interrupt-parent = <&periph_intc>;
71			interrupts = <51>;
72		};
73
74		gisb-arb@400000 {
75			compatible = "brcm,bcm7400-gisb-arb";
76			reg = <0x400000 0xdc>;
77			native-endian;
78			interrupt-parent = <&sun_l2_intc>;
79			interrupts = <0>, <2>;
80			brcm,gisb-arb-master-mask = <0x673>;
81			brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0",
82						     "rdc_0", "raaga_0",
83						     "jtag_0", "svd_0";
84		};
85
86		upg_irq0_intc: upg_irq0_intc@406780 {
87			compatible = "brcm,bcm7120-l2-intc";
88			reg = <0x406780 0x8>;
89
90			brcm,int-map-mask = <0x44>;
91			brcm,int-fwd-mask = <0x70000>;
92
93			interrupt-controller;
94			#interrupt-cells = <1>;
95
96			interrupt-parent = <&periph_intc>;
97			interrupts = <59>;
98		};
99
100		sun_top_ctrl: syscon@404000 {
101			compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
102			reg = <0x404000 0x51c>;
103			little-endian;
104		};
105
106		reboot {
107			compatible = "brcm,brcmstb-reboot";
108			syscon = <&sun_top_ctrl 0x304 0x308>;
109		};
110
111		uart0: serial@406900 {
112			compatible = "ns16550a";
113			reg = <0x406900 0x20>;
114			reg-io-width = <0x4>;
115			reg-shift = <0x2>;
116			native-endian;
117			interrupt-parent = <&periph_intc>;
118			interrupts = <64>;
119			clocks = <&uart_clk>;
120			status = "disabled";
121		};
122
123		uart1: serial@406940 {
124			compatible = "ns16550a";
125			reg = <0x406940 0x20>;
126			reg-io-width = <0x4>;
127			reg-shift = <0x2>;
128			native-endian;
129			interrupt-parent = <&periph_intc>;
130			interrupts = <65>;
131			clocks = <&uart_clk>;
132			status = "disabled";
133		};
134
135		uart2: serial@406980 {
136			compatible = "ns16550a";
137			reg = <0x406980 0x20>;
138			reg-io-width = <0x4>;
139			reg-shift = <0x2>;
140			native-endian;
141			interrupt-parent = <&periph_intc>;
142			interrupts = <66>;
143			clocks = <&uart_clk>;
144			status = "disabled";
145		};
146
147		enet0: ethernet@430000 {
148			phy-mode = "internal";
149			phy-handle = <&phy1>;
150			mac-address = [ 00 10 18 36 23 1a ];
151			compatible = "brcm,genet-v2";
152			#address-cells = <0x1>;
153			#size-cells = <0x1>;
154			reg = <0x430000 0x4c8c>;
155			interrupts = <24>, <25>;
156			interrupt-parent = <&periph_intc>;
157			status = "disabled";
158
159			mdio@e14 {
160				compatible = "brcm,genet-mdio-v2";
161				#address-cells = <0x1>;
162				#size-cells = <0x0>;
163				reg = <0xe14 0x8>;
164
165				phy1: ethernet-phy@1 {
166					max-speed = <100>;
167					reg = <0x1>;
168					compatible = "brcm,40nm-ephy",
169						"ethernet-phy-ieee802.3-c22";
170				};
171			};
172		};
173
174		ehci0: usb@480300 {
175			compatible = "brcm,bcm7346-ehci", "generic-ehci";
176			reg = <0x480300 0x100>;
177			native-endian;
178			interrupt-parent = <&periph_intc>;
179			interrupts = <68>;
180			status = "disabled";
181		};
182
183		ohci0: usb@480400 {
184			compatible = "brcm,bcm7346-ohci", "generic-ohci";
185			reg = <0x480400 0x100>;
186			native-endian;
187			no-big-frame-no;
188			interrupt-parent = <&periph_intc>;
189			interrupts = <70>;
190			status = "disabled";
191		};
192
193		ehci1: usb@480500 {
194			compatible = "brcm,bcm7346-ehci", "generic-ehci";
195			reg = <0x480500 0x100>;
196			native-endian;
197			interrupt-parent = <&periph_intc>;
198			interrupts = <69>;
199			status = "disabled";
200		};
201
202		ohci1: usb@480600 {
203			compatible = "brcm,bcm7346-ohci", "generic-ohci";
204			reg = <0x480600 0x100>;
205			native-endian;
206			no-big-frame-no;
207			interrupt-parent = <&periph_intc>;
208			interrupts = <71>;
209			status = "disabled";
210		};
211
212		ehci2: usb@490300 {
213			compatible = "brcm,bcm7346-ehci", "generic-ehci";
214			reg = <0x490300 0x100>;
215			native-endian;
216			interrupt-parent = <&periph_intc>;
217			interrupts = <73>;
218			status = "disabled";
219		};
220
221		ohci2: usb@490400 {
222			compatible = "brcm,bcm7346-ohci", "generic-ohci";
223			reg = <0x490400 0x100>;
224			native-endian;
225			no-big-frame-no;
226			interrupt-parent = <&periph_intc>;
227			interrupts = <75>;
228			status = "disabled";
229		};
230
231		ehci3: usb@490500 {
232			compatible = "brcm,bcm7346-ehci", "generic-ehci";
233			reg = <0x490500 0x100>;
234			native-endian;
235			interrupt-parent = <&periph_intc>;
236			interrupts = <74>;
237			status = "disabled";
238		};
239
240		ohci3: usb@490600 {
241			compatible = "brcm,bcm7346-ohci", "generic-ohci";
242			reg = <0x490600 0x100>;
243			native-endian;
244			no-big-frame-no;
245			interrupt-parent = <&periph_intc>;
246			interrupts = <76>;
247			status = "disabled";
248		};
249	};
250};
251