1// SPDX-License-Identifier: GPL-2.0 2 3#include "dt-bindings/clock/bcm6358-clock.h" 4#include "dt-bindings/reset/bcm6358-reset.h" 5 6/ { 7 #address-cells = <1>; 8 #size-cells = <1>; 9 compatible = "brcm,bcm6358"; 10 11 cpus { 12 #address-cells = <1>; 13 #size-cells = <0>; 14 15 mips-hpt-frequency = <150000000>; 16 brcm,bmips-cbr-reg = <0xff400000>; 17 18 cpu@0 { 19 compatible = "brcm,bmips4350"; 20 device_type = "cpu"; 21 reg = <0>; 22 }; 23 24 cpu@1 { 25 compatible = "brcm,bmips4350"; 26 device_type = "cpu"; 27 reg = <1>; 28 }; 29 }; 30 31 clocks { 32 periph_osc: periph-osc { 33 compatible = "fixed-clock"; 34 #clock-cells = <0>; 35 clock-frequency = <50000000>; 36 clock-output-names = "periph"; 37 }; 38 }; 39 40 aliases { 41 pflash = &pflash; 42 serial0 = &uart0; 43 serial1 = &uart1; 44 spi0 = &lsspi; 45 }; 46 47 cpu_intc: interrupt-controller { 48 #address-cells = <0>; 49 compatible = "mti,cpu-interrupt-controller"; 50 51 interrupt-controller; 52 #interrupt-cells = <1>; 53 }; 54 55 ubus { 56 #address-cells = <1>; 57 #size-cells = <1>; 58 59 compatible = "simple-bus"; 60 ranges; 61 62 periph_clk: clock-controller@fffe0004 { 63 compatible = "brcm,bcm6358-clocks"; 64 reg = <0xfffe0004 0x4>; 65 #clock-cells = <1>; 66 }; 67 68 pll_cntl: syscon@fffe0008 { 69 compatible = "syscon"; 70 reg = <0xfffe0008 0x4>; 71 native-endian; 72 73 reboot { 74 compatible = "syscon-reboot"; 75 offset = <0x0>; 76 mask = <0x1>; 77 }; 78 }; 79 80 periph_intc: interrupt-controller@fffe000c { 81 compatible = "brcm,bcm6345-l1-intc"; 82 reg = <0xfffe000c 0x8>, 83 <0xfffe0038 0x8>; 84 85 interrupt-controller; 86 #interrupt-cells = <1>; 87 88 interrupt-parent = <&cpu_intc>; 89 interrupts = <2>, <3>; 90 }; 91 92 periph_rst: reset-controller@fffe0034 { 93 compatible = "brcm,bcm6345-reset"; 94 reg = <0xfffe0034 0x4>; 95 #reset-cells = <1>; 96 }; 97 98 wdt: watchdog@fffe005c { 99 compatible = "brcm,bcm7038-wdt"; 100 reg = <0xfffe005c 0xc>; 101 102 clocks = <&periph_osc>; 103 clock-names = "refclk"; 104 105 timeout-sec = <30>; 106 }; 107 108 leds0: led-controller@fffe00d0 { 109 #address-cells = <1>; 110 #size-cells = <0>; 111 compatible = "brcm,bcm6358-leds"; 112 reg = <0xfffe00d0 0x8>; 113 114 status = "disabled"; 115 }; 116 117 uart0: serial@fffe0100 { 118 compatible = "brcm,bcm6345-uart"; 119 reg = <0xfffe0100 0x18>; 120 121 interrupt-parent = <&periph_intc>; 122 interrupts = <2>; 123 124 clocks = <&periph_osc>; 125 clock-names = "refclk"; 126 127 status = "disabled"; 128 }; 129 130 uart1: serial@fffe0120 { 131 compatible = "brcm,bcm6345-uart"; 132 reg = <0xfffe0120 0x18>; 133 134 interrupt-parent = <&periph_intc>; 135 interrupts = <3>; 136 137 clocks = <&periph_osc>; 138 clock-names = "refclk"; 139 140 status = "disabled"; 141 }; 142 143 lsspi: spi@fffe0800 { 144 #address-cells = <1>; 145 #size-cells = <0>; 146 compatible = "brcm,bcm6358-spi"; 147 reg = <0xfffe0800 0x70c>; 148 149 interrupt-parent = <&periph_intc>; 150 interrupts = <1>; 151 152 clocks = <&periph_clk BCM6358_CLK_SPI>; 153 clock-names = "spi"; 154 155 resets = <&periph_rst BCM6358_RST_SPI>; 156 reset-names = "spi"; 157 158 status = "disabled"; 159 }; 160 161 ehci: usb@fffe1300 { 162 compatible = "brcm,bcm6358-ehci", "generic-ehci"; 163 reg = <0xfffe1300 0x100>; 164 big-endian; 165 166 interrupt-parent = <&periph_intc>; 167 interrupts = <10>; 168 169 phys = <&usbh 0>; 170 phy-names = "usb"; 171 172 status = "disabled"; 173 }; 174 175 ohci: usb@fffe1400 { 176 compatible = "brcm,bcm6358-ohci", "generic-ohci"; 177 reg = <0xfffe1400 0x100>; 178 big-endian; 179 no-big-frame-no; 180 181 interrupt-parent = <&periph_intc>; 182 interrupts = <5>; 183 184 phys = <&usbh 0>; 185 phy-names = "usb"; 186 187 status = "disabled"; 188 }; 189 190 usbh: usb-phy@fffe1500 { 191 compatible = "brcm,bcm6358-usbh-phy"; 192 reg = <0xfffe1500 0x38>; 193 #phy-cells = <1>; 194 195 resets = <&periph_rst BCM6358_RST_USBH>; 196 reset-names = "usbh"; 197 198 status = "disabled"; 199 }; 200 }; 201 202 pflash: nor@1e000000 { 203 #address-cells = <1>; 204 #size-cells = <1>; 205 compatible = "cfi-flash"; 206 reg = <0x1e000000 0x2000000>; 207 bank-width = <2>; 208 209 status = "disabled"; 210 }; 211}; 212