1 /* 2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org> 3 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> 4 * Copyright (C) 2006 Michael Buesch <m@bues.ch> 5 * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org> 6 * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de> 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 * 24 * You should have received a copy of the GNU General Public License along 25 * with this program; if not, write to the Free Software Foundation, Inc., 26 * 675 Mass Ave, Cambridge, MA 02139, USA. 27 */ 28 29 #include "bcm47xx_private.h" 30 31 #include <linux/bcm47xx_sprom.h> 32 #include <linux/export.h> 33 #include <linux/types.h> 34 #include <linux/ethtool.h> 35 #include <linux/phy.h> 36 #include <linux/phy_fixed.h> 37 #include <linux/ssb/ssb.h> 38 #include <linux/ssb/ssb_embedded.h> 39 #include <linux/bcma/bcma_soc.h> 40 #include <asm/bmips.h> 41 #include <asm/bootinfo.h> 42 #include <asm/idle.h> 43 #include <asm/prom.h> 44 #include <asm/reboot.h> 45 #include <asm/time.h> 46 #include <bcm47xx.h> 47 #include <bcm47xx_board.h> 48 49 /* 50 * CBR addr doesn't change and we can cache it. 51 * For broken SoC/Bootloader CBR addr might also be provided via DT 52 * with "brcm,bmips-cbr-reg" in the "cpus" node. 53 */ 54 void __iomem *bmips_cbr_addr __read_mostly; 55 56 union bcm47xx_bus bcm47xx_bus; 57 EXPORT_SYMBOL(bcm47xx_bus); 58 59 enum bcm47xx_bus_type bcm47xx_bus_type; 60 EXPORT_SYMBOL(bcm47xx_bus_type); 61 62 static void bcm47xx_machine_restart(char *command) 63 { 64 pr_alert("Please stand by while rebooting the system...\n"); 65 local_irq_disable(); 66 /* Set the watchdog timer to reset immediately */ 67 switch (bcm47xx_bus_type) { 68 #ifdef CONFIG_BCM47XX_SSB 69 case BCM47XX_BUS_TYPE_SSB: 70 if (bcm47xx_bus.ssb.chip_id == 0x4785) 71 write_c0_diag4(1 << 22); 72 ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1); 73 if (bcm47xx_bus.ssb.chip_id == 0x4785) { 74 __asm__ __volatile__( 75 ".set\tmips3\n\t" 76 "sync\n\t" 77 "wait\n\t" 78 ".set\tmips0"); 79 } 80 break; 81 #endif 82 #ifdef CONFIG_BCM47XX_BCMA 83 case BCM47XX_BUS_TYPE_BCMA: 84 bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1); 85 break; 86 #endif 87 } 88 while (1) 89 cpu_relax(); 90 } 91 92 static void bcm47xx_machine_halt(void) 93 { 94 /* Disable interrupts and watchdog and spin forever */ 95 local_irq_disable(); 96 switch (bcm47xx_bus_type) { 97 #ifdef CONFIG_BCM47XX_SSB 98 case BCM47XX_BUS_TYPE_SSB: 99 ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); 100 break; 101 #endif 102 #ifdef CONFIG_BCM47XX_BCMA 103 case BCM47XX_BUS_TYPE_BCMA: 104 bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 0); 105 break; 106 #endif 107 } 108 while (1) 109 cpu_relax(); 110 } 111 112 #ifdef CONFIG_BCM47XX_SSB 113 static void __init bcm47xx_register_ssb(void) 114 { 115 int err; 116 char buf[100]; 117 struct ssb_mipscore *mcore; 118 119 err = ssb_bus_host_soc_register(&bcm47xx_bus.ssb, SSB_ENUM_BASE); 120 if (err) 121 panic("Failed to initialize SSB bus (err %d)", err); 122 123 mcore = &bcm47xx_bus.ssb.mipscore; 124 if (bcm47xx_nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) { 125 if (strstr(buf, "console=ttyS1")) { 126 struct ssb_serial_port port; 127 128 pr_debug("Swapping serial ports!\n"); 129 /* swap serial ports */ 130 memcpy(&port, &mcore->serial_ports[0], sizeof(port)); 131 memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1], 132 sizeof(port)); 133 memcpy(&mcore->serial_ports[1], &port, sizeof(port)); 134 } 135 } 136 } 137 #endif 138 139 #ifdef CONFIG_BCM47XX_BCMA 140 static void __init bcm47xx_register_bcma(void) 141 { 142 int err; 143 144 err = bcma_host_soc_register(&bcm47xx_bus.bcma); 145 if (err) 146 panic("Failed to register BCMA bus (err %d)", err); 147 } 148 #endif 149 150 /* 151 * Memory setup is done in the early part of MIPS's arch_mem_init. It's supposed 152 * to detect memory and record it with memblock_add. 153 * Any extra initializaion performed here must not use kmalloc or bootmem. 154 */ 155 void __init plat_mem_setup(void) 156 { 157 struct cpuinfo_mips *c = ¤t_cpu_data; 158 159 if (c->cputype == CPU_74K) { 160 pr_info("Using bcma bus\n"); 161 #ifdef CONFIG_BCM47XX_BCMA 162 bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA; 163 bcm47xx_register_bcma(); 164 bcm47xx_set_system_type(bcm47xx_bus.bcma.bus.chipinfo.id); 165 #ifdef CONFIG_HIGHMEM 166 bcm47xx_prom_highmem_init(); 167 #endif 168 #endif 169 } else { 170 pr_info("Using ssb bus\n"); 171 #ifdef CONFIG_BCM47XX_SSB 172 bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB; 173 bcm47xx_sprom_register_fallbacks(); 174 bcm47xx_register_ssb(); 175 bcm47xx_set_system_type(bcm47xx_bus.ssb.chip_id); 176 #endif 177 } 178 179 _machine_restart = bcm47xx_machine_restart; 180 _machine_halt = bcm47xx_machine_halt; 181 pm_power_off = bcm47xx_machine_halt; 182 } 183 184 #ifdef CONFIG_BCM47XX_BCMA 185 static struct device * __init bcm47xx_setup_device(void) 186 { 187 struct device *dev; 188 int err; 189 190 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 191 if (!dev) 192 return NULL; 193 194 err = dev_set_name(dev, "bcm47xx_soc"); 195 if (err) { 196 pr_err("Failed to set SoC device name: %d\n", err); 197 kfree(dev); 198 return NULL; 199 } 200 201 err = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32)); 202 if (err) 203 pr_err("Failed to set SoC DMA mask: %d\n", err); 204 205 return dev; 206 } 207 #endif 208 209 /* 210 * This finishes bus initialization doing things that were not possible without 211 * kmalloc. Make sure to call it late enough (after mm_init). 212 */ 213 void __init bcm47xx_bus_setup(void) 214 { 215 #ifdef CONFIG_BCM47XX_BCMA 216 if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) { 217 int err; 218 219 bcm47xx_bus.bcma.dev = bcm47xx_setup_device(); 220 if (!bcm47xx_bus.bcma.dev) 221 panic("Failed to setup SoC device\n"); 222 223 err = bcma_host_soc_init(&bcm47xx_bus.bcma); 224 if (err) 225 panic("Failed to initialize BCMA bus (err %d)", err); 226 } 227 #endif 228 229 /* With bus initialized we can access NVRAM and detect the board */ 230 bcm47xx_board_detect(); 231 mips_set_machine_name(bcm47xx_board_get_name()); 232 } 233 234 static int __init bcm47xx_cpu_fixes(void) 235 { 236 switch (bcm47xx_bus_type) { 237 #ifdef CONFIG_BCM47XX_SSB 238 case BCM47XX_BUS_TYPE_SSB: 239 /* Nothing to do */ 240 break; 241 #endif 242 #ifdef CONFIG_BCM47XX_BCMA 243 case BCM47XX_BUS_TYPE_BCMA: 244 /* The BCM4706 has a problem with the CPU wait instruction. 245 * When r4k_wait or r4k_wait_irqoff is used will just hang and 246 * not return from a msleep(). Removing the cpu_wait 247 * functionality is a workaround for this problem. The BCM4716 248 * does not have this problem. 249 */ 250 if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706) 251 cpu_wait = NULL; 252 break; 253 #endif 254 } 255 return 0; 256 } 257 arch_initcall(bcm47xx_cpu_fixes); 258 259 static struct fixed_phy_status bcm47xx_fixed_phy_status __initdata = { 260 .link = 1, 261 .speed = SPEED_100, 262 .duplex = DUPLEX_FULL, 263 }; 264 265 static int __init bcm47xx_register_bus_complete(void) 266 { 267 switch (bcm47xx_bus_type) { 268 #ifdef CONFIG_BCM47XX_SSB 269 case BCM47XX_BUS_TYPE_SSB: 270 /* Nothing to do */ 271 break; 272 #endif 273 #ifdef CONFIG_BCM47XX_BCMA 274 case BCM47XX_BUS_TYPE_BCMA: 275 if (device_register(bcm47xx_bus.bcma.dev)) 276 pr_err("Failed to register SoC device\n"); 277 bcma_bus_register(&bcm47xx_bus.bcma.bus); 278 break; 279 #endif 280 } 281 bcm47xx_buttons_register(); 282 bcm47xx_leds_register(); 283 bcm47xx_workarounds(); 284 285 fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status); 286 return 0; 287 } 288 device_initcall(bcm47xx_register_bus_complete); 289