1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * DBAu1300 init and platform device setup. 4 * 5 * (c) 2009 Manuel Lauss <manuel.lauss@googlemail.com> 6 */ 7 8 #include <linux/clk.h> 9 #include <linux/dma-mapping.h> 10 #include <linux/gpio/machine.h> 11 #include <linux/gpio/property.h> 12 #include <linux/init.h> 13 #include <linux/input-event-codes.h> 14 #include <linux/i2c.h> 15 #include <linux/io.h> 16 #include <linux/leds.h> 17 #include <linux/interrupt.h> 18 #include <linux/ata_platform.h> 19 #include <linux/mmc/host.h> 20 #include <linux/mtd/mtd.h> 21 #include <linux/mtd/platnand.h> 22 #include <linux/platform_device.h> 23 #include <linux/property.h> 24 #include <linux/smsc911x.h> 25 #include <linux/wm97xx.h> 26 27 #include <asm/mach-au1x00/au1000.h> 28 #include <asm/mach-au1x00/gpio-au1300.h> 29 #include <asm/mach-au1x00/au1100_mmc.h> 30 #include <asm/mach-au1x00/au1200fb.h> 31 #include <asm/mach-au1x00/au1xxx_dbdma.h> 32 #include <asm/mach-au1x00/au1xxx_psc.h> 33 #include <asm/mach-db1x00/bcsr.h> 34 #include <asm/mach-au1x00/prom.h> 35 36 #include "db1xxx.h" 37 #include "platform.h" 38 39 /* FPGA (external mux) interrupt sources */ 40 #define DB1300_FIRST_INT (ALCHEMY_GPIC_INT_LAST + 1) 41 #define DB1300_IDE_INT (DB1300_FIRST_INT + 0) 42 #define DB1300_ETH_INT (DB1300_FIRST_INT + 1) 43 #define DB1300_CF_INT (DB1300_FIRST_INT + 2) 44 #define DB1300_VIDEO_INT (DB1300_FIRST_INT + 4) 45 #define DB1300_HDMI_INT (DB1300_FIRST_INT + 5) 46 #define DB1300_DC_INT (DB1300_FIRST_INT + 6) 47 #define DB1300_FLASH_INT (DB1300_FIRST_INT + 7) 48 #define DB1300_CF_INSERT_INT (DB1300_FIRST_INT + 8) 49 #define DB1300_CF_EJECT_INT (DB1300_FIRST_INT + 9) 50 #define DB1300_AC97_INT (DB1300_FIRST_INT + 10) 51 #define DB1300_AC97_PEN_INT (DB1300_FIRST_INT + 11) 52 #define DB1300_SD1_INSERT_INT (DB1300_FIRST_INT + 12) 53 #define DB1300_SD1_EJECT_INT (DB1300_FIRST_INT + 13) 54 #define DB1300_OTG_VBUS_OC_INT (DB1300_FIRST_INT + 14) 55 #define DB1300_HOST_VBUS_OC_INT (DB1300_FIRST_INT + 15) 56 #define DB1300_LAST_INT (DB1300_FIRST_INT + 15) 57 58 /* SMSC9210 CS */ 59 #define DB1300_ETH_PHYS_ADDR 0x19000000 60 #define DB1300_ETH_PHYS_END 0x197fffff 61 62 /* ATA CS */ 63 #define DB1300_IDE_PHYS_ADDR 0x18800000 64 #define DB1300_IDE_REG_SHIFT 5 65 #define DB1300_IDE_PHYS_LEN (16 << DB1300_IDE_REG_SHIFT) 66 67 /* NAND CS */ 68 #define DB1300_NAND_PHYS_ADDR 0x20000000 69 #define DB1300_NAND_PHYS_END 0x20000fff 70 71 72 static struct i2c_board_info db1300_i2c_devs[] __initdata = { 73 { I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec */ 74 { I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */ 75 }; 76 77 /* multifunction pins to assign to GPIO controller */ 78 static int db1300_gpio_pins[] __initdata = { 79 AU1300_PIN_LCDPWM0, AU1300_PIN_PSC2SYNC1, AU1300_PIN_WAKE1, 80 AU1300_PIN_WAKE2, AU1300_PIN_WAKE3, AU1300_PIN_FG3AUX, 81 AU1300_PIN_EXTCLK1, 82 -1, /* terminator */ 83 }; 84 85 /* multifunction pins to assign to device functions */ 86 static int db1300_dev_pins[] __initdata = { 87 /* wake-from-str pins 0-3 */ 88 AU1300_PIN_WAKE0, 89 /* external clock sources for PSC0 */ 90 AU1300_PIN_EXTCLK0, 91 /* 8bit MMC interface on SD0: 6-9 */ 92 AU1300_PIN_SD0DAT4, AU1300_PIN_SD0DAT5, AU1300_PIN_SD0DAT6, 93 AU1300_PIN_SD0DAT7, 94 /* UART1 pins: 11-18 */ 95 AU1300_PIN_U1RI, AU1300_PIN_U1DCD, AU1300_PIN_U1DSR, 96 AU1300_PIN_U1CTS, AU1300_PIN_U1RTS, AU1300_PIN_U1DTR, 97 AU1300_PIN_U1RX, AU1300_PIN_U1TX, 98 /* UART0 pins: 19-24 */ 99 AU1300_PIN_U0RI, AU1300_PIN_U0DCD, AU1300_PIN_U0DSR, 100 AU1300_PIN_U0CTS, AU1300_PIN_U0RTS, AU1300_PIN_U0DTR, 101 /* UART2: 25-26 */ 102 AU1300_PIN_U2RX, AU1300_PIN_U2TX, 103 /* UART3: 27-28 */ 104 AU1300_PIN_U3RX, AU1300_PIN_U3TX, 105 /* LCD controller PWMs, ext pixclock: 30-31 */ 106 AU1300_PIN_LCDPWM1, AU1300_PIN_LCDCLKIN, 107 /* SD1 interface: 32-37 */ 108 AU1300_PIN_SD1DAT0, AU1300_PIN_SD1DAT1, AU1300_PIN_SD1DAT2, 109 AU1300_PIN_SD1DAT3, AU1300_PIN_SD1CMD, AU1300_PIN_SD1CLK, 110 /* SD2 interface: 38-43 */ 111 AU1300_PIN_SD2DAT0, AU1300_PIN_SD2DAT1, AU1300_PIN_SD2DAT2, 112 AU1300_PIN_SD2DAT3, AU1300_PIN_SD2CMD, AU1300_PIN_SD2CLK, 113 /* PSC0/1 clocks: 44-45 */ 114 AU1300_PIN_PSC0CLK, AU1300_PIN_PSC1CLK, 115 /* PSCs: 46-49/50-53/54-57/58-61 */ 116 AU1300_PIN_PSC0SYNC0, AU1300_PIN_PSC0SYNC1, AU1300_PIN_PSC0D0, 117 AU1300_PIN_PSC0D1, 118 AU1300_PIN_PSC1SYNC0, AU1300_PIN_PSC1SYNC1, AU1300_PIN_PSC1D0, 119 AU1300_PIN_PSC1D1, 120 AU1300_PIN_PSC2SYNC0, AU1300_PIN_PSC2D0, 121 AU1300_PIN_PSC2D1, 122 AU1300_PIN_PSC3SYNC0, AU1300_PIN_PSC3SYNC1, AU1300_PIN_PSC3D0, 123 AU1300_PIN_PSC3D1, 124 /* PCMCIA interface: 62-70 */ 125 AU1300_PIN_PCE2, AU1300_PIN_PCE1, AU1300_PIN_PIOS16, 126 AU1300_PIN_PIOR, AU1300_PIN_PWE, AU1300_PIN_PWAIT, 127 AU1300_PIN_PREG, AU1300_PIN_POE, AU1300_PIN_PIOW, 128 /* camera interface H/V sync inputs: 71-72 */ 129 AU1300_PIN_CIMLS, AU1300_PIN_CIMFS, 130 /* PSC2/3 clocks: 73-74 */ 131 AU1300_PIN_PSC2CLK, AU1300_PIN_PSC3CLK, 132 -1, /* terminator */ 133 }; 134 135 static void __init db1300_gpio_config(void) 136 { 137 int *i; 138 139 i = &db1300_dev_pins[0]; 140 while (*i != -1) 141 au1300_pinfunc_to_dev(*i++); 142 143 i = &db1300_gpio_pins[0]; 144 while (*i != -1) 145 au1300_gpio_direction_input(*i++);/* implies pin_to_gpio */ 146 147 au1300_set_dbdma_gpio(1, AU1300_PIN_FG3AUX); 148 } 149 150 /**********************************************************************/ 151 152 static u64 au1300_all_dmamask = DMA_BIT_MASK(32); 153 154 static void au1300_nand_cmd_ctrl(struct nand_chip *this, int cmd, 155 unsigned int ctrl) 156 { 157 unsigned long ioaddr = (unsigned long)this->legacy.IO_ADDR_W; 158 159 ioaddr &= 0xffffff00; 160 161 if (ctrl & NAND_CLE) { 162 ioaddr += MEM_STNAND_CMD; 163 } else if (ctrl & NAND_ALE) { 164 ioaddr += MEM_STNAND_ADDR; 165 } else { 166 /* assume we want to r/w real data by default */ 167 ioaddr += MEM_STNAND_DATA; 168 } 169 this->legacy.IO_ADDR_R = this->legacy.IO_ADDR_W = (void __iomem *)ioaddr; 170 if (cmd != NAND_CMD_NONE) { 171 __raw_writeb(cmd, this->legacy.IO_ADDR_W); 172 wmb(); 173 } 174 } 175 176 static int au1300_nand_device_ready(struct nand_chip *this) 177 { 178 return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1; 179 } 180 181 static struct mtd_partition db1300_nand_parts[] = { 182 { 183 .name = "NAND FS 0", 184 .offset = 0, 185 .size = 8 * 1024 * 1024, 186 }, 187 { 188 .name = "NAND FS 1", 189 .offset = MTDPART_OFS_APPEND, 190 .size = MTDPART_SIZ_FULL 191 }, 192 }; 193 194 struct platform_nand_data db1300_nand_platdata = { 195 .chip = { 196 .nr_chips = 1, 197 .chip_offset = 0, 198 .nr_partitions = ARRAY_SIZE(db1300_nand_parts), 199 .partitions = db1300_nand_parts, 200 .chip_delay = 20, 201 }, 202 .ctrl = { 203 .dev_ready = au1300_nand_device_ready, 204 .cmd_ctrl = au1300_nand_cmd_ctrl, 205 }, 206 }; 207 208 static struct resource db1300_nand_res[] = { 209 [0] = { 210 .start = DB1300_NAND_PHYS_ADDR, 211 .end = DB1300_NAND_PHYS_ADDR + 0xff, 212 .flags = IORESOURCE_MEM, 213 }, 214 }; 215 216 static struct platform_device db1300_nand_dev = { 217 .name = "gen_nand", 218 .num_resources = ARRAY_SIZE(db1300_nand_res), 219 .resource = db1300_nand_res, 220 .id = -1, 221 .dev = { 222 .platform_data = &db1300_nand_platdata, 223 } 224 }; 225 226 /**********************************************************************/ 227 228 static struct resource db1300_eth_res[] = { 229 [0] = { 230 .start = DB1300_ETH_PHYS_ADDR, 231 .end = DB1300_ETH_PHYS_END, 232 .flags = IORESOURCE_MEM, 233 }, 234 [1] = { 235 .start = DB1300_ETH_INT, 236 .end = DB1300_ETH_INT, 237 .flags = IORESOURCE_IRQ, 238 }, 239 }; 240 241 static u8 db1300_eth_macaddr[6]; 242 243 static const struct property_entry db1300_eth_props[] __initconst = { 244 PROPERTY_ENTRY_U32("reg-io-width", 4), 245 PROPERTY_ENTRY_U32("reg-shift", 0), 246 PROPERTY_ENTRY_BOOL("smsc,irq-push-pull"), 247 PROPERTY_ENTRY_STRING("phy-mode", "mii"), 248 PROPERTY_ENTRY_U8_ARRAY("local-mac-address", db1300_eth_macaddr), 249 { } 250 }; 251 252 static const struct platform_device_info db1300_eth_info __initconst = { 253 .name = "smsc911x", 254 .id = PLATFORM_DEVID_NONE, 255 .res = db1300_eth_res, 256 .num_res = ARRAY_SIZE(db1300_eth_res), 257 .properties = db1300_eth_props, 258 }; 259 260 static void __init db1300_eth_init(void) 261 { 262 struct platform_device *pd; 263 int err; 264 265 prom_get_ethernet_addr(db1300_eth_macaddr); 266 267 pd = platform_device_register_full(&db1300_eth_info); 268 err = PTR_ERR_OR_ZERO(pd); 269 if (err) 270 pr_err("failed to create eth device: %d\n", err); 271 } 272 273 /**********************************************************************/ 274 275 static struct resource au1300_psc1_res[] = { 276 [0] = { 277 .start = AU1300_PSC1_PHYS_ADDR, 278 .end = AU1300_PSC1_PHYS_ADDR + 0x0fff, 279 .flags = IORESOURCE_MEM, 280 }, 281 [1] = { 282 .start = AU1300_PSC1_INT, 283 .end = AU1300_PSC1_INT, 284 .flags = IORESOURCE_IRQ, 285 }, 286 [2] = { 287 .start = AU1300_DSCR_CMD0_PSC1_TX, 288 .end = AU1300_DSCR_CMD0_PSC1_TX, 289 .flags = IORESOURCE_DMA, 290 }, 291 [3] = { 292 .start = AU1300_DSCR_CMD0_PSC1_RX, 293 .end = AU1300_DSCR_CMD0_PSC1_RX, 294 .flags = IORESOURCE_DMA, 295 }, 296 }; 297 298 static struct platform_device db1300_ac97_dev = { 299 .name = "au1xpsc_ac97", 300 .id = 1, /* PSC ID. match with AC97 codec ID! */ 301 .num_resources = ARRAY_SIZE(au1300_psc1_res), 302 .resource = au1300_psc1_res, 303 }; 304 305 /**********************************************************************/ 306 307 static struct resource au1300_psc2_res[] = { 308 [0] = { 309 .start = AU1300_PSC2_PHYS_ADDR, 310 .end = AU1300_PSC2_PHYS_ADDR + 0x0fff, 311 .flags = IORESOURCE_MEM, 312 }, 313 [1] = { 314 .start = AU1300_PSC2_INT, 315 .end = AU1300_PSC2_INT, 316 .flags = IORESOURCE_IRQ, 317 }, 318 [2] = { 319 .start = AU1300_DSCR_CMD0_PSC2_TX, 320 .end = AU1300_DSCR_CMD0_PSC2_TX, 321 .flags = IORESOURCE_DMA, 322 }, 323 [3] = { 324 .start = AU1300_DSCR_CMD0_PSC2_RX, 325 .end = AU1300_DSCR_CMD0_PSC2_RX, 326 .flags = IORESOURCE_DMA, 327 }, 328 }; 329 330 static struct platform_device db1300_i2s_dev = { 331 .name = "au1xpsc_i2s", 332 .id = 2, /* PSC ID */ 333 .num_resources = ARRAY_SIZE(au1300_psc2_res), 334 .resource = au1300_psc2_res, 335 }; 336 337 /**********************************************************************/ 338 339 static struct resource au1300_psc3_res[] = { 340 [0] = { 341 .start = AU1300_PSC3_PHYS_ADDR, 342 .end = AU1300_PSC3_PHYS_ADDR + 0x0fff, 343 .flags = IORESOURCE_MEM, 344 }, 345 [1] = { 346 .start = AU1300_PSC3_INT, 347 .end = AU1300_PSC3_INT, 348 .flags = IORESOURCE_IRQ, 349 }, 350 [2] = { 351 .start = AU1300_DSCR_CMD0_PSC3_TX, 352 .end = AU1300_DSCR_CMD0_PSC3_TX, 353 .flags = IORESOURCE_DMA, 354 }, 355 [3] = { 356 .start = AU1300_DSCR_CMD0_PSC3_RX, 357 .end = AU1300_DSCR_CMD0_PSC3_RX, 358 .flags = IORESOURCE_DMA, 359 }, 360 }; 361 362 static struct platform_device db1300_i2c_dev = { 363 .name = "au1xpsc_smbus", 364 .id = 0, /* bus number */ 365 .num_resources = ARRAY_SIZE(au1300_psc3_res), 366 .resource = au1300_psc3_res, 367 }; 368 369 /**********************************************************************/ 370 371 static const struct property_entry db1300_5waysw_props[] = { 372 PROPERTY_ENTRY_BOOL("autorepeat"), 373 PROPERTY_ENTRY_STRING("label", "db1300-5wayswitch"), 374 { } 375 }; 376 377 /* proper key assignments when facing the LCD panel. For key assignments 378 * according to the schematics swap up with down and left with right. 379 * I chose to use it to emulate the arrow keys of a keyboard. 380 */ 381 static const struct software_node db1300_5waysw_node = { 382 .name = "db1300-5wayswitch", 383 .properties = db1300_5waysw_props, 384 }; 385 386 static const struct property_entry db1300_5waysw_down_props[] = { 387 PROPERTY_ENTRY_U32("linux,code", KEY_DOWN), 388 PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpic_node, 389 AU1300_PIN_LCDPWM0, GPIO_ACTIVE_LOW), 390 PROPERTY_ENTRY_U32("debounce-interval", 1), 391 PROPERTY_ENTRY_STRING("label", "5waysw-down"), 392 { } 393 }; 394 395 static const struct software_node db1300_5waysw_down_node = { 396 .name = "5waysw-down", 397 .parent = &db1300_5waysw_node, 398 .properties = db1300_5waysw_down_props, 399 }; 400 401 static const struct property_entry db1300_5waysw_up_props[] = { 402 PROPERTY_ENTRY_U32("linux,code", KEY_UP), 403 PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpic_node, 404 AU1300_PIN_PSC2SYNC1, GPIO_ACTIVE_LOW), 405 PROPERTY_ENTRY_U32("debounce-interval", 1), 406 PROPERTY_ENTRY_STRING("label", "5waysw-up"), 407 { } 408 }; 409 410 static const struct software_node db1300_5waysw_up_node = { 411 .name = "5waysw-up", 412 .parent = &db1300_5waysw_node, 413 .properties = db1300_5waysw_up_props, 414 }; 415 416 static const struct property_entry db1300_5waysw_right_props[] = { 417 PROPERTY_ENTRY_U32("linux,code", KEY_RIGHT), 418 PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpic_node, 419 AU1300_PIN_WAKE3, GPIO_ACTIVE_LOW), 420 PROPERTY_ENTRY_U32("debounce-interval", 1), 421 PROPERTY_ENTRY_STRING("label", "5waysw-right"), 422 { } 423 }; 424 425 static const struct software_node db1300_5waysw_right_node = { 426 .name = "5waysw-right", 427 .parent = &db1300_5waysw_node, 428 .properties = db1300_5waysw_right_props, 429 }; 430 431 static const struct property_entry db1300_5waysw_left_props[] = { 432 PROPERTY_ENTRY_U32("linux,code", KEY_LEFT), 433 PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpic_node, 434 AU1300_PIN_WAKE2, GPIO_ACTIVE_LOW), 435 PROPERTY_ENTRY_U32("debounce-interval", 1), 436 PROPERTY_ENTRY_STRING("label", "5waysw-left"), 437 { } 438 }; 439 440 static const struct software_node db1300_5waysw_left_node = { 441 .name = "5waysw-left", 442 .parent = &db1300_5waysw_node, 443 .properties = db1300_5waysw_left_props, 444 }; 445 446 static const struct property_entry db1300_5waysw_push_props[] = { 447 PROPERTY_ENTRY_U32("linux,code", KEY_ENTER), 448 PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpic_node, 449 AU1300_PIN_WAKE1, GPIO_ACTIVE_LOW), 450 PROPERTY_ENTRY_U32("debounce-interval", 1), 451 PROPERTY_ENTRY_STRING("label", "5waysw-push"), 452 { } 453 }; 454 455 static const struct software_node db1300_5waysw_push_node = { 456 .name = "5waysw-push", 457 .parent = &db1300_5waysw_node, 458 .properties = db1300_5waysw_push_props, 459 }; 460 461 static const struct software_node * const db1300_5waysw_swnodes[] __initconst = { 462 &db1300_5waysw_node, 463 &db1300_5waysw_down_node, 464 &db1300_5waysw_up_node, 465 &db1300_5waysw_right_node, 466 &db1300_5waysw_left_node, 467 &db1300_5waysw_push_node, 468 NULL 469 }; 470 471 static void __init db1300_5waysw_init(void) 472 { 473 const struct platform_device_info pdevinfo = { 474 .name = "gpio-keys", 475 .id = PLATFORM_DEVID_NONE, 476 .swnode = &db1300_5waysw_node, 477 }; 478 struct platform_device *pd; 479 int err; 480 481 err = software_node_register_node_group(db1300_5waysw_swnodes); 482 if (err) { 483 pr_err("failed to register 5waysw software nodes: %d\n", err); 484 return; 485 } 486 487 pd = platform_device_register_full(&pdevinfo); 488 err = PTR_ERR_OR_ZERO(pd); 489 if (err) 490 pr_err("failed to create 5waysw device: %d\n", err); 491 } 492 493 /**********************************************************************/ 494 495 static struct pata_platform_info db1300_ide_info = { 496 .ioport_shift = DB1300_IDE_REG_SHIFT, 497 }; 498 499 #define IDE_ALT_START (14 << DB1300_IDE_REG_SHIFT) 500 static struct resource db1300_ide_res[] = { 501 [0] = { 502 .start = DB1300_IDE_PHYS_ADDR, 503 .end = DB1300_IDE_PHYS_ADDR + IDE_ALT_START - 1, 504 .flags = IORESOURCE_MEM, 505 }, 506 [1] = { 507 .start = DB1300_IDE_PHYS_ADDR + IDE_ALT_START, 508 .end = DB1300_IDE_PHYS_ADDR + DB1300_IDE_PHYS_LEN - 1, 509 .flags = IORESOURCE_MEM, 510 }, 511 [2] = { 512 .start = DB1300_IDE_INT, 513 .end = DB1300_IDE_INT, 514 .flags = IORESOURCE_IRQ, 515 }, 516 }; 517 518 static struct platform_device db1300_ide_dev = { 519 .dev = { 520 .dma_mask = &au1300_all_dmamask, 521 .coherent_dma_mask = DMA_BIT_MASK(32), 522 .platform_data = &db1300_ide_info, 523 }, 524 .name = "pata_platform", 525 .resource = db1300_ide_res, 526 .num_resources = ARRAY_SIZE(db1300_ide_res), 527 }; 528 529 /**********************************************************************/ 530 531 #ifdef CONFIG_MMC_AU1X 532 static irqreturn_t db1300_mmc_cd(int irq, void *ptr) 533 { 534 disable_irq_nosync(irq); 535 return IRQ_WAKE_THREAD; 536 } 537 538 static irqreturn_t db1300_mmc_cdfn(int irq, void *ptr) 539 { 540 mmc_detect_change(ptr, msecs_to_jiffies(200)); 541 542 msleep(100); /* debounce */ 543 if (irq == DB1300_SD1_INSERT_INT) 544 enable_irq(DB1300_SD1_EJECT_INT); 545 else 546 enable_irq(DB1300_SD1_INSERT_INT); 547 548 return IRQ_HANDLED; 549 } 550 551 static int db1300_mmc_card_readonly(void *mmc_host) 552 { 553 /* it uses SD1 interface, but the DB1200's SD0 bit in the CPLD */ 554 return bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP; 555 } 556 557 static int db1300_mmc_card_inserted(void *mmc_host) 558 { 559 return bcsr_read(BCSR_SIGSTAT) & (1 << 12); /* insertion irq signal */ 560 } 561 562 static int db1300_mmc_cd_setup(void *mmc_host, int en) 563 { 564 int ret; 565 566 if (en) { 567 ret = request_threaded_irq(DB1300_SD1_INSERT_INT, db1300_mmc_cd, 568 db1300_mmc_cdfn, 0, "sd_insert", mmc_host); 569 if (ret) 570 goto out; 571 572 ret = request_threaded_irq(DB1300_SD1_EJECT_INT, db1300_mmc_cd, 573 db1300_mmc_cdfn, 0, "sd_eject", mmc_host); 574 if (ret) { 575 free_irq(DB1300_SD1_INSERT_INT, mmc_host); 576 goto out; 577 } 578 579 if (db1300_mmc_card_inserted(mmc_host)) 580 enable_irq(DB1300_SD1_EJECT_INT); 581 else 582 enable_irq(DB1300_SD1_INSERT_INT); 583 584 } else { 585 free_irq(DB1300_SD1_INSERT_INT, mmc_host); 586 free_irq(DB1300_SD1_EJECT_INT, mmc_host); 587 } 588 ret = 0; 589 out: 590 return ret; 591 } 592 593 static void db1300_mmcled_set(struct led_classdev *led, 594 enum led_brightness brightness) 595 { 596 if (brightness != LED_OFF) 597 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0); 598 else 599 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0); 600 } 601 602 static struct led_classdev db1300_mmc_led = { 603 .brightness_set = db1300_mmcled_set, 604 }; 605 606 struct au1xmmc_platform_data db1300_sd1_platdata = { 607 .cd_setup = db1300_mmc_cd_setup, 608 .card_inserted = db1300_mmc_card_inserted, 609 .card_readonly = db1300_mmc_card_readonly, 610 .led = &db1300_mmc_led, 611 }; 612 613 static struct resource au1300_sd1_res[] = { 614 [0] = { 615 .start = AU1300_SD1_PHYS_ADDR, 616 .end = AU1300_SD1_PHYS_ADDR, 617 .flags = IORESOURCE_MEM, 618 }, 619 [1] = { 620 .start = AU1300_SD1_INT, 621 .end = AU1300_SD1_INT, 622 .flags = IORESOURCE_IRQ, 623 }, 624 [2] = { 625 .start = AU1300_DSCR_CMD0_SDMS_TX1, 626 .end = AU1300_DSCR_CMD0_SDMS_TX1, 627 .flags = IORESOURCE_DMA, 628 }, 629 [3] = { 630 .start = AU1300_DSCR_CMD0_SDMS_RX1, 631 .end = AU1300_DSCR_CMD0_SDMS_RX1, 632 .flags = IORESOURCE_DMA, 633 }, 634 }; 635 636 static struct platform_device db1300_sd1_dev = { 637 .dev = { 638 .dma_mask = &au1300_all_dmamask, 639 .coherent_dma_mask = DMA_BIT_MASK(32), 640 .platform_data = &db1300_sd1_platdata, 641 }, 642 .name = "au1xxx-mmc", 643 .id = 1, 644 .resource = au1300_sd1_res, 645 .num_resources = ARRAY_SIZE(au1300_sd1_res), 646 }; 647 648 /**********************************************************************/ 649 650 static int db1300_movinand_inserted(void *mmc_host) 651 { 652 return 0; /* disable for now, it doesn't work yet */ 653 } 654 655 static int db1300_movinand_readonly(void *mmc_host) 656 { 657 return 0; 658 } 659 660 static void db1300_movinand_led_set(struct led_classdev *led, 661 enum led_brightness brightness) 662 { 663 if (brightness != LED_OFF) 664 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0); 665 else 666 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1); 667 } 668 669 static struct led_classdev db1300_movinand_led = { 670 .brightness_set = db1300_movinand_led_set, 671 }; 672 673 struct au1xmmc_platform_data db1300_sd0_platdata = { 674 .card_inserted = db1300_movinand_inserted, 675 .card_readonly = db1300_movinand_readonly, 676 .led = &db1300_movinand_led, 677 .mask_host_caps = MMC_CAP_NEEDS_POLL, 678 }; 679 680 static struct resource au1300_sd0_res[] = { 681 [0] = { 682 .start = AU1100_SD0_PHYS_ADDR, 683 .end = AU1100_SD0_PHYS_ADDR, 684 .flags = IORESOURCE_MEM, 685 }, 686 [1] = { 687 .start = AU1300_SD0_INT, 688 .end = AU1300_SD0_INT, 689 .flags = IORESOURCE_IRQ, 690 }, 691 [2] = { 692 .start = AU1300_DSCR_CMD0_SDMS_TX0, 693 .end = AU1300_DSCR_CMD0_SDMS_TX0, 694 .flags = IORESOURCE_DMA, 695 }, 696 [3] = { 697 .start = AU1300_DSCR_CMD0_SDMS_RX0, 698 .end = AU1300_DSCR_CMD0_SDMS_RX0, 699 .flags = IORESOURCE_DMA, 700 }, 701 }; 702 703 static struct platform_device db1300_sd0_dev = { 704 .dev = { 705 .dma_mask = &au1300_all_dmamask, 706 .coherent_dma_mask = DMA_BIT_MASK(32), 707 .platform_data = &db1300_sd0_platdata, 708 }, 709 .name = "au1xxx-mmc", 710 .id = 0, 711 .resource = au1300_sd0_res, 712 .num_resources = ARRAY_SIZE(au1300_sd0_res), 713 }; 714 #endif /* CONFIG_MMC_AU1X */ 715 716 /**********************************************************************/ 717 718 static struct platform_device db1300_wm9715_dev = { 719 .name = "wm9712-codec", 720 .id = 1, /* ID of PSC for AC97 audio, see asoc glue! */ 721 }; 722 723 static struct platform_device db1300_ac97dma_dev = { 724 .name = "au1xpsc-pcm", 725 .id = 1, /* PSC ID */ 726 }; 727 728 static struct platform_device db1300_i2sdma_dev = { 729 .name = "au1xpsc-pcm", 730 .id = 2, /* PSC ID */ 731 }; 732 733 static struct platform_device db1300_sndac97_dev = { 734 .name = "db1300-ac97", 735 .dev = { 736 .dma_mask = &au1300_all_dmamask, 737 .coherent_dma_mask = DMA_BIT_MASK(32), 738 }, 739 }; 740 741 static struct platform_device db1300_sndi2s_dev = { 742 .name = "db1300-i2s", 743 .dev = { 744 .dma_mask = &au1300_all_dmamask, 745 .coherent_dma_mask = DMA_BIT_MASK(32), 746 }, 747 }; 748 749 /**********************************************************************/ 750 751 static int db1300fb_panel_index(void) 752 { 753 return 9; /* DB1300_800x480 */ 754 } 755 756 static int db1300fb_panel_init(void) 757 { 758 /* Apply power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */ 759 bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD, 760 BCSR_BOARD_LCDBL); 761 return 0; 762 } 763 764 static int db1300fb_panel_shutdown(void) 765 { 766 /* Remove power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */ 767 bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDBL, 768 BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD); 769 return 0; 770 } 771 772 static struct au1200fb_platdata db1300fb_pd = { 773 .panel_index = db1300fb_panel_index, 774 .panel_init = db1300fb_panel_init, 775 .panel_shutdown = db1300fb_panel_shutdown, 776 }; 777 778 static struct resource au1300_lcd_res[] = { 779 [0] = { 780 .start = AU1200_LCD_PHYS_ADDR, 781 .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1, 782 .flags = IORESOURCE_MEM, 783 }, 784 [1] = { 785 .start = AU1300_LCD_INT, 786 .end = AU1300_LCD_INT, 787 .flags = IORESOURCE_IRQ, 788 } 789 }; 790 791 792 static struct platform_device db1300_lcd_dev = { 793 .name = "au1200-lcd", 794 .id = 0, 795 .dev = { 796 .dma_mask = &au1300_all_dmamask, 797 .coherent_dma_mask = DMA_BIT_MASK(32), 798 .platform_data = &db1300fb_pd, 799 }, 800 .num_resources = ARRAY_SIZE(au1300_lcd_res), 801 .resource = au1300_lcd_res, 802 }; 803 804 /**********************************************************************/ 805 806 #if IS_ENABLED(CONFIG_TOUCHSCREEN_WM97XX) 807 static struct wm97xx_mach_ops db1300_wm97xx_ops = { 808 .irq_gpio = WM97XX_GPIO_3, 809 }; 810 811 static int db1300_wm97xx_probe(struct platform_device *pdev) 812 { 813 struct wm97xx *wm = platform_get_drvdata(pdev); 814 815 /* external pendown indicator */ 816 wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN, 817 WM97XX_GPIO_POL_LOW, WM97XX_GPIO_STICKY, 818 WM97XX_GPIO_WAKE); 819 820 /* internal "virtual" pendown gpio */ 821 wm97xx_config_gpio(wm, WM97XX_GPIO_3, WM97XX_GPIO_OUT, 822 WM97XX_GPIO_POL_LOW, WM97XX_GPIO_NOTSTICKY, 823 WM97XX_GPIO_NOWAKE); 824 825 wm->pen_irq = DB1300_AC97_PEN_INT; 826 827 return wm97xx_register_mach_ops(wm, &db1300_wm97xx_ops); 828 } 829 #else 830 static int db1300_wm97xx_probe(struct platform_device *pdev) 831 { 832 return -ENODEV; 833 } 834 #endif 835 836 static struct platform_driver db1300_wm97xx_driver = { 837 .driver.name = "wm97xx-touch", 838 .driver.owner = THIS_MODULE, 839 .probe = db1300_wm97xx_probe, 840 }; 841 842 /**********************************************************************/ 843 844 static struct platform_device *db1300_dev[] __initdata = { 845 &db1300_i2c_dev, 846 &db1300_nand_dev, 847 &db1300_ide_dev, 848 #ifdef CONFIG_MMC_AU1X 849 &db1300_sd0_dev, 850 &db1300_sd1_dev, 851 #endif 852 &db1300_lcd_dev, 853 &db1300_ac97_dev, 854 &db1300_i2s_dev, 855 &db1300_wm9715_dev, 856 &db1300_ac97dma_dev, 857 &db1300_i2sdma_dev, 858 &db1300_sndac97_dev, 859 &db1300_sndi2s_dev, 860 }; 861 862 int __init db1300_dev_setup(void) 863 { 864 int swapped, cpldirq; 865 struct clk *c; 866 867 /* setup CPLD IRQ muxer */ 868 cpldirq = au1300_gpio_to_irq(AU1300_PIN_EXTCLK1); 869 irq_set_irq_type(cpldirq, IRQ_TYPE_LEVEL_HIGH); 870 bcsr_init_irq(DB1300_FIRST_INT, DB1300_LAST_INT, cpldirq); 871 872 /* insert/eject IRQs: one always triggers so don't enable them 873 * when doing request_irq() on them. DB1200 has this bug too. 874 */ 875 irq_set_status_flags(DB1300_SD1_INSERT_INT, IRQ_NOAUTOEN); 876 irq_set_status_flags(DB1300_SD1_EJECT_INT, IRQ_NOAUTOEN); 877 irq_set_status_flags(DB1300_CF_INSERT_INT, IRQ_NOAUTOEN); 878 irq_set_status_flags(DB1300_CF_EJECT_INT, IRQ_NOAUTOEN); 879 880 /* 881 * setup board 882 */ 883 i2c_register_board_info(0, db1300_i2c_devs, 884 ARRAY_SIZE(db1300_i2c_devs)); 885 886 if (platform_driver_register(&db1300_wm97xx_driver)) 887 pr_warn("DB1300: failed to init touch pen irq support!\n"); 888 889 /* Audio PSC clock is supplied by codecs (PSC1, 2) */ 890 __raw_writel(PSC_SEL_CLK_SERCLK, 891 (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET); 892 wmb(); 893 __raw_writel(PSC_SEL_CLK_SERCLK, 894 (void __iomem *)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET); 895 wmb(); 896 /* I2C driver wants 50MHz, get as close as possible */ 897 c = clk_get(NULL, "psc3_intclk"); 898 if (!IS_ERR(c)) { 899 clk_set_rate(c, 50000000); 900 clk_prepare_enable(c); 901 clk_put(c); 902 } 903 __raw_writel(PSC_SEL_CLK_INTCLK, 904 (void __iomem *)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET); 905 wmb(); 906 907 /* enable power to USB ports */ 908 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_USBHPWR | BCSR_RESETS_OTGPWR); 909 910 /* although it is socket #0, it uses the CPLD bits which previous boards 911 * have used for socket #1. 912 */ 913 db1x_register_pcmcia_socket( 914 AU1000_PCMCIA_ATTR_PHYS_ADDR, 915 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x00400000 - 1, 916 AU1000_PCMCIA_MEM_PHYS_ADDR, 917 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x00400000 - 1, 918 AU1000_PCMCIA_IO_PHYS_ADDR, 919 AU1000_PCMCIA_IO_PHYS_ADDR + 0x00010000 - 1, 920 DB1300_CF_INT, DB1300_CF_INSERT_INT, 0, DB1300_CF_EJECT_INT, 1); 921 922 swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT; 923 db1x_register_norflash(64 << 20, 2, swapped); 924 925 db1300_eth_init(); 926 db1300_5waysw_init(); 927 928 return platform_add_devices(db1300_dev, ARRAY_SIZE(db1300_dev)); 929 } 930 931 932 int __init db1300_board_setup(void) 933 { 934 unsigned short whoami; 935 936 bcsr_init(DB1300_BCSR_PHYS_ADDR, 937 DB1300_BCSR_PHYS_ADDR + DB1300_BCSR_HEXLED_OFS); 938 939 whoami = bcsr_read(BCSR_WHOAMI); 940 if (BCSR_WHOAMI_BOARD(whoami) != BCSR_WHOAMI_DB1300) 941 return -ENODEV; 942 943 db1300_gpio_config(); 944 945 printk(KERN_INFO "NetLogic DBAu1300 Development Platform.\n\t" 946 "BoardID %d CPLD Rev %d DaughtercardID %d\n", 947 BCSR_WHOAMI_BOARD(whoami), BCSR_WHOAMI_CPLD(whoami), 948 BCSR_WHOAMI_DCID(whoami)); 949 950 /* enable UARTs, YAMON only enables #2 */ 951 alchemy_uart_enable(AU1300_UART0_PHYS_ADDR); 952 alchemy_uart_enable(AU1300_UART1_PHYS_ADDR); 953 alchemy_uart_enable(AU1300_UART3_PHYS_ADDR); 954 955 return 0; 956 } 957