1 /* 2 * Copyright 2000, 2007-2008 MontaVista Software Inc. 3 * Author: MontaVista Software, Inc. <source@mvista.com 4 * 5 * Updates to 2.6, Pete Popov, Embedded Alley Solutions, Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 * 12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 22 * 23 * You should have received a copy of the GNU General Public License along 24 * with this program; if not, write to the Free Software Foundation, Inc., 25 * 675 Mass Ave, Cambridge, MA 02139, USA. 26 */ 27 28 #include <linux/init.h> 29 #include <linux/ioport.h> 30 #include <linux/jiffies.h> 31 #include <linux/module.h> 32 33 #include <asm/mipsregs.h> 34 #include <asm/time.h> 35 36 #include <au1000.h> 37 38 extern void __init board_setup(void); 39 extern void set_cpuspec(void); 40 41 void __init plat_mem_setup(void) 42 { 43 unsigned long est_freq; 44 45 /* determine core clock */ 46 est_freq = au1xxx_calc_clock(); 47 est_freq += 5000; /* round */ 48 est_freq -= est_freq % 10000; 49 printk(KERN_INFO "(PRId %08x) @ %lu.%02lu MHz\n", read_c0_prid(), 50 est_freq / 1000000, ((est_freq % 1000000) * 100) / 1000000); 51 52 /* this is faster than wasting cycles trying to approximate it */ 53 preset_lpj = (est_freq >> 1) / HZ; 54 55 board_setup(); /* board specific setup */ 56 57 if (au1xxx_cpu_needs_config_od()) 58 /* Various early Au1xx0 errata corrected by this */ 59 set_c0_config(1 << 19); /* Set Config[OD] */ 60 else 61 /* Clear to obtain best system bus performance */ 62 clear_c0_config(1 << 19); /* Clear Config[OD] */ 63 64 /* IO/MEM resources. */ 65 set_io_port_base(0); 66 ioport_resource.start = IOPORT_RESOURCE_START; 67 ioport_resource.end = IOPORT_RESOURCE_END; 68 iomem_resource.start = IOMEM_RESOURCE_START; 69 iomem_resource.end = IOMEM_RESOURCE_END; 70 } 71 72 #if defined(CONFIG_64BIT_PHYS_ADDR) 73 /* This routine should be valid for all Au1x based boards */ 74 phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) 75 { 76 /* Don't fixup 36-bit addresses */ 77 if ((phys_addr >> 32) != 0) 78 return phys_addr; 79 80 #ifdef CONFIG_PCI 81 { 82 u32 start = (u32)Au1500_PCI_MEM_START; 83 u32 end = (u32)Au1500_PCI_MEM_END; 84 85 /* Check for PCI memory window */ 86 if (phys_addr >= start && (phys_addr + size - 1) <= end) 87 return (phys_t) 88 ((phys_addr - start) + Au1500_PCI_MEM_START); 89 } 90 #endif 91 92 /* 93 * All Au1xx0 SOCs have a PCMCIA controller. 94 * We setup our 32-bit pseudo addresses to be equal to the 95 * 36-bit addr >> 4, to make it easier to check the address 96 * and fix it. 97 * The PCMCIA socket 0 physical attribute address is 0xF 4000 0000. 98 * The pseudo address we use is 0xF400 0000. Any address over 99 * 0xF400 0000 is a PCMCIA pseudo address. 100 */ 101 if ((phys_addr >= PCMCIA_ATTR_PSEUDO_PHYS) && 102 (phys_addr < PCMCIA_PSEUDO_END)) 103 return (phys_t)(phys_addr << 4); 104 105 /* default nop */ 106 return phys_addr; 107 } 108 EXPORT_SYMBOL(__fixup_bigphys_addr); 109 #endif 110