1 /* 2 * Copyright 2000, 2007-2008 MontaVista Software Inc. 3 * Author: MontaVista Software, Inc. <source@mvista.com 4 * 5 * Updates to 2.6, Pete Popov, Embedded Alley Solutions, Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 * 12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 22 * 23 * You should have received a copy of the GNU General Public License along 24 * with this program; if not, write to the Free Software Foundation, Inc., 25 * 675 Mass Ave, Cambridge, MA 02139, USA. 26 */ 27 28 #include <linux/init.h> 29 #include <linux/ioport.h> 30 #include <linux/module.h> 31 #include <linux/pm.h> 32 33 #include <asm/mipsregs.h> 34 #include <asm/reboot.h> 35 #include <asm/time.h> 36 37 #include <au1000.h> 38 #include <prom.h> 39 40 extern void __init board_setup(void); 41 extern void au1000_restart(char *); 42 extern void au1000_halt(void); 43 extern void au1000_power_off(void); 44 extern void set_cpuspec(void); 45 46 void __init plat_mem_setup(void) 47 { 48 struct cpu_spec *sp; 49 char *argptr; 50 unsigned long prid, cpufreq, bclk; 51 52 set_cpuspec(); 53 sp = cur_cpu_spec[0]; 54 55 board_setup(); /* board specific setup */ 56 57 prid = read_c0_prid(); 58 if (sp->cpu_pll_wo) 59 #ifdef CONFIG_SOC_AU1000_FREQUENCY 60 cpufreq = CONFIG_SOC_AU1000_FREQUENCY / 1000000; 61 #else 62 cpufreq = 396; 63 #endif 64 else 65 cpufreq = (au_readl(SYS_CPUPLL) & 0x3F) * 12; 66 printk(KERN_INFO "(PRID %08lx) @ %ld MHz\n", prid, cpufreq); 67 68 if (sp->cpu_bclk) { 69 /* Enable BCLK switching */ 70 bclk = au_readl(SYS_POWERCTRL); 71 au_writel(bclk | 0x60, SYS_POWERCTRL); 72 printk(KERN_INFO "BCLK switching enabled!\n"); 73 } 74 75 if (sp->cpu_od) 76 /* Various early Au1xx0 errata corrected by this */ 77 set_c0_config(1 << 19); /* Set Config[OD] */ 78 else 79 /* Clear to obtain best system bus performance */ 80 clear_c0_config(1 << 19); /* Clear Config[OD] */ 81 82 argptr = prom_getcmdline(); 83 84 #ifdef CONFIG_SERIAL_8250_CONSOLE 85 argptr = strstr(argptr, "console="); 86 if (argptr == NULL) { 87 argptr = prom_getcmdline(); 88 strcat(argptr, " console=ttyS0,115200"); 89 } 90 #endif 91 92 #ifdef CONFIG_FB_AU1100 93 argptr = strstr(argptr, "video="); 94 if (argptr == NULL) { 95 argptr = prom_getcmdline(); 96 /* default panel */ 97 /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/ 98 } 99 #endif 100 101 #if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000) 102 /* au1000 does not support vra, au1500 and au1100 do */ 103 strcat(argptr, " au1000_audio=vra"); 104 argptr = prom_getcmdline(); 105 #endif 106 _machine_restart = au1000_restart; 107 _machine_halt = au1000_halt; 108 pm_power_off = au1000_power_off; 109 110 /* IO/MEM resources. */ 111 set_io_port_base(0); 112 ioport_resource.start = IOPORT_RESOURCE_START; 113 ioport_resource.end = IOPORT_RESOURCE_END; 114 iomem_resource.start = IOMEM_RESOURCE_START; 115 iomem_resource.end = IOMEM_RESOURCE_END; 116 117 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S); 118 au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL); 119 au_sync(); 120 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S); 121 au_writel(0, SYS_TOYTRIM); 122 } 123 124 #if defined(CONFIG_64BIT_PHYS_ADDR) 125 /* This routine should be valid for all Au1x based boards */ 126 phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) 127 { 128 /* Don't fixup 36-bit addresses */ 129 if ((phys_addr >> 32) != 0) 130 return phys_addr; 131 132 #ifdef CONFIG_PCI 133 { 134 u32 start = (u32)Au1500_PCI_MEM_START; 135 u32 end = (u32)Au1500_PCI_MEM_END; 136 137 /* Check for PCI memory window */ 138 if (phys_addr >= start && (phys_addr + size - 1) <= end) 139 return (phys_t) 140 ((phys_addr - start) + Au1500_PCI_MEM_START); 141 } 142 #endif 143 144 /* 145 * All Au1xx0 SOCs have a PCMCIA controller. 146 * We setup our 32-bit pseudo addresses to be equal to the 147 * 36-bit addr >> 4, to make it easier to check the address 148 * and fix it. 149 * The PCMCIA socket 0 physical attribute address is 0xF 4000 0000. 150 * The pseudo address we use is 0xF400 0000. Any address over 151 * 0xF400 0000 is a PCMCIA pseudo address. 152 */ 153 if ((phys_addr >= 0xF4000000) && (phys_addr < 0xFFFFFFFF)) 154 return (phys_t)(phys_addr << 4); 155 156 /* default nop */ 157 return phys_addr; 158 } 159 EXPORT_SYMBOL(__fixup_bigphys_addr); 160 #endif 161