1 /* 2 * Platform device support for Au1x00 SoCs. 3 * 4 * Copyright 2004, Matt Porter <mporter@kernel.crashing.org> 5 * 6 * (C) Copyright Embedded Alley Solutions, Inc 2005 7 * Author: Pantelis Antoniou <pantelis@embeddedalley.com> 8 * 9 * This file is licensed under the terms of the GNU General Public 10 * License version 2. This program is licensed "as is" without any 11 * warranty of any kind, whether express or implied. 12 */ 13 14 #include <linux/dma-mapping.h> 15 #include <linux/platform_device.h> 16 #include <linux/serial_8250.h> 17 #include <linux/init.h> 18 19 #include <asm/mach-au1x00/au1xxx.h> 20 #include <asm/mach-au1x00/au1xxx_dbdma.h> 21 #include <asm/mach-au1x00/au1100_mmc.h> 22 #include <asm/mach-au1x00/au1xxx_eth.h> 23 24 #define PORT(_base, _irq) \ 25 { \ 26 .mapbase = _base, \ 27 .irq = _irq, \ 28 .regshift = 2, \ 29 .iotype = UPIO_AU, \ 30 .flags = UPF_SKIP_TEST | UPF_IOREMAP | \ 31 UPF_FIXED_TYPE, \ 32 .type = PORT_16550A, \ 33 } 34 35 static struct plat_serial8250_port au1x00_uart_data[] = { 36 #if defined(CONFIG_SERIAL_8250_AU1X00) 37 #if defined(CONFIG_SOC_AU1000) 38 PORT(UART0_PHYS_ADDR, AU1000_UART0_INT), 39 PORT(UART1_PHYS_ADDR, AU1000_UART1_INT), 40 PORT(UART2_PHYS_ADDR, AU1000_UART2_INT), 41 PORT(UART3_PHYS_ADDR, AU1000_UART3_INT), 42 #elif defined(CONFIG_SOC_AU1500) 43 PORT(UART0_PHYS_ADDR, AU1500_UART0_INT), 44 PORT(UART3_PHYS_ADDR, AU1500_UART3_INT), 45 #elif defined(CONFIG_SOC_AU1100) 46 PORT(UART0_PHYS_ADDR, AU1100_UART0_INT), 47 PORT(UART1_PHYS_ADDR, AU1100_UART1_INT), 48 PORT(UART3_PHYS_ADDR, AU1100_UART3_INT), 49 #elif defined(CONFIG_SOC_AU1550) 50 PORT(UART0_PHYS_ADDR, AU1550_UART0_INT), 51 PORT(UART1_PHYS_ADDR, AU1550_UART1_INT), 52 PORT(UART3_PHYS_ADDR, AU1550_UART3_INT), 53 #elif defined(CONFIG_SOC_AU1200) 54 PORT(UART0_PHYS_ADDR, AU1200_UART0_INT), 55 PORT(UART1_PHYS_ADDR, AU1200_UART1_INT), 56 #endif 57 #endif /* CONFIG_SERIAL_8250_AU1X00 */ 58 { }, 59 }; 60 61 static struct platform_device au1xx0_uart_device = { 62 .name = "serial8250", 63 .id = PLAT8250_DEV_AU1X00, 64 .dev = { 65 .platform_data = au1x00_uart_data, 66 }, 67 }; 68 69 /* OHCI (USB full speed host controller) */ 70 static struct resource au1xxx_usb_ohci_resources[] = { 71 [0] = { 72 .start = USB_OHCI_BASE, 73 .end = USB_OHCI_BASE + USB_OHCI_LEN - 1, 74 .flags = IORESOURCE_MEM, 75 }, 76 [1] = { 77 .start = FOR_PLATFORM_C_USB_HOST_INT, 78 .end = FOR_PLATFORM_C_USB_HOST_INT, 79 .flags = IORESOURCE_IRQ, 80 }, 81 }; 82 83 /* The dmamask must be set for OHCI to work */ 84 static u64 ohci_dmamask = DMA_BIT_MASK(32); 85 86 static struct platform_device au1xxx_usb_ohci_device = { 87 .name = "au1xxx-ohci", 88 .id = 0, 89 .dev = { 90 .dma_mask = &ohci_dmamask, 91 .coherent_dma_mask = DMA_BIT_MASK(32), 92 }, 93 .num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources), 94 .resource = au1xxx_usb_ohci_resources, 95 }; 96 97 /*** AU1100 LCD controller ***/ 98 99 #ifdef CONFIG_FB_AU1100 100 static struct resource au1100_lcd_resources[] = { 101 [0] = { 102 .start = LCD_PHYS_ADDR, 103 .end = LCD_PHYS_ADDR + 0x800 - 1, 104 .flags = IORESOURCE_MEM, 105 }, 106 [1] = { 107 .start = AU1100_LCD_INT, 108 .end = AU1100_LCD_INT, 109 .flags = IORESOURCE_IRQ, 110 } 111 }; 112 113 static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32); 114 115 static struct platform_device au1100_lcd_device = { 116 .name = "au1100-lcd", 117 .id = 0, 118 .dev = { 119 .dma_mask = &au1100_lcd_dmamask, 120 .coherent_dma_mask = DMA_BIT_MASK(32), 121 }, 122 .num_resources = ARRAY_SIZE(au1100_lcd_resources), 123 .resource = au1100_lcd_resources, 124 }; 125 #endif 126 127 #ifdef CONFIG_SOC_AU1200 128 /* EHCI (USB high speed host controller) */ 129 static struct resource au1xxx_usb_ehci_resources[] = { 130 [0] = { 131 .start = USB_EHCI_BASE, 132 .end = USB_EHCI_BASE + USB_EHCI_LEN - 1, 133 .flags = IORESOURCE_MEM, 134 }, 135 [1] = { 136 .start = AU1200_USB_INT, 137 .end = AU1200_USB_INT, 138 .flags = IORESOURCE_IRQ, 139 }, 140 }; 141 142 static u64 ehci_dmamask = DMA_BIT_MASK(32); 143 144 static struct platform_device au1xxx_usb_ehci_device = { 145 .name = "au1xxx-ehci", 146 .id = 0, 147 .dev = { 148 .dma_mask = &ehci_dmamask, 149 .coherent_dma_mask = DMA_BIT_MASK(32), 150 }, 151 .num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources), 152 .resource = au1xxx_usb_ehci_resources, 153 }; 154 155 /* Au1200 UDC (USB gadget controller) */ 156 static struct resource au1xxx_usb_gdt_resources[] = { 157 [0] = { 158 .start = USB_UDC_BASE, 159 .end = USB_UDC_BASE + USB_UDC_LEN - 1, 160 .flags = IORESOURCE_MEM, 161 }, 162 [1] = { 163 .start = AU1200_USB_INT, 164 .end = AU1200_USB_INT, 165 .flags = IORESOURCE_IRQ, 166 }, 167 }; 168 169 static u64 udc_dmamask = DMA_BIT_MASK(32); 170 171 static struct platform_device au1xxx_usb_gdt_device = { 172 .name = "au1xxx-udc", 173 .id = 0, 174 .dev = { 175 .dma_mask = &udc_dmamask, 176 .coherent_dma_mask = DMA_BIT_MASK(32), 177 }, 178 .num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources), 179 .resource = au1xxx_usb_gdt_resources, 180 }; 181 182 /* Au1200 UOC (USB OTG controller) */ 183 static struct resource au1xxx_usb_otg_resources[] = { 184 [0] = { 185 .start = USB_UOC_BASE, 186 .end = USB_UOC_BASE + USB_UOC_LEN - 1, 187 .flags = IORESOURCE_MEM, 188 }, 189 [1] = { 190 .start = AU1200_USB_INT, 191 .end = AU1200_USB_INT, 192 .flags = IORESOURCE_IRQ, 193 }, 194 }; 195 196 static u64 uoc_dmamask = DMA_BIT_MASK(32); 197 198 static struct platform_device au1xxx_usb_otg_device = { 199 .name = "au1xxx-uoc", 200 .id = 0, 201 .dev = { 202 .dma_mask = &uoc_dmamask, 203 .coherent_dma_mask = DMA_BIT_MASK(32), 204 }, 205 .num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources), 206 .resource = au1xxx_usb_otg_resources, 207 }; 208 209 static struct resource au1200_lcd_resources[] = { 210 [0] = { 211 .start = LCD_PHYS_ADDR, 212 .end = LCD_PHYS_ADDR + 0x800 - 1, 213 .flags = IORESOURCE_MEM, 214 }, 215 [1] = { 216 .start = AU1200_LCD_INT, 217 .end = AU1200_LCD_INT, 218 .flags = IORESOURCE_IRQ, 219 } 220 }; 221 222 static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32); 223 224 static struct platform_device au1200_lcd_device = { 225 .name = "au1200-lcd", 226 .id = 0, 227 .dev = { 228 .dma_mask = &au1200_lcd_dmamask, 229 .coherent_dma_mask = DMA_BIT_MASK(32), 230 }, 231 .num_resources = ARRAY_SIZE(au1200_lcd_resources), 232 .resource = au1200_lcd_resources, 233 }; 234 235 static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32); 236 237 extern struct au1xmmc_platform_data au1xmmc_platdata[2]; 238 239 static struct resource au1200_mmc0_resources[] = { 240 [0] = { 241 .start = SD0_PHYS_ADDR, 242 .end = SD0_PHYS_ADDR + 0x7ffff, 243 .flags = IORESOURCE_MEM, 244 }, 245 [1] = { 246 .start = AU1200_SD_INT, 247 .end = AU1200_SD_INT, 248 .flags = IORESOURCE_IRQ, 249 }, 250 [2] = { 251 .start = DSCR_CMD0_SDMS_TX0, 252 .end = DSCR_CMD0_SDMS_TX0, 253 .flags = IORESOURCE_DMA, 254 }, 255 [3] = { 256 .start = DSCR_CMD0_SDMS_RX0, 257 .end = DSCR_CMD0_SDMS_RX0, 258 .flags = IORESOURCE_DMA, 259 } 260 }; 261 262 static struct platform_device au1200_mmc0_device = { 263 .name = "au1xxx-mmc", 264 .id = 0, 265 .dev = { 266 .dma_mask = &au1xxx_mmc_dmamask, 267 .coherent_dma_mask = DMA_BIT_MASK(32), 268 .platform_data = &au1xmmc_platdata[0], 269 }, 270 .num_resources = ARRAY_SIZE(au1200_mmc0_resources), 271 .resource = au1200_mmc0_resources, 272 }; 273 274 #ifndef CONFIG_MIPS_DB1200 275 static struct resource au1200_mmc1_resources[] = { 276 [0] = { 277 .start = SD1_PHYS_ADDR, 278 .end = SD1_PHYS_ADDR + 0x7ffff, 279 .flags = IORESOURCE_MEM, 280 }, 281 [1] = { 282 .start = AU1200_SD_INT, 283 .end = AU1200_SD_INT, 284 .flags = IORESOURCE_IRQ, 285 }, 286 [2] = { 287 .start = DSCR_CMD0_SDMS_TX1, 288 .end = DSCR_CMD0_SDMS_TX1, 289 .flags = IORESOURCE_DMA, 290 }, 291 [3] = { 292 .start = DSCR_CMD0_SDMS_RX1, 293 .end = DSCR_CMD0_SDMS_RX1, 294 .flags = IORESOURCE_DMA, 295 } 296 }; 297 298 static struct platform_device au1200_mmc1_device = { 299 .name = "au1xxx-mmc", 300 .id = 1, 301 .dev = { 302 .dma_mask = &au1xxx_mmc_dmamask, 303 .coherent_dma_mask = DMA_BIT_MASK(32), 304 .platform_data = &au1xmmc_platdata[1], 305 }, 306 .num_resources = ARRAY_SIZE(au1200_mmc1_resources), 307 .resource = au1200_mmc1_resources, 308 }; 309 #endif /* #ifndef CONFIG_MIPS_DB1200 */ 310 #endif /* #ifdef CONFIG_SOC_AU1200 */ 311 312 /* All Alchemy demoboards with I2C have this #define in their headers */ 313 #ifdef SMBUS_PSC_BASE 314 static struct resource pbdb_smbus_resources[] = { 315 { 316 .start = CPHYSADDR(SMBUS_PSC_BASE), 317 .end = CPHYSADDR(SMBUS_PSC_BASE + 0xfffff), 318 .flags = IORESOURCE_MEM, 319 }, 320 }; 321 322 static struct platform_device pbdb_smbus_device = { 323 .name = "au1xpsc_smbus", 324 .id = 0, /* bus number */ 325 .num_resources = ARRAY_SIZE(pbdb_smbus_resources), 326 .resource = pbdb_smbus_resources, 327 }; 328 #endif 329 330 /* Macro to help defining the Ethernet MAC resources */ 331 #define MAC_RES(_base, _enable, _irq) \ 332 { \ 333 .start = CPHYSADDR(_base), \ 334 .end = CPHYSADDR(_base + 0xffff), \ 335 .flags = IORESOURCE_MEM, \ 336 }, \ 337 { \ 338 .start = CPHYSADDR(_enable), \ 339 .end = CPHYSADDR(_enable + 0x3), \ 340 .flags = IORESOURCE_MEM, \ 341 }, \ 342 { \ 343 .start = _irq, \ 344 .end = _irq, \ 345 .flags = IORESOURCE_IRQ \ 346 } 347 348 static struct resource au1xxx_eth0_resources[] = { 349 #if defined(CONFIG_SOC_AU1000) 350 MAC_RES(AU1000_ETH0_BASE, AU1000_MAC0_ENABLE, AU1000_MAC0_DMA_INT), 351 #elif defined(CONFIG_SOC_AU1100) 352 MAC_RES(AU1100_ETH0_BASE, AU1100_MAC0_ENABLE, AU1100_MAC0_DMA_INT), 353 #elif defined(CONFIG_SOC_AU1550) 354 MAC_RES(AU1550_ETH0_BASE, AU1550_MAC0_ENABLE, AU1550_MAC0_DMA_INT), 355 #elif defined(CONFIG_SOC_AU1500) 356 MAC_RES(AU1500_ETH0_BASE, AU1500_MAC0_ENABLE, AU1500_MAC0_DMA_INT), 357 #endif 358 }; 359 360 361 static struct au1000_eth_platform_data au1xxx_eth0_platform_data = { 362 .phy1_search_mac0 = 1, 363 }; 364 365 static struct platform_device au1xxx_eth0_device = { 366 .name = "au1000-eth", 367 .id = 0, 368 .num_resources = ARRAY_SIZE(au1xxx_eth0_resources), 369 .resource = au1xxx_eth0_resources, 370 .dev.platform_data = &au1xxx_eth0_platform_data, 371 }; 372 373 #ifndef CONFIG_SOC_AU1100 374 static struct resource au1xxx_eth1_resources[] = { 375 #if defined(CONFIG_SOC_AU1000) 376 MAC_RES(AU1000_ETH1_BASE, AU1000_MAC1_ENABLE, AU1000_MAC1_DMA_INT), 377 #elif defined(CONFIG_SOC_AU1550) 378 MAC_RES(AU1550_ETH1_BASE, AU1550_MAC1_ENABLE, AU1550_MAC1_DMA_INT), 379 #elif defined(CONFIG_SOC_AU1500) 380 MAC_RES(AU1500_ETH1_BASE, AU1500_MAC1_ENABLE, AU1500_MAC1_DMA_INT), 381 #endif 382 }; 383 384 static struct au1000_eth_platform_data au1xxx_eth1_platform_data = { 385 .phy1_search_mac0 = 1, 386 }; 387 388 static struct platform_device au1xxx_eth1_device = { 389 .name = "au1000-eth", 390 .id = 1, 391 .num_resources = ARRAY_SIZE(au1xxx_eth1_resources), 392 .resource = au1xxx_eth1_resources, 393 .dev.platform_data = &au1xxx_eth1_platform_data, 394 }; 395 #endif 396 397 void __init au1xxx_override_eth_cfg(unsigned int port, 398 struct au1000_eth_platform_data *eth_data) 399 { 400 if (!eth_data || port > 1) 401 return; 402 403 if (port == 0) 404 memcpy(&au1xxx_eth0_platform_data, eth_data, 405 sizeof(struct au1000_eth_platform_data)); 406 #ifndef CONFIG_SOC_AU1100 407 else 408 memcpy(&au1xxx_eth1_platform_data, eth_data, 409 sizeof(struct au1000_eth_platform_data)); 410 #endif 411 } 412 413 static struct platform_device *au1xxx_platform_devices[] __initdata = { 414 &au1xx0_uart_device, 415 &au1xxx_usb_ohci_device, 416 #ifdef CONFIG_FB_AU1100 417 &au1100_lcd_device, 418 #endif 419 #ifdef CONFIG_SOC_AU1200 420 &au1xxx_usb_ehci_device, 421 &au1xxx_usb_gdt_device, 422 &au1xxx_usb_otg_device, 423 &au1200_lcd_device, 424 &au1200_mmc0_device, 425 #ifndef CONFIG_MIPS_DB1200 426 &au1200_mmc1_device, 427 #endif 428 #endif 429 #ifdef SMBUS_PSC_BASE 430 &pbdb_smbus_device, 431 #endif 432 &au1xxx_eth0_device, 433 }; 434 435 static int __init au1xxx_platform_init(void) 436 { 437 unsigned int uartclk = get_au1x00_uart_baud_base() * 16; 438 int i; 439 440 /* Fill up uartclk. */ 441 for (i = 0; au1x00_uart_data[i].flags; i++) 442 au1x00_uart_data[i].uartclk = uartclk; 443 444 #ifndef CONFIG_SOC_AU1100 445 /* Register second MAC if enabled in pinfunc */ 446 if (!(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2)) 447 platform_device_register(&au1xxx_eth1_device); 448 #endif 449 450 return platform_add_devices(au1xxx_platform_devices, 451 ARRAY_SIZE(au1xxx_platform_devices)); 452 } 453 454 arch_initcall(au1xxx_platform_init); 455