11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 440e084a5SRalf Baechle select ARCH_SUPPORTS_UPROBES 5a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 6393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 75fac4f7aSPaul Burton select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 81ee3630aSRalf Baechle select ARCH_USE_BUILTIN_BSWAP 9c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 10f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 11ec7748b5SSam Ravnborg select HAVE_IDE 1242d4b839SMathieu Desnoyers select HAVE_OPROFILE 137f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 147f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1588547001SJason Wessel select HAVE_ARCH_KGDB 16490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 17c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 186077776bSDaniel Borkmann select HAVE_CBPF_JIT if !CPU_MICROMIPS 19d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 20538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 21538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 2264575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2329c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 24c1bf207dSDavid Daney select HAVE_KPROBES 25c1bf207dSDavid Daney select HAVE_KRETPROBES 26fb59e394SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 27b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 281d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 292b68f6caSKees Cook select ARCH_HAS_ELF_RANDOMIZE 30383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 3130ad29bbSHuacai Chen select RTC_LIB if !MACH_LOONGSON64 322b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 337463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 34f4649382SZubair Lutfullah Kakakhel select HAVE_DMA_CONTIGUOUS 3548e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 363bd27e32SDavid Daney select GENERIC_IRQ_PROBE 37f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3878857614SMarkos Chandras select GENERIC_PCI_IOMAP 3994bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 40c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 410f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 429d15ffc8STejun Heo select HAVE_MEMBLOCK 439d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 449d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 45360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 464b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 47cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 48929de4ccSDeng-Cheng Zhu select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 49cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 50786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 5142a0bb3fSPetr Mladek select HAVE_NMI 524febd95aSStephen Rothwell select VIRT_TO_BUS 532f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 542f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 5550150d2bSAl Viro select CLONE_BACKWARDS 56d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5719952a92SKees Cook select HAVE_CC_STACKPROTECTOR 58b1d4c6caSJames Hogan select CPU_PM if CPU_IDLE 59cc7964afSPaul Burton select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 6090cee759SPaul Burton select ARCH_BINFMT_ELF_STATE 61d79d853dSMarkos Chandras select SYSCTL_EXCEPTION_TRACE 62bb877e96SDeng-Cheng Zhu select HAVE_VIRT_CPU_ACCOUNTING_GEN 63ec9ddad3SDeng-Cheng Zhu select HAVE_IRQ_TIME_ACCOUNTING 64a7f4df4eSAlex Smith select GENERIC_TIME_VSYSCALL 65a7f4df4eSAlex Smith select ARCH_CLOCKSOURCE_DATA 661d2753a6SDavid Daney select HANDLE_DOMAIN_IRQ 67432c6bacSPaul Burton select HAVE_EXIT_THREAD 6808bccf43SMarcin Nowakowski select HAVE_REGS_AND_STACK_ACCESS_API 691da177e4SLinus Torvalds 701da177e4SLinus Torvaldsmenu "Machine selection" 711da177e4SLinus Torvalds 725e83d430SRalf Baechlechoice 735e83d430SRalf Baechle prompt "System type" 745e83d430SRalf Baechle default SGI_IP22 751da177e4SLinus Torvalds 76*eed0eabdSPaul Burtonconfig MIPS_GENERIC 77*eed0eabdSPaul Burton bool "Generic board-agnostic MIPS kernel" 78*eed0eabdSPaul Burton select BOOT_RAW 79*eed0eabdSPaul Burton select BUILTIN_DTB 80*eed0eabdSPaul Burton select CEVT_R4K 81*eed0eabdSPaul Burton select CLKSRC_MIPS_GIC 82*eed0eabdSPaul Burton select COMMON_CLK 83*eed0eabdSPaul Burton select CPU_MIPSR2_IRQ_VI 84*eed0eabdSPaul Burton select CPU_MIPSR2_IRQ_EI 85*eed0eabdSPaul Burton select CSRC_R4K 86*eed0eabdSPaul Burton select DMA_PERDEV_COHERENT 87*eed0eabdSPaul Burton select HW_HAS_PCI 88*eed0eabdSPaul Burton select IRQ_MIPS_CPU 89*eed0eabdSPaul Burton select LIBFDT 90*eed0eabdSPaul Burton select MIPS_CPU_SCACHE 91*eed0eabdSPaul Burton select MIPS_GIC 92*eed0eabdSPaul Burton select MIPS_L1_CACHE_SHIFT_7 93*eed0eabdSPaul Burton select NO_EXCEPT_FILL 94*eed0eabdSPaul Burton select PCI_DRIVERS_GENERIC 95*eed0eabdSPaul Burton select PINCTRL 96*eed0eabdSPaul Burton select SMP_UP if SMP 97*eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R1 98*eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R2 99*eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R6 100*eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R1 101*eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R2 102*eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R6 103*eed0eabdSPaul Burton select SYS_SUPPORTS_32BIT_KERNEL 104*eed0eabdSPaul Burton select SYS_SUPPORTS_64BIT_KERNEL 105*eed0eabdSPaul Burton select SYS_SUPPORTS_BIG_ENDIAN 106*eed0eabdSPaul Burton select SYS_SUPPORTS_HIGHMEM 107*eed0eabdSPaul Burton select SYS_SUPPORTS_LITTLE_ENDIAN 108*eed0eabdSPaul Burton select SYS_SUPPORTS_MICROMIPS 109*eed0eabdSPaul Burton select SYS_SUPPORTS_MIPS_CPS 110*eed0eabdSPaul Burton select SYS_SUPPORTS_MIPS16 111*eed0eabdSPaul Burton select SYS_SUPPORTS_MULTITHREADING 112*eed0eabdSPaul Burton select SYS_SUPPORTS_RELOCATABLE 113*eed0eabdSPaul Burton select SYS_SUPPORTS_SMARTMIPS 114*eed0eabdSPaul Burton select USB_EHCI_BIG_ENDIAN_DESC if BIG_ENDIAN 115*eed0eabdSPaul Burton select USB_EHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN 116*eed0eabdSPaul Burton select USB_OHCI_BIG_ENDIAN_DESC if BIG_ENDIAN 117*eed0eabdSPaul Burton select USB_OHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN 118*eed0eabdSPaul Burton select USB_UHCI_BIG_ENDIAN_DESC if BIG_ENDIAN 119*eed0eabdSPaul Burton select USB_UHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN 120*eed0eabdSPaul Burton select USE_OF 121*eed0eabdSPaul Burton help 122*eed0eabdSPaul Burton Select this to build a kernel which aims to support multiple boards, 123*eed0eabdSPaul Burton generally using a flattened device tree passed from the bootloader 124*eed0eabdSPaul Burton using the boot protocol defined in the UHI (Unified Hosting 125*eed0eabdSPaul Burton Interface) specification. 126*eed0eabdSPaul Burton 12742a4f17dSManuel Laussconfig MIPS_ALCHEMY 128c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 12934adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 130f772cdb2SRalf Baechle select CEVT_R4K 131d7ea335cSSteven J. Hill select CSRC_R4K 13267e38cf2SRalf Baechle select IRQ_MIPS_CPU 13388e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 13442a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 13542a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 13642a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 137d30a2b47SLinus Walleij select GPIOLIB 1381b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 13947440229SManuel Lauss select COMMON_CLK 1401da177e4SLinus Torvalds 1417ca5dc14SFlorian Fainelliconfig AR7 1427ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 1437ca5dc14SFlorian Fainelli select BOOT_ELF32 1447ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 1457ca5dc14SFlorian Fainelli select CEVT_R4K 1467ca5dc14SFlorian Fainelli select CSRC_R4K 14767e38cf2SRalf Baechle select IRQ_MIPS_CPU 1487ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 1497ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 1507ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 1517ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 1527ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 1537ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 154377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1551b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 156d30a2b47SLinus Walleij select GPIOLIB 1577ca5dc14SFlorian Fainelli select VLYNQ 1588551fb64SYoichi Yuasa select HAVE_CLK 1597ca5dc14SFlorian Fainelli help 1607ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1617ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1627ca5dc14SFlorian Fainelli 16343cc739fSSergey Ryazanovconfig ATH25 16443cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 16543cc739fSSergey Ryazanov select CEVT_R4K 16643cc739fSSergey Ryazanov select CSRC_R4K 16743cc739fSSergey Ryazanov select DMA_NONCOHERENT 16867e38cf2SRalf Baechle select IRQ_MIPS_CPU 1691753e74eSSergey Ryazanov select IRQ_DOMAIN 17043cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 17143cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 17243cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1738aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 17443cc739fSSergey Ryazanov help 17543cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 17643cc739fSSergey Ryazanov 177d4a67d9dSGabor Juhosconfig ATH79 178d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 179ff591a91SAlban Bedel select ARCH_HAS_RESET_CONTROLLER 180d4a67d9dSGabor Juhos select BOOT_RAW 181d4a67d9dSGabor Juhos select CEVT_R4K 182d4a67d9dSGabor Juhos select CSRC_R4K 183d4a67d9dSGabor Juhos select DMA_NONCOHERENT 184d30a2b47SLinus Walleij select GPIOLIB 18594638067SGabor Juhos select HAVE_CLK 186411520afSAlban Bedel select COMMON_CLK 1872c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 18867e38cf2SRalf Baechle select IRQ_MIPS_CPU 1890aabf1a4SGabor Juhos select MIPS_MACHINE 190d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 191d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 192d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 193d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 194377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 195b3f0a250SAlban Bedel select SYS_SUPPORTS_ZBOOT_UART_PROM 19603c8c407SAlban Bedel select USE_OF 197d4a67d9dSGabor Juhos help 198d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 199d4a67d9dSGabor Juhos 2005f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 2015f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 202d666cd02SKevin Cernekee select BOOT_RAW 203d666cd02SKevin Cernekee select NO_EXCEPT_FILL 204d666cd02SKevin Cernekee select USE_OF 205d666cd02SKevin Cernekee select CEVT_R4K 206d666cd02SKevin Cernekee select CSRC_R4K 207d666cd02SKevin Cernekee select SYNC_R4K 208d666cd02SKevin Cernekee select COMMON_CLK 209c7c42ec2SSimon Arlott select BCM6345_L1_IRQ 21060b858f2SKevin Cernekee select BCM7038_L1_IRQ 21160b858f2SKevin Cernekee select BCM7120_L2_IRQ 21260b858f2SKevin Cernekee select BRCMSTB_L2_IRQ 21367e38cf2SRalf Baechle select IRQ_MIPS_CPU 21460b858f2SKevin Cernekee select DMA_NONCOHERENT 215d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 21660b858f2SKevin Cernekee select SYS_SUPPORTS_LITTLE_ENDIAN 217d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 218d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 21960b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS32_3300 22060b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4350 22160b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4380 222d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 223d666cd02SKevin Cernekee select SWAP_IO_SPACE 22460b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 22560b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 22660b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 22760b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 228d666cd02SKevin Cernekee help 2295f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 2305f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 2315f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 2325f2d4459SKevin Cernekee must be set appropriately for your board. 233d666cd02SKevin Cernekee 2341c0c13ebSAurelien Jarnoconfig BCM47XX 235c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 236fe08f8c2SHauke Mehrtens select BOOT_RAW 23742f77542SRalf Baechle select CEVT_R4K 238940f6b48SRalf Baechle select CSRC_R4K 2391c0c13ebSAurelien Jarno select DMA_NONCOHERENT 2401c0c13ebSAurelien Jarno select HW_HAS_PCI 24167e38cf2SRalf Baechle select IRQ_MIPS_CPU 242314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 243dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 2441c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 2451c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 246377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 24725e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 248e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 249c949c0bcSRafał Miłecki select GPIOLIB 250c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 251f6e734a8SRafał Miłecki select BCM47XX_NVRAM 2522ab71a02SRafał Miłecki select BCM47XX_SPROM 2531c0c13ebSAurelien Jarno help 2541c0c13ebSAurelien Jarno Support for BCM47XX based boards 2551c0c13ebSAurelien Jarno 256e7300d04SMaxime Bizonconfig BCM63XX 257e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 258ae8de61cSFlorian Fainelli select BOOT_RAW 259e7300d04SMaxime Bizon select CEVT_R4K 260e7300d04SMaxime Bizon select CSRC_R4K 261fc264022SJonas Gorski select SYNC_R4K 262e7300d04SMaxime Bizon select DMA_NONCOHERENT 26367e38cf2SRalf Baechle select IRQ_MIPS_CPU 264e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 265e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 266e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 267e7300d04SMaxime Bizon select SWAP_IO_SPACE 268d30a2b47SLinus Walleij select GPIOLIB 2693e82eeebSYoichi Yuasa select HAVE_CLK 270af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 271e7300d04SMaxime Bizon help 272e7300d04SMaxime Bizon Support for BCM63XX based boards 273e7300d04SMaxime Bizon 2741da177e4SLinus Torvaldsconfig MIPS_COBALT 2753fa986faSMartin Michlmayr bool "Cobalt Server" 27642f77542SRalf Baechle select CEVT_R4K 277940f6b48SRalf Baechle select CSRC_R4K 2781097c6acSYoichi Yuasa select CEVT_GT641XX 2791da177e4SLinus Torvalds select DMA_NONCOHERENT 2801da177e4SLinus Torvalds select HW_HAS_PCI 281d865bea4SRalf Baechle select I8253 2821da177e4SLinus Torvalds select I8259 28367e38cf2SRalf Baechle select IRQ_MIPS_CPU 284d5ab1a69SYoichi Yuasa select IRQ_GT641XX 285252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 286e25bfc92SYoichi Yuasa select PCI 2877cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 2880a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 289ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2900e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 2915e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 292e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 2931da177e4SLinus Torvalds 2941da177e4SLinus Torvaldsconfig MACH_DECSTATION 2953fa986faSMartin Michlmayr bool "DECstations" 2961da177e4SLinus Torvalds select BOOT_ELF32 2976457d9fcSYoichi Yuasa select CEVT_DS1287 29881d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 2994247417dSYoichi Yuasa select CSRC_IOASIC 30081d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 30120d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 30220d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 30320d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 3041da177e4SLinus Torvalds select DMA_NONCOHERENT 305ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 30667e38cf2SRalf Baechle select IRQ_MIPS_CPU 3077cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 3087cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 309ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3107d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3115e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3121723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 3131723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 3141723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 315930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 3165e83d430SRalf Baechle help 3171da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 3181da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 3191da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 3201da177e4SLinus Torvalds 3211da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 3221da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 3231da177e4SLinus Torvalds 3241da177e4SLinus Torvalds DECstation 5000/50 3251da177e4SLinus Torvalds DECstation 5000/150 3261da177e4SLinus Torvalds DECstation 5000/260 3271da177e4SLinus Torvalds DECsystem 5900/260 3281da177e4SLinus Torvalds 3291da177e4SLinus Torvalds otherwise choose R3000. 3301da177e4SLinus Torvalds 3315e83d430SRalf Baechleconfig MACH_JAZZ 3323fa986faSMartin Michlmayr bool "Jazz family of machines" 3330e2794b0SRalf Baechle select FW_ARC 3340e2794b0SRalf Baechle select FW_ARC32 3355e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 33642f77542SRalf Baechle select CEVT_R4K 337940f6b48SRalf Baechle select CSRC_R4K 338e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 3395e83d430SRalf Baechle select GENERIC_ISA_DMA 3408a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 34167e38cf2SRalf Baechle select IRQ_MIPS_CPU 342d865bea4SRalf Baechle select I8253 3435e83d430SRalf Baechle select I8259 3445e83d430SRalf Baechle select ISA 3457cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 3465e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 3477d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3481723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 3491da177e4SLinus Torvalds help 3505e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 3515e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 352692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 3535e83d430SRalf Baechle Olivetti M700-10 workstations. 3545e83d430SRalf Baechle 355de361e8bSPaul Burtonconfig MACH_INGENIC 356de361e8bSPaul Burton bool "Ingenic SoC based machines" 3575ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 3585ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 359f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 3605ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 36167e38cf2SRalf Baechle select IRQ_MIPS_CPU 362d30a2b47SLinus Walleij select GPIOLIB 363ff1930c6SPaul Burton select COMMON_CLK 36483bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 365ffb1843dSPaul Burton select BUILTIN_DTB 366ffb1843dSPaul Burton select USE_OF 3676ec127fbSPaul Burton select LIBFDT 3685ebabe59SLars-Peter Clausen 369171bb2f1SJohn Crispinconfig LANTIQ 370171bb2f1SJohn Crispin bool "Lantiq based platforms" 371171bb2f1SJohn Crispin select DMA_NONCOHERENT 37267e38cf2SRalf Baechle select IRQ_MIPS_CPU 373171bb2f1SJohn Crispin select CEVT_R4K 374171bb2f1SJohn Crispin select CSRC_R4K 375171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 376171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 377171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 378171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 379377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 380171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 381171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 382d30a2b47SLinus Walleij select GPIOLIB 383171bb2f1SJohn Crispin select SWAP_IO_SPACE 384171bb2f1SJohn Crispin select BOOT_RAW 385287e3f3fSJohn Crispin select CLKDEV_LOOKUP 386a0392222SJohn Crispin select USE_OF 3873f8c50c9SJohn Crispin select PINCTRL 3883f8c50c9SJohn Crispin select PINCTRL_LANTIQ 389c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 390c530781cSJohn Crispin select RESET_CONTROLLER 391171bb2f1SJohn Crispin 3921f21d2bdSBrian Murphyconfig LASAT 3931f21d2bdSBrian Murphy bool "LASAT Networks platforms" 39442f77542SRalf Baechle select CEVT_R4K 39516f0bbbcSRalf Baechle select CRC32 396940f6b48SRalf Baechle select CSRC_R4K 3971f21d2bdSBrian Murphy select DMA_NONCOHERENT 3981f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 3991f21d2bdSBrian Murphy select HW_HAS_PCI 40067e38cf2SRalf Baechle select IRQ_MIPS_CPU 4011f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 4021f21d2bdSBrian Murphy select MIPS_NILE4 4031f21d2bdSBrian Murphy select R5000_CPU_SCACHE 4041f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 4051f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 4061f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 4071f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 4081f21d2bdSBrian Murphy 40930ad29bbSHuacai Chenconfig MACH_LOONGSON32 41030ad29bbSHuacai Chen bool "Loongson-1 family of machines" 411c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 412ade299d8SYoichi Yuasa help 41330ad29bbSHuacai Chen This enables support for the Loongson-1 family of machines. 41485749d24SWu Zhangjin 41530ad29bbSHuacai Chen Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by 41630ad29bbSHuacai Chen the Institute of Computing Technology (ICT), Chinese Academy of 41730ad29bbSHuacai Chen Sciences (CAS). 418ade299d8SYoichi Yuasa 41930ad29bbSHuacai Chenconfig MACH_LOONGSON64 42030ad29bbSHuacai Chen bool "Loongson-2/3 family of machines" 421ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 422ca585cf9SKelvin Cheung help 42330ad29bbSHuacai Chen This enables the support of Loongson-2/3 family of machines. 424ca585cf9SKelvin Cheung 42530ad29bbSHuacai Chen Loongson-2 is a family of single-core CPUs and Loongson-3 is a 42630ad29bbSHuacai Chen family of multi-core CPUs. They are both 64-bit general-purpose 42730ad29bbSHuacai Chen MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute 42830ad29bbSHuacai Chen of Computing Technology (ICT), Chinese Academy of Sciences (CAS) 42930ad29bbSHuacai Chen in the People's Republic of China. The chief architect is Professor 43030ad29bbSHuacai Chen Weiwu Hu. 431ca585cf9SKelvin Cheung 4326a438309SAndrew Brestickerconfig MACH_PISTACHIO 4336a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 4346a438309SAndrew Bresticker select BOOT_ELF32 4356a438309SAndrew Bresticker select BOOT_RAW 4366a438309SAndrew Bresticker select CEVT_R4K 4376a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 4386a438309SAndrew Bresticker select COMMON_CLK 4396a438309SAndrew Bresticker select CSRC_R4K 440645c7827SZubair Lutfullah Kakakhel select DMA_NONCOHERENT 441d30a2b47SLinus Walleij select GPIOLIB 44267e38cf2SRalf Baechle select IRQ_MIPS_CPU 4436a438309SAndrew Bresticker select LIBFDT 4446a438309SAndrew Bresticker select MFD_SYSCON 4456a438309SAndrew Bresticker select MIPS_CPU_SCACHE 4466a438309SAndrew Bresticker select MIPS_GIC 4476a438309SAndrew Bresticker select PINCTRL 4486a438309SAndrew Bresticker select REGULATOR 4496a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 4506a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 4516a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 4526a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 4536a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 45441cc07beSMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 4556a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 456018f62eeSEzequiel Garcia select SYS_HAS_EARLY_PRINTK 457018f62eeSEzequiel Garcia select USE_GENERIC_EARLY_PRINTK_8250 4586a438309SAndrew Bresticker select USE_OF 4596a438309SAndrew Bresticker help 4606a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 4616a438309SAndrew Bresticker 4629937f5ffSZubair Lutfullah Kakakhelconfig MACH_XILFPGA 4639937f5ffSZubair Lutfullah Kakakhel bool "MIPSfpga Xilinx based boards" 4649937f5ffSZubair Lutfullah Kakakhel select BOOT_ELF32 4659937f5ffSZubair Lutfullah Kakakhel select BOOT_RAW 4669937f5ffSZubair Lutfullah Kakakhel select BUILTIN_DTB 4679937f5ffSZubair Lutfullah Kakakhel select CEVT_R4K 4689937f5ffSZubair Lutfullah Kakakhel select COMMON_CLK 4699937f5ffSZubair Lutfullah Kakakhel select CSRC_R4K 470d30a2b47SLinus Walleij select GPIOLIB 4719937f5ffSZubair Lutfullah Kakakhel select IRQ_MIPS_CPU 4729937f5ffSZubair Lutfullah Kakakhel select LIBFDT 4739937f5ffSZubair Lutfullah Kakakhel select MIPS_CPU_SCACHE 4749937f5ffSZubair Lutfullah Kakakhel select SYS_HAS_EARLY_PRINTK 4759937f5ffSZubair Lutfullah Kakakhel select SYS_HAS_CPU_MIPS32_R2 4769937f5ffSZubair Lutfullah Kakakhel select SYS_SUPPORTS_32BIT_KERNEL 4779937f5ffSZubair Lutfullah Kakakhel select SYS_SUPPORTS_LITTLE_ENDIAN 4789937f5ffSZubair Lutfullah Kakakhel select SYS_SUPPORTS_ZBOOT_UART16550 4799937f5ffSZubair Lutfullah Kakakhel select USE_OF 4809937f5ffSZubair Lutfullah Kakakhel select USE_GENERIC_EARLY_PRINTK_8250 4819937f5ffSZubair Lutfullah Kakakhel help 4829937f5ffSZubair Lutfullah Kakakhel This enables support for the IMG University Program MIPSfpga platform. 4839937f5ffSZubair Lutfullah Kakakhel 4841da177e4SLinus Torvaldsconfig MIPS_MALTA 4853fa986faSMartin Michlmayr bool "MIPS Malta board" 48661ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 4871da177e4SLinus Torvalds select BOOT_ELF32 488fa71c960SRalf Baechle select BOOT_RAW 489e8823d26SPaul Burton select BUILTIN_DTB 49042f77542SRalf Baechle select CEVT_R4K 491940f6b48SRalf Baechle select CSRC_R4K 492fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 49342b002abSGuenter Roeck select COMMON_CLK 494885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 4951da177e4SLinus Torvalds select GENERIC_ISA_DMA 4968a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 49767e38cf2SRalf Baechle select IRQ_MIPS_CPU 4988a19b8f1SAndrew Bresticker select MIPS_GIC 4991da177e4SLinus Torvalds select HW_HAS_PCI 500d865bea4SRalf Baechle select I8253 5011da177e4SLinus Torvalds select I8259 5025e83d430SRalf Baechle select MIPS_BONITO64 5039318c51aSChris Dearman select MIPS_CPU_SCACHE 504a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 505252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 5065e83d430SRalf Baechle select MIPS_MSC 507ecafe3e9SPaul Burton select SMP_UP if SMP 5081da177e4SLinus Torvalds select SWAP_IO_SPACE 5097cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 5107cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 511bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 512c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 513575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 5147cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 5155d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 516575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 5177cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 5187cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 519ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 520ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5215e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 522c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 5235e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 524424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 5250365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 526e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 527377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 528f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 5299693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 5301b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 5318c530ea3SMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 532e8823d26SPaul Burton select USE_OF 53338ec82feSPaul Burton select LIBFDT 534abcc82b1SJames Hogan select ZONE_DMA32 if 64BIT 535e81a8c7dSPaul Burton select BUILTIN_DTB 536e81a8c7dSPaul Burton select LIBFDT 5371da177e4SLinus Torvalds help 538f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 5391da177e4SLinus Torvalds board. 5401da177e4SLinus Torvalds 5412572f00dSJoshua Hendersonconfig MACH_PIC32 5422572f00dSJoshua Henderson bool "Microchip PIC32 Family" 5432572f00dSJoshua Henderson help 5442572f00dSJoshua Henderson This enables support for the Microchip PIC32 family of platforms. 5452572f00dSJoshua Henderson 5462572f00dSJoshua Henderson Microchip PIC32 is a family of general-purpose 32 bit MIPS core 5472572f00dSJoshua Henderson microcontrollers. 5482572f00dSJoshua Henderson 549ec47b274SSteven J. Hillconfig MIPS_SEAD3 550ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 551ec47b274SSteven J. Hill select BOOT_ELF32 552ec47b274SSteven J. Hill select BOOT_RAW 553f262b5f2SAndrew Bresticker select BUILTIN_DTB 554ec47b274SSteven J. Hill select CEVT_R4K 555ec47b274SSteven J. Hill select CSRC_R4K 556fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 55742b002abSGuenter Roeck select COMMON_CLK 558ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 559ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 560ec47b274SSteven J. Hill select DMA_NONCOHERENT 56167e38cf2SRalf Baechle select IRQ_MIPS_CPU 5628a19b8f1SAndrew Bresticker select MIPS_GIC 56344327236SQais Yousef select LIBFDT 564ec47b274SSteven J. Hill select MIPS_MSC 565ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 566ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 567d4594b27SPaul Burton select SYS_HAS_CPU_MIPS32_R6 568ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 569ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 570ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 571ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 572ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 573ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 574a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 575377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 5768c530ea3SMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 577ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 578ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 5799b731009SSteven J. Hill select USE_OF 580ec47b274SSteven J. Hill help 581ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 582ec47b274SSteven J. Hill board. 583ec47b274SSteven J. Hill 584a83860c2SRalf Baechleconfig NEC_MARKEINS 585a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 586a83860c2SRalf Baechle select SOC_EMMA2RH 587a83860c2SRalf Baechle select HW_HAS_PCI 588a83860c2SRalf Baechle help 589a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 590ade299d8SYoichi Yuasa 5915e83d430SRalf Baechleconfig MACH_VR41XX 59274142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 59342f77542SRalf Baechle select CEVT_R4K 594940f6b48SRalf Baechle select CSRC_R4K 5957cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 596377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 597d30a2b47SLinus Walleij select GPIOLIB 5985e83d430SRalf Baechle 599edb6310aSDaniel Lairdconfig NXP_STB220 600edb6310aSDaniel Laird bool "NXP STB220 board" 601edb6310aSDaniel Laird select SOC_PNX833X 602edb6310aSDaniel Laird help 603edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 604edb6310aSDaniel Laird 605edb6310aSDaniel Lairdconfig NXP_STB225 606edb6310aSDaniel Laird bool "NXP 225 board" 607edb6310aSDaniel Laird select SOC_PNX833X 608edb6310aSDaniel Laird select SOC_PNX8335 609edb6310aSDaniel Laird help 610edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 611edb6310aSDaniel Laird 6129267a30dSMarc St-Jeanconfig PMC_MSP 6139267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 61439d30c13SAnoop P A select CEVT_R4K 61539d30c13SAnoop P A select CSRC_R4K 6169267a30dSMarc St-Jean select DMA_NONCOHERENT 6179267a30dSMarc St-Jean select SWAP_IO_SPACE 6189267a30dSMarc St-Jean select NO_EXCEPT_FILL 6199267a30dSMarc St-Jean select BOOT_RAW 6209267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 6219267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 6229267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 6239267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 624377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 62567e38cf2SRalf Baechle select IRQ_MIPS_CPU 6269267a30dSMarc St-Jean select SERIAL_8250 6279267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 6289296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 6299296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 6309267a30dSMarc St-Jean help 6319267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 6329267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 6339267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 6349267a30dSMarc St-Jean a variety of MIPS cores. 6359267a30dSMarc St-Jean 636ae2b5bb6SJohn Crispinconfig RALINK 637ae2b5bb6SJohn Crispin bool "Ralink based machines" 638ae2b5bb6SJohn Crispin select CEVT_R4K 639ae2b5bb6SJohn Crispin select CSRC_R4K 640ae2b5bb6SJohn Crispin select BOOT_RAW 641ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 64267e38cf2SRalf Baechle select IRQ_MIPS_CPU 643ae2b5bb6SJohn Crispin select USE_OF 644ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 645ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 646ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 647ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 648377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 649ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 650ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 6512a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 6522a153f1cSJohn Crispin select RESET_CONTROLLER 653ae2b5bb6SJohn Crispin 6541da177e4SLinus Torvaldsconfig SGI_IP22 6553fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 6560e2794b0SRalf Baechle select FW_ARC 6570e2794b0SRalf Baechle select FW_ARC32 6581da177e4SLinus Torvalds select BOOT_ELF32 65942f77542SRalf Baechle select CEVT_R4K 660940f6b48SRalf Baechle select CSRC_R4K 661e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 6621da177e4SLinus Torvalds select DMA_NONCOHERENT 6635e83d430SRalf Baechle select HW_HAS_EISA 664d865bea4SRalf Baechle select I8253 66568de4803SThomas Bogendoerfer select I8259 6661da177e4SLinus Torvalds select IP22_CPU_SCACHE 66767e38cf2SRalf Baechle select IRQ_MIPS_CPU 668aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 669e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 670e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 67136e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 672e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 673e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 674e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 6751da177e4SLinus Torvalds select SWAP_IO_SPACE 6767cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6777cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 6782b5e63f6SMartin Michlmayr # 6792b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6802b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6812b5e63f6SMartin Michlmayr # 6822b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6832b5e63f6SMartin Michlmayr # for a more details discussion 6842b5e63f6SMartin Michlmayr # 6852b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 686ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 687ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6885e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 689930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6901da177e4SLinus Torvalds help 6911da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 6921da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 6931da177e4SLinus Torvalds that runs on these, say Y here. 6941da177e4SLinus Torvalds 6951da177e4SLinus Torvaldsconfig SGI_IP27 6963fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 6970e2794b0SRalf Baechle select FW_ARC 6980e2794b0SRalf Baechle select FW_ARC64 6995e83d430SRalf Baechle select BOOT_ELF64 700e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 701634286f1SRalf Baechle select DMA_COHERENT 70236a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 7031da177e4SLinus Torvalds select HW_HAS_PCI 704130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 7057cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 706ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 7075e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 708d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 7091a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 710930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 7111da177e4SLinus Torvalds help 7121da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 7131da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 7141da177e4SLinus Torvalds here. 7151da177e4SLinus Torvalds 716e2defae5SThomas Bogendoerferconfig SGI_IP28 7177d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 7180e2794b0SRalf Baechle select FW_ARC 7190e2794b0SRalf Baechle select FW_ARC64 720e2defae5SThomas Bogendoerfer select BOOT_ELF64 721e2defae5SThomas Bogendoerfer select CEVT_R4K 722e2defae5SThomas Bogendoerfer select CSRC_R4K 723e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 724e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 725e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 72667e38cf2SRalf Baechle select IRQ_MIPS_CPU 727e2defae5SThomas Bogendoerfer select HW_HAS_EISA 728e2defae5SThomas Bogendoerfer select I8253 729e2defae5SThomas Bogendoerfer select I8259 730e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 731e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 7325b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 733e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 734e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 735e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 736e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 737e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 7382b5e63f6SMartin Michlmayr # 7392b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 7402b5e63f6SMartin Michlmayr # memory during early boot on some machines. 7412b5e63f6SMartin Michlmayr # 7422b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 7432b5e63f6SMartin Michlmayr # for a more details discussion 7442b5e63f6SMartin Michlmayr # 7452b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 746e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 747e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 748dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 749e2defae5SThomas Bogendoerfer help 750e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 751e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 752e2defae5SThomas Bogendoerfer 7531da177e4SLinus Torvaldsconfig SGI_IP32 754cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 7550e2794b0SRalf Baechle select FW_ARC 7560e2794b0SRalf Baechle select FW_ARC32 7571da177e4SLinus Torvalds select BOOT_ELF32 75842f77542SRalf Baechle select CEVT_R4K 759940f6b48SRalf Baechle select CSRC_R4K 7601da177e4SLinus Torvalds select DMA_NONCOHERENT 7611da177e4SLinus Torvalds select HW_HAS_PCI 76267e38cf2SRalf Baechle select IRQ_MIPS_CPU 7631da177e4SLinus Torvalds select R5000_CPU_SCACHE 7641da177e4SLinus Torvalds select RM7000_CPU_SCACHE 7657cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 7667cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 7677cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 768dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 769ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 7705e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7711da177e4SLinus Torvalds help 7721da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 7731da177e4SLinus Torvalds 774ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 775ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 7765e83d430SRalf Baechle select BOOT_ELF32 7775e83d430SRalf Baechle select DMA_COHERENT 7785e83d430SRalf Baechle select SIBYTE_BCM1120 7795e83d430SRalf Baechle select SWAP_IO_SPACE 7807cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7815e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7825e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7835e83d430SRalf Baechle 784ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 785ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 7865e83d430SRalf Baechle select BOOT_ELF32 7875e83d430SRalf Baechle select DMA_COHERENT 7885e83d430SRalf Baechle select SIBYTE_BCM1120 7895e83d430SRalf Baechle select SWAP_IO_SPACE 7907cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7915e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7925e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7935e83d430SRalf Baechle 7945e83d430SRalf Baechleconfig SIBYTE_CRHONE 7953fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 7965e83d430SRalf Baechle select BOOT_ELF32 7975e83d430SRalf Baechle select DMA_COHERENT 7985e83d430SRalf Baechle select SIBYTE_BCM1125 7995e83d430SRalf Baechle select SWAP_IO_SPACE 8007cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 8015e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 8025e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 8035e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8045e83d430SRalf Baechle 805ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 806ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 807ade299d8SYoichi Yuasa select BOOT_ELF32 808ade299d8SYoichi Yuasa select DMA_COHERENT 809ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 810ade299d8SYoichi Yuasa select SWAP_IO_SPACE 811ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 812ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 813ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 814ade299d8SYoichi Yuasa 815ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 816ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 817ade299d8SYoichi Yuasa select BOOT_ELF32 818ade299d8SYoichi Yuasa select DMA_COHERENT 819fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 820ade299d8SYoichi Yuasa select SIBYTE_SB1250 821ade299d8SYoichi Yuasa select SWAP_IO_SPACE 822ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 823ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 824ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 825ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 826cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 827ade299d8SYoichi Yuasa 828ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 829ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 830ade299d8SYoichi Yuasa select BOOT_ELF32 831ade299d8SYoichi Yuasa select DMA_COHERENT 832fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 833ade299d8SYoichi Yuasa select SIBYTE_SB1250 834ade299d8SYoichi Yuasa select SWAP_IO_SPACE 835ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 836ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 837ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 838ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 839ade299d8SYoichi Yuasa 840ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 841ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 842ade299d8SYoichi Yuasa select BOOT_ELF32 843ade299d8SYoichi Yuasa select DMA_COHERENT 844ade299d8SYoichi Yuasa select SIBYTE_SB1250 845ade299d8SYoichi Yuasa select SWAP_IO_SPACE 846ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 847ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 848ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 849ade299d8SYoichi Yuasa 850ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 851ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 852ade299d8SYoichi Yuasa select BOOT_ELF32 853ade299d8SYoichi Yuasa select DMA_COHERENT 854ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 855ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 856ade299d8SYoichi Yuasa select SWAP_IO_SPACE 857ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 858ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 859651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 860ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 861cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 862ade299d8SYoichi Yuasa 86314b36af4SThomas Bogendoerferconfig SNI_RM 86414b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 8650e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 8660e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 867aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 8685e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 8695e83d430SRalf Baechle select BOOT_ELF32 87042f77542SRalf Baechle select CEVT_R4K 871940f6b48SRalf Baechle select CSRC_R4K 872e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 8735e83d430SRalf Baechle select DMA_NONCOHERENT 8745e83d430SRalf Baechle select GENERIC_ISA_DMA 8758a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 8765e83d430SRalf Baechle select HW_HAS_EISA 8775e83d430SRalf Baechle select HW_HAS_PCI 87867e38cf2SRalf Baechle select IRQ_MIPS_CPU 879d865bea4SRalf Baechle select I8253 8805e83d430SRalf Baechle select I8259 8815e83d430SRalf Baechle select ISA 8824a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 8837cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 8844a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 885c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 8864a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 88736a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 888ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 8897d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 8904a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 8915e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 8925e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8931da177e4SLinus Torvalds help 89414b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 89514b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 8965e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 8975e83d430SRalf Baechle support this machine type. 8981da177e4SLinus Torvalds 899edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 900edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 9015e83d430SRalf Baechle 902edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 903edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 90423fbee9dSRalf Baechle 90573b4390fSRalf Baechleconfig MIKROTIK_RB532 90673b4390fSRalf Baechle bool "Mikrotik RB532 boards" 90773b4390fSRalf Baechle select CEVT_R4K 90873b4390fSRalf Baechle select CSRC_R4K 90973b4390fSRalf Baechle select DMA_NONCOHERENT 91073b4390fSRalf Baechle select HW_HAS_PCI 91167e38cf2SRalf Baechle select IRQ_MIPS_CPU 91273b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 91373b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 91473b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 91573b4390fSRalf Baechle select SWAP_IO_SPACE 91673b4390fSRalf Baechle select BOOT_RAW 917d30a2b47SLinus Walleij select GPIOLIB 918930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 91973b4390fSRalf Baechle help 92073b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 92173b4390fSRalf Baechle based on the IDT RC32434 SoC. 92273b4390fSRalf Baechle 9239ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 9249ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 925a86c7f72SDavid Daney select CEVT_R4K 92634adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 927a86c7f72SDavid Daney select DMA_COHERENT 928a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 929a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 930f65aad41SRalf Baechle select EDAC_SUPPORT 931b01aec9bSBorislav Petkov select EDAC_ATOMIC_SCRUB 93273569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 93373569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 934a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 9355e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 936e8635b48SDavid Daney select HW_HAS_PCI 937f00e001eSDavid Daney select ZONE_DMA32 938465aaed0SDavid Daney select HOLES_IN_ZONE 939d30a2b47SLinus Walleij select GPIOLIB 9406e511163SDavid Daney select LIBFDT 9416e511163SDavid Daney select USE_OF 9426e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 9436e511163SDavid Daney select SYS_SUPPORTS_SMP 9446e511163SDavid Daney select NR_CPUS_DEFAULT_16 945e326479fSAndrew Bresticker select BUILTIN_DTB 9468c1e6b14SDavid Daney select MTD_COMPLEX_MAPPINGS 947a86c7f72SDavid Daney help 948a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 949a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 950a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 951a86c7f72SDavid Daney Some of the supported boards are: 952a86c7f72SDavid Daney EBT3000 953a86c7f72SDavid Daney EBH3000 954a86c7f72SDavid Daney EBH3100 955a86c7f72SDavid Daney Thunder 956a86c7f72SDavid Daney Kodama 957a86c7f72SDavid Daney Hikari 958a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 959a86c7f72SDavid Daney 9607f058e85SJayachandran Cconfig NLM_XLR_BOARD 9617f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 9627f058e85SJayachandran C select BOOT_ELF32 9637f058e85SJayachandran C select NLM_COMMON 9647f058e85SJayachandran C select SYS_HAS_CPU_XLR 9657f058e85SJayachandran C select SYS_SUPPORTS_SMP 9667f058e85SJayachandran C select HW_HAS_PCI 9677f058e85SJayachandran C select SWAP_IO_SPACE 9687f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9697f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 97034adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 9717f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9727f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 9737f058e85SJayachandran C select DMA_COHERENT 9747f058e85SJayachandran C select NR_CPUS_DEFAULT_32 9757f058e85SJayachandran C select CEVT_R4K 9767f058e85SJayachandran C select CSRC_R4K 97767e38cf2SRalf Baechle select IRQ_MIPS_CPU 978b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9797f058e85SJayachandran C select SYNC_R4K 9807f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 9818f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9828f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9837f058e85SJayachandran C help 9847f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 9857f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 9867f058e85SJayachandran C 9871c773ea4SJayachandran Cconfig NLM_XLP_BOARD 9881c773ea4SJayachandran C bool "Netlogic XLP based systems" 9891c773ea4SJayachandran C select BOOT_ELF32 9901c773ea4SJayachandran C select NLM_COMMON 9911c773ea4SJayachandran C select SYS_HAS_CPU_XLP 9921c773ea4SJayachandran C select SYS_SUPPORTS_SMP 9931c773ea4SJayachandran C select HW_HAS_PCI 9941c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9951c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 99634adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 997d30a2b47SLinus Walleij select GPIOLIB 9981c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9991c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 10001c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 10011c773ea4SJayachandran C select DMA_COHERENT 10021c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 10031c773ea4SJayachandran C select CEVT_R4K 10041c773ea4SJayachandran C select CSRC_R4K 100567e38cf2SRalf Baechle select IRQ_MIPS_CPU 1006b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 10071c773ea4SJayachandran C select SYNC_R4K 10081c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 10092f6528e1SJayachandran C select USE_OF 10108f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 10118f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 10121c773ea4SJayachandran C help 10131c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 10141c773ea4SJayachandran C Say Y here if you have a XLP based board. 10151c773ea4SJayachandran C 10169bc463beSDavid Daneyconfig MIPS_PARAVIRT 10179bc463beSDavid Daney bool "Para-Virtualized guest system" 10189bc463beSDavid Daney select CEVT_R4K 10199bc463beSDavid Daney select CSRC_R4K 10209bc463beSDavid Daney select DMA_COHERENT 10219bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 10229bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 10239bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 10249bc463beSDavid Daney select SYS_SUPPORTS_SMP 10259bc463beSDavid Daney select NR_CPUS_DEFAULT_4 10269bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 10279bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 10289bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 10299bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 10309bc463beSDavid Daney select HW_HAS_PCI 10319bc463beSDavid Daney select SWAP_IO_SPACE 10329bc463beSDavid Daney help 10339bc463beSDavid Daney This option supports guest running under ???? 10349bc463beSDavid Daney 10351da177e4SLinus Torvaldsendchoice 10361da177e4SLinus Torvalds 1037e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 10383b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 1039d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 1040a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 1041e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 10428945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig" 1043*eed0eabdSPaul Burtonsource "arch/mips/generic/Kconfig" 10445e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 10455ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 10468ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 10471f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 10482572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig" 1049af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig" 10500f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 1051ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 105229c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 105338b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 105422b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 10555e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 1056a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 105730ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig" 105830ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig" 10597f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 1060ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 10619937f5ffSZubair Lutfullah Kakakhelsource "arch/mips/xilfpga/Kconfig" 106238b18f72SRalf Baechle 10635e83d430SRalf Baechleendmenu 10645e83d430SRalf Baechle 10651da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 10661da177e4SLinus Torvalds bool 10671da177e4SLinus Torvalds default y 10681da177e4SLinus Torvalds 10691da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 10701da177e4SLinus Torvalds bool 10711da177e4SLinus Torvalds 1072f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 1073f0d1b0b3SDavid Howells bool 1074f0d1b0b3SDavid Howells default n 1075f0d1b0b3SDavid Howells 1076f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 1077f0d1b0b3SDavid Howells bool 1078f0d1b0b3SDavid Howells default n 1079f0d1b0b3SDavid Howells 10803c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 10813c9ee7efSAkinobu Mita bool 10823c9ee7efSAkinobu Mita default y 10833c9ee7efSAkinobu Mita 10841da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 10851da177e4SLinus Torvalds bool 10861da177e4SLinus Torvalds default y 10871da177e4SLinus Torvalds 1088ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 10891cc89038SAtsushi Nemoto bool 10901cc89038SAtsushi Nemoto default y 10911cc89038SAtsushi Nemoto 10921da177e4SLinus Torvalds# 10931da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 10941da177e4SLinus Torvalds# 10950e2794b0SRalf Baechleconfig FW_ARC 10961da177e4SLinus Torvalds bool 10971da177e4SLinus Torvalds 109861ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 109961ed242dSRalf Baechle bool 110061ed242dSRalf Baechle 11019267a30dSMarc St-Jeanconfig BOOT_RAW 11029267a30dSMarc St-Jean bool 11039267a30dSMarc St-Jean 1104217dd11eSRalf Baechleconfig CEVT_BCM1480 1105217dd11eSRalf Baechle bool 1106217dd11eSRalf Baechle 11076457d9fcSYoichi Yuasaconfig CEVT_DS1287 11086457d9fcSYoichi Yuasa bool 11096457d9fcSYoichi Yuasa 11101097c6acSYoichi Yuasaconfig CEVT_GT641XX 11111097c6acSYoichi Yuasa bool 11121097c6acSYoichi Yuasa 111342f77542SRalf Baechleconfig CEVT_R4K 111442f77542SRalf Baechle bool 111542f77542SRalf Baechle 1116217dd11eSRalf Baechleconfig CEVT_SB1250 1117217dd11eSRalf Baechle bool 1118217dd11eSRalf Baechle 1119229f773eSAtsushi Nemotoconfig CEVT_TXX9 1120229f773eSAtsushi Nemoto bool 1121229f773eSAtsushi Nemoto 1122217dd11eSRalf Baechleconfig CSRC_BCM1480 1123217dd11eSRalf Baechle bool 1124217dd11eSRalf Baechle 11254247417dSYoichi Yuasaconfig CSRC_IOASIC 11264247417dSYoichi Yuasa bool 11274247417dSYoichi Yuasa 1128940f6b48SRalf Baechleconfig CSRC_R4K 1129940f6b48SRalf Baechle bool 1130940f6b48SRalf Baechle 1131217dd11eSRalf Baechleconfig CSRC_SB1250 1132217dd11eSRalf Baechle bool 1133217dd11eSRalf Baechle 1134a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL 1135a7f4df4eSAlex Smith def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1136a7f4df4eSAlex Smith 1137a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 1138d30a2b47SLinus Walleij select GPIOLIB 1139a9aec7feSAtsushi Nemoto bool 1140a9aec7feSAtsushi Nemoto 11410e2794b0SRalf Baechleconfig FW_CFE 1142df78b5c8SAurelien Jarno bool 1143df78b5c8SAurelien Jarno 11444bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 114534adb28dSRalf Baechle def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT 11464bafad92SFUJITA Tomonori 114740e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES 114840e084a5SRalf Baechle bool 114940e084a5SRalf Baechle 1150885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1151885014bcSFelix Fietkau select DMA_NONCOHERENT 1152885014bcSFelix Fietkau bool 1153885014bcSFelix Fietkau 115420d33064SPaul Burtonconfig DMA_PERDEV_COHERENT 115520d33064SPaul Burton bool 115620d33064SPaul Burton select DMA_MAYBE_COHERENT 115720d33064SPaul Burton 11581da177e4SLinus Torvaldsconfig DMA_COHERENT 11591da177e4SLinus Torvalds bool 11601da177e4SLinus Torvalds 11611da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 11621da177e4SLinus Torvalds bool 1163e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 11644ce588cdSRalf Baechle 1165e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 11664ce588cdSRalf Baechle bool 11671da177e4SLinus Torvalds 116836a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 11691da177e4SLinus Torvalds bool 11701da177e4SLinus Torvalds 11711b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1172dbb74540SRalf Baechle bool 1173dbb74540SRalf Baechle 11741da177e4SLinus Torvaldsconfig MIPS_BONITO64 11751da177e4SLinus Torvalds bool 11761da177e4SLinus Torvalds 11771da177e4SLinus Torvaldsconfig MIPS_MSC 11781da177e4SLinus Torvalds bool 11791da177e4SLinus Torvalds 11801f21d2bdSBrian Murphyconfig MIPS_NILE4 11811f21d2bdSBrian Murphy bool 11821f21d2bdSBrian Murphy 118339b8d525SRalf Baechleconfig SYNC_R4K 118439b8d525SRalf Baechle bool 118539b8d525SRalf Baechle 1186487d70d0SGabor Juhosconfig MIPS_MACHINE 1187487d70d0SGabor Juhos def_bool n 1188487d70d0SGabor Juhos 1189ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1190d388d685SMaciej W. Rozycki def_bool n 1191d388d685SMaciej W. Rozycki 11924e0748f5SMarkos Chandrasconfig GENERIC_CSUM 11934e0748f5SMarkos Chandras bool 11944e0748f5SMarkos Chandras 11958313da30SRalf Baechleconfig GENERIC_ISA_DMA 11968313da30SRalf Baechle bool 11978313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1198a35bee8aSNamhyung Kim select ISA_DMA_API 11998313da30SRalf Baechle 1200aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1201aa414dffSRalf Baechle bool 12028313da30SRalf Baechle select GENERIC_ISA_DMA 1203aa414dffSRalf Baechle 1204a35bee8aSNamhyung Kimconfig ISA_DMA_API 1205a35bee8aSNamhyung Kim bool 1206a35bee8aSNamhyung Kim 1207465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1208465aaed0SDavid Daney bool 1209465aaed0SDavid Daney 12108c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE 12118c530ea3SMatt Redfearn bool 12128c530ea3SMatt Redfearn help 12138c530ea3SMatt Redfearn Selected if the platform supports relocating the kernel. 12148c530ea3SMatt Redfearn The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF 12158c530ea3SMatt Redfearn to allow access to command line and entropy sources. 12168c530ea3SMatt Redfearn 12175e83d430SRalf Baechle# 12186b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 12195e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 12205e83d430SRalf Baechle# choice statement should be more obvious to the user. 12215e83d430SRalf Baechle# 12225e83d430SRalf Baechlechoice 12236b2aac42SMasanari Iida prompt "Endianness selection" 12241da177e4SLinus Torvalds help 12251da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 12265e83d430SRalf Baechle byte order. These modes require different kernels and a different 12273cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 12285e83d430SRalf Baechle particular system but some systems are just as commonly used in the 12293dde6ad8SDavid Sterba one or the other endianness. 12305e83d430SRalf Baechle 12315e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 12325e83d430SRalf Baechle bool "Big endian" 12335e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 12345e83d430SRalf Baechle 12355e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 12365e83d430SRalf Baechle bool "Little endian" 12375e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 12385e83d430SRalf Baechle 12395e83d430SRalf Baechleendchoice 12405e83d430SRalf Baechle 124122b0763aSDavid Daneyconfig EXPORT_UASM 124222b0763aSDavid Daney bool 124322b0763aSDavid Daney 12442116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 12452116245eSRalf Baechle bool 12462116245eSRalf Baechle 12475e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 12485e83d430SRalf Baechle bool 12495e83d430SRalf Baechle 12505e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 12515e83d430SRalf Baechle bool 12521da177e4SLinus Torvalds 12539cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 12549cffd154SDavid Daney bool 12559cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 12569cffd154SDavid Daney default y 12579cffd154SDavid Daney 1258aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1259aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1260aa1762f4SDavid Daney 12611da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 12621da177e4SLinus Torvalds bool 12631da177e4SLinus Torvalds 12649267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 12659267a30dSMarc St-Jean bool 12669267a30dSMarc St-Jean 12679267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 12689267a30dSMarc St-Jean bool 12699267a30dSMarc St-Jean 12708420fd00SAtsushi Nemotoconfig IRQ_TXX9 12718420fd00SAtsushi Nemoto bool 12728420fd00SAtsushi Nemoto 1273d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1274d5ab1a69SYoichi Yuasa bool 1275d5ab1a69SYoichi Yuasa 1276252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 12771da177e4SLinus Torvalds bool 12781da177e4SLinus Torvalds 12799267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 12809267a30dSMarc St-Jean bool 12819267a30dSMarc St-Jean 1282a83860c2SRalf Baechleconfig SOC_EMMA2RH 1283a83860c2SRalf Baechle bool 1284a83860c2SRalf Baechle select CEVT_R4K 1285a83860c2SRalf Baechle select CSRC_R4K 1286a83860c2SRalf Baechle select DMA_NONCOHERENT 128767e38cf2SRalf Baechle select IRQ_MIPS_CPU 1288a83860c2SRalf Baechle select SWAP_IO_SPACE 1289a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1290a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1291a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1292a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1293a83860c2SRalf Baechle 1294edb6310aSDaniel Lairdconfig SOC_PNX833X 1295edb6310aSDaniel Laird bool 1296edb6310aSDaniel Laird select CEVT_R4K 1297edb6310aSDaniel Laird select CSRC_R4K 129867e38cf2SRalf Baechle select IRQ_MIPS_CPU 1299edb6310aSDaniel Laird select DMA_NONCOHERENT 1300edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1301edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1302edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1303edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1304377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1305edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1306edb6310aSDaniel Laird 1307edb6310aSDaniel Lairdconfig SOC_PNX8335 1308edb6310aSDaniel Laird bool 1309edb6310aSDaniel Laird select SOC_PNX833X 1310edb6310aSDaniel Laird 1311a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1312a7e07b1aSMarkos Chandras bool 1313a7e07b1aSMarkos Chandras 13141da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 13151da177e4SLinus Torvalds bool 13161da177e4SLinus Torvalds 1317e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1318e2defae5SThomas Bogendoerfer bool 1319e2defae5SThomas Bogendoerfer 13205b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 13215b438c44SThomas Bogendoerfer bool 13225b438c44SThomas Bogendoerfer 1323e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1324e2defae5SThomas Bogendoerfer bool 1325e2defae5SThomas Bogendoerfer 1326e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1327e2defae5SThomas Bogendoerfer bool 1328e2defae5SThomas Bogendoerfer 1329e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1330e2defae5SThomas Bogendoerfer bool 1331e2defae5SThomas Bogendoerfer 1332e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1333e2defae5SThomas Bogendoerfer bool 1334e2defae5SThomas Bogendoerfer 1335e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1336e2defae5SThomas Bogendoerfer bool 1337e2defae5SThomas Bogendoerfer 13380e2794b0SRalf Baechleconfig FW_ARC32 13395e83d430SRalf Baechle bool 13405e83d430SRalf Baechle 1341aaa9fad3SPaul Bolleconfig FW_SNIPROM 1342231a35d3SThomas Bogendoerfer bool 1343231a35d3SThomas Bogendoerfer 13441da177e4SLinus Torvaldsconfig BOOT_ELF32 13451da177e4SLinus Torvalds bool 13461da177e4SLinus Torvalds 1347930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1348930beb5aSFlorian Fainelli bool 1349930beb5aSFlorian Fainelli 1350930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1351930beb5aSFlorian Fainelli bool 1352930beb5aSFlorian Fainelli 1353930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1354930beb5aSFlorian Fainelli bool 1355930beb5aSFlorian Fainelli 1356930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1357930beb5aSFlorian Fainelli bool 1358930beb5aSFlorian Fainelli 13591da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 13601da177e4SLinus Torvalds int 1361a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 13625432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 13635432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 13645432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 13651da177e4SLinus Torvalds default "5" 13661da177e4SLinus Torvalds 13671da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 13681da177e4SLinus Torvalds bool 13691da177e4SLinus Torvalds 13701da177e4SLinus Torvaldsconfig ARC_CONSOLE 13711da177e4SLinus Torvalds bool "ARC console support" 1372e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 13731da177e4SLinus Torvalds 13741da177e4SLinus Torvaldsconfig ARC_MEMORY 13751da177e4SLinus Torvalds bool 137614b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 13771da177e4SLinus Torvalds default y 13781da177e4SLinus Torvalds 13791da177e4SLinus Torvaldsconfig ARC_PROMLIB 13801da177e4SLinus Torvalds bool 1381e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 13821da177e4SLinus Torvalds default y 13831da177e4SLinus Torvalds 13840e2794b0SRalf Baechleconfig FW_ARC64 13851da177e4SLinus Torvalds bool 13861da177e4SLinus Torvalds 13871da177e4SLinus Torvaldsconfig BOOT_ELF64 13881da177e4SLinus Torvalds bool 13891da177e4SLinus Torvalds 13901da177e4SLinus Torvaldsmenu "CPU selection" 13911da177e4SLinus Torvalds 13921da177e4SLinus Torvaldschoice 13931da177e4SLinus Torvalds prompt "CPU type" 13941da177e4SLinus Torvalds default CPU_R4X00 13951da177e4SLinus Torvalds 13960e476d91SHuacai Chenconfig CPU_LOONGSON3 13970e476d91SHuacai Chen bool "Loongson 3 CPU" 13980e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 13990e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 14000e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 14010e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 14020e476d91SHuacai Chen select WEAK_ORDERING 14030e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 1404b2edcfc8SHuacai Chen select MIPS_PGD_C0_CONTEXT 1405d30a2b47SLinus Walleij select GPIOLIB 14060e476d91SHuacai Chen help 14070e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 14080e476d91SHuacai Chen set with many extensions. 14090e476d91SHuacai Chen 14101e820da3SHuacai Chenconfig LOONGSON3_ENHANCEMENT 14111e820da3SHuacai Chen bool "New Loongson 3 CPU Enhancements" 14121e820da3SHuacai Chen default n 14131e820da3SHuacai Chen select CPU_MIPSR2 14141e820da3SHuacai Chen select CPU_HAS_PREFETCH 14151e820da3SHuacai Chen depends on CPU_LOONGSON3 14161e820da3SHuacai Chen help 14171e820da3SHuacai Chen New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A 14181e820da3SHuacai Chen R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as 14191e820da3SHuacai Chen FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User 14201e820da3SHuacai Chen Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), 14211e820da3SHuacai Chen Fast TLB refill support, etc. 14221e820da3SHuacai Chen 14231e820da3SHuacai Chen This option enable those enhancements which are not probed at run 14241e820da3SHuacai Chen time. If you want a generic kernel to run on all Loongson 3 machines, 14251e820da3SHuacai Chen please say 'N' here. If you want a high-performance kernel to run on 14261e820da3SHuacai Chen new Loongson 3 machines only, please say 'Y' here. 14271e820da3SHuacai Chen 14283702bba5SWu Zhangjinconfig CPU_LOONGSON2E 14293702bba5SWu Zhangjin bool "Loongson 2E" 14303702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 14313702bba5SWu Zhangjin select CPU_LOONGSON2 14322a21c730SFuxin Zhang help 14332a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 14342a21c730SFuxin Zhang with many extensions. 14352a21c730SFuxin Zhang 143625985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 14376f7a251aSWu Zhangjin bonito64. 14386f7a251aSWu Zhangjin 14396f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 14406f7a251aSWu Zhangjin bool "Loongson 2F" 14416f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 14426f7a251aSWu Zhangjin select CPU_LOONGSON2 1443d30a2b47SLinus Walleij select GPIOLIB 14446f7a251aSWu Zhangjin help 14456f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 14466f7a251aSWu Zhangjin with many extensions. 14476f7a251aSWu Zhangjin 14486f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 14496f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 14506f7a251aSWu Zhangjin Loongson2E. 14516f7a251aSWu Zhangjin 1452ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1453ca585cf9SKelvin Cheung bool "Loongson 1B" 1454ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1455ca585cf9SKelvin Cheung select CPU_LOONGSON1 14569ec88b60SKelvin Cheung select LEDS_GPIO_REGISTER 1457ca585cf9SKelvin Cheung help 1458ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1459ca585cf9SKelvin Cheung release 2 instruction set. 1460ca585cf9SKelvin Cheung 146112e3280bSYang Lingconfig CPU_LOONGSON1C 146212e3280bSYang Ling bool "Loongson 1C" 146312e3280bSYang Ling depends on SYS_HAS_CPU_LOONGSON1C 146412e3280bSYang Ling select CPU_LOONGSON1 146512e3280bSYang Ling select ARCH_WANT_OPTIONAL_GPIOLIB 146612e3280bSYang Ling select LEDS_GPIO_REGISTER 146712e3280bSYang Ling help 146812e3280bSYang Ling The Loongson 1C is a 32-bit SoC, which implements the MIPS32 146912e3280bSYang Ling release 2 instruction set. 147012e3280bSYang Ling 14716e760c8dSRalf Baechleconfig CPU_MIPS32_R1 14726e760c8dSRalf Baechle bool "MIPS32 Release 1" 14737cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 14746e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1475797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1476ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14776e760c8dSRalf Baechle help 14785e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 14791e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14801e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14811e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14821e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14831e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 14841e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 14851e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 14861e5f1caaSRalf Baechle performance. 14871e5f1caaSRalf Baechle 14881e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 14891e5f1caaSRalf Baechle bool "MIPS32 Release 2" 14907cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 14911e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1492797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1493ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1494a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14952235a54dSSanjay Lal select HAVE_KVM 14961e5f1caaSRalf Baechle help 14975e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 14986e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14996e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 15006e760c8dSRalf Baechle specific type of processor in your system, choose those that one 15016e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 15021da177e4SLinus Torvalds 15037fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 1504674d10e2SMarkos Chandras bool "MIPS32 Release 6" 15057fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 15067fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 15077fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 15087fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 15097fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 15104e0748f5SMarkos Chandras select GENERIC_CSUM 15117fd08ca5SLeonid Yegoshin select HAVE_KVM 15127fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 15137fd08ca5SLeonid Yegoshin help 15147fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 15157fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 15167fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 15177fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 15187fd08ca5SLeonid Yegoshin 15196e760c8dSRalf Baechleconfig CPU_MIPS64_R1 15206e760c8dSRalf Baechle bool "MIPS64 Release 1" 15217cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1522797798c1SRalf Baechle select CPU_HAS_PREFETCH 1523ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1524ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1525ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15269cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 15276e760c8dSRalf Baechle help 15286e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 15296e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 15306e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 15316e760c8dSRalf Baechle specific type of processor in your system, choose those that one 15326e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 15331e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 15341e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 15351e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 15361e5f1caaSRalf Baechle performance. 15371e5f1caaSRalf Baechle 15381e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 15391e5f1caaSRalf Baechle bool "MIPS64 Release 2" 15407cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1541797798c1SRalf Baechle select CPU_HAS_PREFETCH 15421e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 15431e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1544ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15459cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1546a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 154740a2df49SJames Hogan select HAVE_KVM 15481e5f1caaSRalf Baechle help 15491e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 15501e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 15511e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 15521e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 15531e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 15541da177e4SLinus Torvalds 15557fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 1556674d10e2SMarkos Chandras bool "MIPS64 Release 6" 15577fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 15587fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 15597fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 15607fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 15617fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 15627fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 15634e0748f5SMarkos Chandras select GENERIC_CSUM 15644e9d324dSPaul Burton select MIPS_O32_FP64_SUPPORT if MIPS32_O32 156540a2df49SJames Hogan select HAVE_KVM 15667fd08ca5SLeonid Yegoshin help 15677fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 15687fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 15697fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 15707fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 15717fd08ca5SLeonid Yegoshin 15721da177e4SLinus Torvaldsconfig CPU_R3000 15731da177e4SLinus Torvalds bool "R3000" 15747cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1575f7062ddbSRalf Baechle select CPU_HAS_WB 1576ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1577797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15781da177e4SLinus Torvalds help 15791da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 15801da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 15811da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 15821da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 15831da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 15841da177e4SLinus Torvalds try to recompile with R3000. 15851da177e4SLinus Torvalds 15861da177e4SLinus Torvaldsconfig CPU_TX39XX 15871da177e4SLinus Torvalds bool "R39XX" 15887cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1589ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 15901da177e4SLinus Torvalds 15911da177e4SLinus Torvaldsconfig CPU_VR41XX 15921da177e4SLinus Torvalds bool "R41xx" 15937cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1594ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1595ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15961da177e4SLinus Torvalds help 15975e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 15981da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 15991da177e4SLinus Torvalds kernel built with this option will not run on any other type of 16001da177e4SLinus Torvalds processor or vice versa. 16011da177e4SLinus Torvalds 16021da177e4SLinus Torvaldsconfig CPU_R4300 16031da177e4SLinus Torvalds bool "R4300" 16047cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1605ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1606ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 16071da177e4SLinus Torvalds help 16081da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 16091da177e4SLinus Torvalds 16101da177e4SLinus Torvaldsconfig CPU_R4X00 16111da177e4SLinus Torvalds bool "R4x00" 16127cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1613ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1614ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1615970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16161da177e4SLinus Torvalds help 16171da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 16181da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 16191da177e4SLinus Torvalds 16201da177e4SLinus Torvaldsconfig CPU_TX49XX 16211da177e4SLinus Torvalds bool "R49XX" 16227cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1623de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1624ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1625ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1626970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16271da177e4SLinus Torvalds 16281da177e4SLinus Torvaldsconfig CPU_R5000 16291da177e4SLinus Torvalds bool "R5000" 16307cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1631ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1632ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1633970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16341da177e4SLinus Torvalds help 16351da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 16361da177e4SLinus Torvalds 16371da177e4SLinus Torvaldsconfig CPU_R5432 16381da177e4SLinus Torvalds bool "R5432" 16397cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 16405e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 16415e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1642970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16431da177e4SLinus Torvalds 1644542c1020SShinya Kuribayashiconfig CPU_R5500 1645542c1020SShinya Kuribayashi bool "R5500" 1646542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1647542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1648542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 16499cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1650542c1020SShinya Kuribayashi help 1651542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1652542c1020SShinya Kuribayashi instruction set. 1653542c1020SShinya Kuribayashi 16541da177e4SLinus Torvaldsconfig CPU_R6000 16551da177e4SLinus Torvalds bool "R6000" 16567cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1657ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 16581da177e4SLinus Torvalds help 16591da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1660c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 16611da177e4SLinus Torvalds 16621da177e4SLinus Torvaldsconfig CPU_NEVADA 16631da177e4SLinus Torvalds bool "RM52xx" 16647cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1665ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1666ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1667970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16681da177e4SLinus Torvalds help 16691da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 16701da177e4SLinus Torvalds 16711da177e4SLinus Torvaldsconfig CPU_R8000 16721da177e4SLinus Torvalds bool "R8000" 16737cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 16745e83d430SRalf Baechle select CPU_HAS_PREFETCH 1675ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 16761da177e4SLinus Torvalds help 16771da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 16781da177e4SLinus Torvalds uncommon and the support for them is incomplete. 16791da177e4SLinus Torvalds 16801da177e4SLinus Torvaldsconfig CPU_R10000 16811da177e4SLinus Torvalds bool "R10000" 16827cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 16835e83d430SRalf Baechle select CPU_HAS_PREFETCH 1684ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1685ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1686797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1687970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16881da177e4SLinus Torvalds help 16891da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 16901da177e4SLinus Torvalds 16911da177e4SLinus Torvaldsconfig CPU_RM7000 16921da177e4SLinus Torvalds bool "RM7000" 16937cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 16945e83d430SRalf Baechle select CPU_HAS_PREFETCH 1695ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1696ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1697797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1698970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16991da177e4SLinus Torvalds 17001da177e4SLinus Torvaldsconfig CPU_SB1 17011da177e4SLinus Torvalds bool "SB1" 17027cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1703ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1704ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1705797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1706970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17070004a9dfSRalf Baechle select WEAK_ORDERING 17081da177e4SLinus Torvalds 1709a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1710a86c7f72SDavid Daney bool "Cavium Octeon processor" 17115e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1712a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1713a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1714a86c7f72SDavid Daney select WEAK_ORDERING 1715a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 17169cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1717df115f3eSBen Hutchings select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1718df115f3eSBen Hutchings select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1719930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1720a86c7f72SDavid Daney help 1721a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1722a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1723a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1724a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1725a86c7f72SDavid Daney 1726cd746249SJonas Gorskiconfig CPU_BMIPS 1727cd746249SJonas Gorski bool "Broadcom BMIPS" 1728cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1729cd746249SJonas Gorski select CPU_MIPS32 1730fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1731cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1732cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1733cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1734cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1735cd746249SJonas Gorski select DMA_NONCOHERENT 173667e38cf2SRalf Baechle select IRQ_MIPS_CPU 1737cd746249SJonas Gorski select SWAP_IO_SPACE 1738cd746249SJonas Gorski select WEAK_ORDERING 1739c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 174069aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1741c1c0c461SKevin Cernekee help 1742fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1743c1c0c461SKevin Cernekee 17447f058e85SJayachandran Cconfig CPU_XLR 17457f058e85SJayachandran C bool "Netlogic XLR SoC" 17467f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 17477f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 17487f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17497f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1750970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17517f058e85SJayachandran C select WEAK_ORDERING 17527f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17537f058e85SJayachandran C help 17547f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 17551c773ea4SJayachandran C 17561c773ea4SJayachandran Cconfig CPU_XLP 17571c773ea4SJayachandran C bool "Netlogic XLP SoC" 17581c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 17591c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 17601c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17611c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 17621c773ea4SJayachandran C select WEAK_ORDERING 17631c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17641c773ea4SJayachandran C select CPU_HAS_PREFETCH 1765d6504846SJayachandran C select CPU_MIPSR2 1766ddba6833SPrem Mallappa select CPU_SUPPORTS_HUGEPAGES 17672db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 17681c773ea4SJayachandran C help 17691c773ea4SJayachandran C Netlogic Microsystems XLP processors. 17701da177e4SLinus Torvaldsendchoice 17711da177e4SLinus Torvalds 1772a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1773a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1774a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 17757fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1776a6e18781SLeonid Yegoshin help 1777a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1778a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1779a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1780a6e18781SLeonid Yegoshin 1781a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1782a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1783a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1784a6e18781SLeonid Yegoshin select EVA 1785a6e18781SLeonid Yegoshin default y 1786a6e18781SLeonid Yegoshin help 1787a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1788a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1789a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1790a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1791a6e18781SLeonid Yegoshin 1792c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1793c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1794c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1795c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1796c5b36783SSteven J. Hill help 1797c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1798c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1799c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1800c5b36783SSteven J. Hill 1801c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1802c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1803c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1804c5b36783SSteven J. Hill depends on !EVA 1805c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1806c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1807c5b36783SSteven J. Hill select XPA 1808c5b36783SSteven J. Hill select HIGHMEM 1809c5b36783SSteven J. Hill select ARCH_PHYS_ADDR_T_64BIT 1810c5b36783SSteven J. Hill default n 1811c5b36783SSteven J. Hill help 1812c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1813c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1814c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1815c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1816c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1817c5b36783SSteven J. Hill If unsure, say 'N' here. 1818c5b36783SSteven J. Hill 1819622844bfSWu Zhangjinif CPU_LOONGSON2F 1820622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1821622844bfSWu Zhangjin bool 1822622844bfSWu Zhangjin 1823622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1824622844bfSWu Zhangjin bool 1825622844bfSWu Zhangjin 1826622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1827622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1828622844bfSWu Zhangjin default y 1829622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1830622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1831622844bfSWu Zhangjin help 1832622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1833622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1834622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1835622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1836622844bfSWu Zhangjin 1837622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1838622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1839622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1840622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1841622844bfSWu Zhangjin systems. 1842622844bfSWu Zhangjin 1843622844bfSWu Zhangjin If unsure, please say Y. 1844622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1845622844bfSWu Zhangjin 18461b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 18471b93b3c3SWu Zhangjin bool 18481b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 18491b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 185031c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 18511b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1852fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 18534e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 18541b93b3c3SWu Zhangjin 18551b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 18561b93b3c3SWu Zhangjin bool 18571b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 18581b93b3c3SWu Zhangjin 1859dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM 1860dbb98314SAlban Bedel bool 1861dbb98314SAlban Bedel select SYS_SUPPORTS_ZBOOT 1862dbb98314SAlban Bedel 18633702bba5SWu Zhangjinconfig CPU_LOONGSON2 18643702bba5SWu Zhangjin bool 18653702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 18663702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 18673702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1868970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 18693702bba5SWu Zhangjin 1870ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1871ca585cf9SKelvin Cheung bool 1872ca585cf9SKelvin Cheung select CPU_MIPS32 1873ca585cf9SKelvin Cheung select CPU_MIPSR2 1874ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1875ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1876ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1877f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1878ca585cf9SKelvin Cheung 1879fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 188004fa8bf7SJonas Gorski select SMP_UP if SMP 18811bbb6c1bSKevin Cernekee bool 1882cd746249SJonas Gorski 1883cd746249SJonas Gorskiconfig CPU_BMIPS4350 1884cd746249SJonas Gorski bool 1885cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1886cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1887cd746249SJonas Gorski 1888cd746249SJonas Gorskiconfig CPU_BMIPS4380 1889cd746249SJonas Gorski bool 1890bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1891cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1892cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1893b4720809SFlorian Fainelli select CPU_HAS_RIXI 1894cd746249SJonas Gorski 1895cd746249SJonas Gorskiconfig CPU_BMIPS5000 1896cd746249SJonas Gorski bool 1897cd746249SJonas Gorski select MIPS_CPU_SCACHE 1898bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1899cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1900cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1901b4720809SFlorian Fainelli select CPU_HAS_RIXI 19021bbb6c1bSKevin Cernekee 19030e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 19040e476d91SHuacai Chen bool 19050e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 1906b2edcfc8SHuacai Chen select CPU_HAS_RIXI 19070e476d91SHuacai Chen 19083702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 19092a21c730SFuxin Zhang bool 19102a21c730SFuxin Zhang 19116f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 19126f7a251aSWu Zhangjin bool 191355045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 191455045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 191522f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 19166f7a251aSWu Zhangjin 1917ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1918ca585cf9SKelvin Cheung bool 1919ca585cf9SKelvin Cheung 192012e3280bSYang Lingconfig SYS_HAS_CPU_LOONGSON1C 192112e3280bSYang Ling bool 192212e3280bSYang Ling 19237cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 19247cf8053bSRalf Baechle bool 19257cf8053bSRalf Baechle 19267cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 19277cf8053bSRalf Baechle bool 19287cf8053bSRalf Baechle 1929a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1930a6e18781SLeonid Yegoshin bool 1931a6e18781SLeonid Yegoshin 1932c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1933c5b36783SSteven J. Hill bool 1934c5b36783SSteven J. Hill 19357fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 19367fd08ca5SLeonid Yegoshin bool 19377fd08ca5SLeonid Yegoshin 19387cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 19397cf8053bSRalf Baechle bool 19407cf8053bSRalf Baechle 19417cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 19427cf8053bSRalf Baechle bool 19437cf8053bSRalf Baechle 19447fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 19457fd08ca5SLeonid Yegoshin bool 19467fd08ca5SLeonid Yegoshin 19477cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 19487cf8053bSRalf Baechle bool 19497cf8053bSRalf Baechle 19507cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 19517cf8053bSRalf Baechle bool 19527cf8053bSRalf Baechle 19537cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 19547cf8053bSRalf Baechle bool 19557cf8053bSRalf Baechle 19567cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 19577cf8053bSRalf Baechle bool 19587cf8053bSRalf Baechle 19597cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 19607cf8053bSRalf Baechle bool 19617cf8053bSRalf Baechle 19627cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 19637cf8053bSRalf Baechle bool 19647cf8053bSRalf Baechle 19657cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 19667cf8053bSRalf Baechle bool 19677cf8053bSRalf Baechle 19687cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 19697cf8053bSRalf Baechle bool 19707cf8053bSRalf Baechle 1971542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1972542c1020SShinya Kuribayashi bool 1973542c1020SShinya Kuribayashi 19747cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 19757cf8053bSRalf Baechle bool 19767cf8053bSRalf Baechle 19777cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 19787cf8053bSRalf Baechle bool 19797cf8053bSRalf Baechle 19807cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 19817cf8053bSRalf Baechle bool 19827cf8053bSRalf Baechle 19837cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 19847cf8053bSRalf Baechle bool 19857cf8053bSRalf Baechle 19867cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 19877cf8053bSRalf Baechle bool 19887cf8053bSRalf Baechle 19897cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 19907cf8053bSRalf Baechle bool 19917cf8053bSRalf Baechle 19925e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 19935e683389SDavid Daney bool 19945e683389SDavid Daney 1995cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1996c1c0c461SKevin Cernekee bool 1997c1c0c461SKevin Cernekee 1998fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1999c1c0c461SKevin Cernekee bool 2000cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 2001c1c0c461SKevin Cernekee 2002c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 2003c1c0c461SKevin Cernekee bool 2004cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 2005c1c0c461SKevin Cernekee 2006c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 2007c1c0c461SKevin Cernekee bool 2008cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 2009c1c0c461SKevin Cernekee 2010c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 2011c1c0c461SKevin Cernekee bool 2012cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 2013c1c0c461SKevin Cernekee 20147f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 20157f058e85SJayachandran C bool 20167f058e85SJayachandran C 20171c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 20181c773ea4SJayachandran C bool 20191c773ea4SJayachandran C 2020b6911bbaSPaul Burtonconfig MIPS_MALTA_PM 2021b6911bbaSPaul Burton depends on MIPS_MALTA 2022b6911bbaSPaul Burton depends on PCI 2023b6911bbaSPaul Burton bool 2024b6911bbaSPaul Burton default y 2025b6911bbaSPaul Burton 202617099b11SRalf Baechle# 202717099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 202817099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 202917099b11SRalf Baechle# 20300004a9dfSRalf Baechleconfig WEAK_ORDERING 20310004a9dfSRalf Baechle bool 203217099b11SRalf Baechle 203317099b11SRalf Baechle# 203417099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 203517099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 203617099b11SRalf Baechle# 203717099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 203817099b11SRalf Baechle bool 20395e83d430SRalf Baechleendmenu 20405e83d430SRalf Baechle 20415e83d430SRalf Baechle# 20425e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 20435e83d430SRalf Baechle# 20445e83d430SRalf Baechleconfig CPU_MIPS32 20455e83d430SRalf Baechle bool 20467fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 20475e83d430SRalf Baechle 20485e83d430SRalf Baechleconfig CPU_MIPS64 20495e83d430SRalf Baechle bool 20507fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 20515e83d430SRalf Baechle 20525e83d430SRalf Baechle# 2053c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 20545e83d430SRalf Baechle# 20555e83d430SRalf Baechleconfig CPU_MIPSR1 20565e83d430SRalf Baechle bool 20575e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 20585e83d430SRalf Baechle 20595e83d430SRalf Baechleconfig CPU_MIPSR2 20605e83d430SRalf Baechle bool 2061a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 20628256b17eSFlorian Fainelli select CPU_HAS_RIXI 2063a7e07b1aSMarkos Chandras select MIPS_SPRAM 20645e83d430SRalf Baechle 20657fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 20667fd08ca5SLeonid Yegoshin bool 20677fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 20688256b17eSFlorian Fainelli select CPU_HAS_RIXI 206987321fddSPaul Burton select HAVE_ARCH_BITREVERSE 20702db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 2071a7e07b1aSMarkos Chandras select MIPS_SPRAM 20725e83d430SRalf Baechle 2073a6e18781SLeonid Yegoshinconfig EVA 2074a6e18781SLeonid Yegoshin bool 2075a6e18781SLeonid Yegoshin 2076c5b36783SSteven J. Hillconfig XPA 2077c5b36783SSteven J. Hill bool 2078c5b36783SSteven J. Hill 20795e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 20805e83d430SRalf Baechle bool 20815e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 20825e83d430SRalf Baechle bool 20835e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 20845e83d430SRalf Baechle bool 20855e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 20865e83d430SRalf Baechle bool 208755045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 208855045ff5SWu Zhangjin bool 208955045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 209055045ff5SWu Zhangjin bool 20919cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 20929cffd154SDavid Daney bool 209322f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 209422f1fdfdSWu Zhangjin bool 209582622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 209682622284SDavid Daney bool 2097d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 20985e83d430SRalf Baechle 20998192c9eaSDavid Daney# 21008192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 21018192c9eaSDavid Daney# 21028192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 21038192c9eaSDavid Daney bool 2104679eb637SJames Hogan default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 21058192c9eaSDavid Daney 21065e83d430SRalf Baechlemenu "Kernel type" 21075e83d430SRalf Baechle 21085e83d430SRalf Baechlechoice 21095e83d430SRalf Baechle prompt "Kernel code model" 21105e83d430SRalf Baechle help 21115e83d430SRalf Baechle You should only select this option if you have a workload that 21125e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 21135e83d430SRalf Baechle large memory. You will only be presented a single option in this 21145e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 21155e83d430SRalf Baechle 21165e83d430SRalf Baechleconfig 32BIT 21175e83d430SRalf Baechle bool "32-bit kernel" 21185e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 21195e83d430SRalf Baechle select TRAD_SIGNALS 21205e83d430SRalf Baechle help 21215e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 2122f17c4ca3SRalf Baechle 21235e83d430SRalf Baechleconfig 64BIT 21245e83d430SRalf Baechle bool "64-bit kernel" 21255e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 21265e83d430SRalf Baechle help 21275e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 21285e83d430SRalf Baechle 21295e83d430SRalf Baechleendchoice 21305e83d430SRalf Baechle 21312235a54dSSanjay Lalconfig KVM_GUEST 21322235a54dSSanjay Lal bool "KVM Guest Kernel" 2133f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 21342235a54dSSanjay Lal help 2135caa1faa7SJames Hogan Select this option if building a guest kernel for KVM (Trap & Emulate) 2136caa1faa7SJames Hogan mode. 21372235a54dSSanjay Lal 2138eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 2139eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 21402235a54dSSanjay Lal depends on KVM_GUEST 2141eda3d33cSJames Hogan default 100 21422235a54dSSanjay Lal help 2143eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 2144eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 2145eda3d33cSJames Hogan timer frequency is specified directly. 21462235a54dSSanjay Lal 21471e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48 21481e321fa9SLeonid Yegoshin bool "48 bits virtual memory" 21491e321fa9SLeonid Yegoshin depends on 64BIT 21501e321fa9SLeonid Yegoshin help 21511e321fa9SLeonid Yegoshin Support a maximum at least 48 bits of application virtual memory. 21521e321fa9SLeonid Yegoshin Default is 40 bits or less, depending on the CPU. 21531e321fa9SLeonid Yegoshin This option result in a small memory overhead for page tables. 21541e321fa9SLeonid Yegoshin This option is only supported with 16k and 64k page sizes. 21551e321fa9SLeonid Yegoshin If unsure, say N. 21561e321fa9SLeonid Yegoshin 21571da177e4SLinus Torvaldschoice 21581da177e4SLinus Torvalds prompt "Kernel page size" 21591da177e4SLinus Torvalds default PAGE_SIZE_4KB 21601da177e4SLinus Torvalds 21611da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 21621da177e4SLinus Torvalds bool "4kB" 21630e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 21641e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 21651da177e4SLinus Torvalds help 21661da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 21671da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 21681da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 21691da177e4SLinus Torvalds recommended for low memory systems. 21701da177e4SLinus Torvalds 21711da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 21721da177e4SLinus Torvalds bool "8kB" 21737d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 21741e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 21751da177e4SLinus Torvalds help 21761da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 21771da177e4SLinus Torvalds the price of higher memory consumption. This option is available 2178c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 2179c52399beSRalf Baechle suitable Linux distribution to support this. 21801da177e4SLinus Torvalds 21811da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 21821da177e4SLinus Torvalds bool "16kB" 2183714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 21841da177e4SLinus Torvalds help 21851da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 21861da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 2187714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 2188714bfad6SRalf Baechle Linux distribution to support this. 21891da177e4SLinus Torvalds 2190c52399beSRalf Baechleconfig PAGE_SIZE_32KB 2191c52399beSRalf Baechle bool "32kB" 2192c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 21931e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 2194c52399beSRalf Baechle help 2195c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 2196c52399beSRalf Baechle the price of higher memory consumption. This option is available 2197c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 2198c52399beSRalf Baechle distribution to support this. 2199c52399beSRalf Baechle 22001da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 22011da177e4SLinus Torvalds bool "64kB" 220274c81ecdSRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000 22031da177e4SLinus Torvalds help 22041da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 22051da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 22061da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 2207714bfad6SRalf Baechle writing this option is still high experimental. 22081da177e4SLinus Torvalds 22091da177e4SLinus Torvaldsendchoice 22101da177e4SLinus Torvalds 2211c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 2212c9bace7cSDavid Daney int "Maximum zone order" 2213e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2214e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2215e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2216e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2217e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2218e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2219c9bace7cSDavid Daney range 11 64 2220c9bace7cSDavid Daney default "11" 2221c9bace7cSDavid Daney help 2222c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2223c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2224c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2225c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2226c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2227c9bace7cSDavid Daney increase this value. 2228c9bace7cSDavid Daney 2229c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2230c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2231c9bace7cSDavid Daney 2232c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2233c9bace7cSDavid Daney when choosing a value for this option. 2234c9bace7cSDavid Daney 22351da177e4SLinus Torvaldsconfig BOARD_SCACHE 22361da177e4SLinus Torvalds bool 22371da177e4SLinus Torvalds 22381da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 22391da177e4SLinus Torvalds bool 22401da177e4SLinus Torvalds select BOARD_SCACHE 22411da177e4SLinus Torvalds 22429318c51aSChris Dearman# 22439318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 22449318c51aSChris Dearman# 22459318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 22469318c51aSChris Dearman bool 22479318c51aSChris Dearman select BOARD_SCACHE 22489318c51aSChris Dearman 22491da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 22501da177e4SLinus Torvalds bool 22511da177e4SLinus Torvalds select BOARD_SCACHE 22521da177e4SLinus Torvalds 22531da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 22541da177e4SLinus Torvalds bool 22551da177e4SLinus Torvalds select BOARD_SCACHE 22561da177e4SLinus Torvalds 22571da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 22581da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 22591da177e4SLinus Torvalds depends on CPU_SB1 22601da177e4SLinus Torvalds help 22611da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 22621da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 22631da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 22641da177e4SLinus Torvalds 22651da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2266c8094b53SRalf Baechle bool 22671da177e4SLinus Torvalds 22683165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 22693165c846SFlorian Fainelli bool 22703165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 22713165c846SFlorian Fainelli 227291405eb6SFlorian Fainelliconfig CPU_R4K_FPU 227391405eb6SFlorian Fainelli bool 227491405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 227591405eb6SFlorian Fainelli 227662cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 227762cedc4fSFlorian Fainelli bool 227862cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 227962cedc4fSFlorian Fainelli 228059d6ab86SRalf Baechleconfig MIPS_MT_SMP 2281a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 22825676319cSMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 228359d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2284d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2285c080faa5SSteven J. Hill select SYNC_R4K 228659d6ab86SRalf Baechle select MIPS_MT 228759d6ab86SRalf Baechle select SMP 228887353d8aSRalf Baechle select SMP_UP 2289c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2290c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2291399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 229259d6ab86SRalf Baechle help 2293c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2294c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2295c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2296c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2297c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 229859d6ab86SRalf Baechle 2299f41ae0b2SRalf Baechleconfig MIPS_MT 2300f41ae0b2SRalf Baechle bool 2301f41ae0b2SRalf Baechle 23020ab7aefcSRalf Baechleconfig SCHED_SMT 23030ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 23040ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 23050ab7aefcSRalf Baechle default n 23060ab7aefcSRalf Baechle help 23070ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 23080ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 23090ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 23100ab7aefcSRalf Baechle 23110ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 23120ab7aefcSRalf Baechle bool 23130ab7aefcSRalf Baechle 2314f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2315f41ae0b2SRalf Baechle bool 2316f41ae0b2SRalf Baechle 2317f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2318f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2319f088fc84SRalf Baechle default y 2320b633648cSRalf Baechle depends on MIPS_MT_SMP 232107cc0c9eSRalf Baechle 2322b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2323b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 2324b0a668fbSLeonid Yegoshin depends on CPU_MIPSR6 && !SMP 2325b0a668fbSLeonid Yegoshin default y 2326b0a668fbSLeonid Yegoshin help 2327b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2328b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 232907edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2330b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2331b0a668fbSLeonid Yegoshin final kernel image. 2332b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels" 2333b0a668fbSLeonid Yegoshin depends on SMP && CPU_MIPSR6 2334b0a668fbSLeonid Yegoshin 233507cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 233607cc0c9eSRalf Baechle bool "VPE loader support." 2337704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 233807cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 233907cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 234007cc0c9eSRalf Baechle select MIPS_MT 234107cc0c9eSRalf Baechle help 234207cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 234307cc0c9eSRalf Baechle onto another VPE and running it. 2344f088fc84SRalf Baechle 234517a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 234617a1d523SDeng-Cheng Zhu bool 234717a1d523SDeng-Cheng Zhu default "y" 234817a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 234917a1d523SDeng-Cheng Zhu 23501a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 23511a2a6d7eSDeng-Cheng Zhu bool 23521a2a6d7eSDeng-Cheng Zhu default "y" 23531a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 23541a2a6d7eSDeng-Cheng Zhu 2355e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2356e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2357e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2358e01402b1SRalf Baechle default y 2359e01402b1SRalf Baechle help 2360e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2361e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2362e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2363e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2364e01402b1SRalf Baechle 2365e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2366e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2367e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 23685e83d430SRalf Baechle help 2369e01402b1SRalf Baechle 2370da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2371da615cf6SDeng-Cheng Zhu bool 2372da615cf6SDeng-Cheng Zhu default "y" 2373da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2374da615cf6SDeng-Cheng Zhu 23752c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 23762c973ef0SDeng-Cheng Zhu bool 23772c973ef0SDeng-Cheng Zhu default "y" 23782c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 23792c973ef0SDeng-Cheng Zhu 23804a16ff4cSRalf Baechleconfig MIPS_CMP 23815cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 23825676319cSMarkos Chandras depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 2383b10b43baSMarkos Chandras select SMP 2384eb9b5141STim Anderson select SYNC_R4K 2385b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 23864a16ff4cSRalf Baechle select WEAK_ORDERING 23874a16ff4cSRalf Baechle default n 23884a16ff4cSRalf Baechle help 2389044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2390044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2391044505c7SPaul Burton its ability to start secondary CPUs. 23924a16ff4cSRalf Baechle 23935cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 23945cac93b3SPaul Burton instead of this. 23955cac93b3SPaul Burton 23960ee958e1SPaul Burtonconfig MIPS_CPS 23970ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 23985a3e7c02SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 23990ee958e1SPaul Burton select MIPS_CM 24000ee958e1SPaul Burton select MIPS_CPC 24011d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 24020ee958e1SPaul Burton select SMP 24030ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 24041d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 24050ee958e1SPaul Burton select SYS_SUPPORTS_SMP 24060ee958e1SPaul Burton select WEAK_ORDERING 24070ee958e1SPaul Burton help 24080ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 24090ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 24100ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 24110ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 24120ee958e1SPaul Burton support is unavailable. 24130ee958e1SPaul Burton 24143179d37eSPaul Burtonconfig MIPS_CPS_PM 241539a59593SMarkos Chandras depends on MIPS_CPS 2416a8b84677SPaul Burton select MIPS_CPC 24173179d37eSPaul Burton bool 24183179d37eSPaul Burton 24199f98f3ddSPaul Burtonconfig MIPS_CM 24209f98f3ddSPaul Burton bool 24219f98f3ddSPaul Burton 24229c38cf44SPaul Burtonconfig MIPS_CPC 24239c38cf44SPaul Burton bool 24242600990eSRalf Baechle 24251da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 24261da177e4SLinus Torvalds bool 24271da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 24281da177e4SLinus Torvalds default y 24291da177e4SLinus Torvalds 24301da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 24311da177e4SLinus Torvalds bool 24321da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 24331da177e4SLinus Torvalds default y 24341da177e4SLinus Torvalds 24352235a54dSSanjay Lal 243660ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 243734adb28dSRalf Baechle bool 243860ec6571Spascal@pabr.org 24399e2b5372SMarkos Chandraschoice 24409e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 24419e2b5372SMarkos Chandras 24429e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 24439e2b5372SMarkos Chandras bool "None" 24449e2b5372SMarkos Chandras help 24459e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 24469e2b5372SMarkos Chandras 24479693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 24489693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 24499e2b5372SMarkos Chandras bool "SmartMIPS" 24509693a853SFranck Bui-Huu help 24519693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 24529693a853SFranck Bui-Huu increased security at both hardware and software level for 24539693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 24549693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 24559693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 24569693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 24579693a853SFranck Bui-Huu here. 24589693a853SFranck Bui-Huu 2459bce86083SSteven J. Hillconfig CPU_MICROMIPS 24607fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 24619e2b5372SMarkos Chandras bool "microMIPS" 2462bce86083SSteven J. Hill help 2463bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2464bce86083SSteven J. Hill microMIPS ISA 2465bce86083SSteven J. Hill 24669e2b5372SMarkos Chandrasendchoice 24679e2b5372SMarkos Chandras 2468a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 24690ce3417eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2470a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 24712a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2472a5e9a69eSPaul Burton help 2473a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2474a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 24751db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 24761db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 24771db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 24781db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 24791db1af84SPaul Burton the size & complexity of your kernel. 2480a5e9a69eSPaul Burton 2481a5e9a69eSPaul Burton If unsure, say Y. 2482a5e9a69eSPaul Burton 24831da177e4SLinus Torvaldsconfig CPU_HAS_WB 2484f7062ddbSRalf Baechle bool 2485e01402b1SRalf Baechle 2486df0ac8a4SKevin Cernekeeconfig XKS01 2487df0ac8a4SKevin Cernekee bool 2488df0ac8a4SKevin Cernekee 24898256b17eSFlorian Fainelliconfig CPU_HAS_RIXI 24908256b17eSFlorian Fainelli bool 24918256b17eSFlorian Fainelli 2492f41ae0b2SRalf Baechle# 2493f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2494f41ae0b2SRalf Baechle# 2495e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2496f41ae0b2SRalf Baechle bool 2497e01402b1SRalf Baechle 2498f41ae0b2SRalf Baechle# 2499f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2500f41ae0b2SRalf Baechle# 2501e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2502f41ae0b2SRalf Baechle bool 2503e01402b1SRalf Baechle 25041da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 25051da177e4SLinus Torvalds bool 25061da177e4SLinus Torvalds depends on !CPU_R3000 25071da177e4SLinus Torvalds default y 25081da177e4SLinus Torvalds 25091da177e4SLinus Torvalds# 251020d60d99SMaciej W. Rozycki# CPU non-features 251120d60d99SMaciej W. Rozycki# 251220d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 251320d60d99SMaciej W. Rozycki bool 251420d60d99SMaciej W. Rozycki 251520d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 251620d60d99SMaciej W. Rozycki bool 251720d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 251820d60d99SMaciej W. Rozycki 251920d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 252020d60d99SMaciej W. Rozycki bool 252120d60d99SMaciej W. Rozycki 25224edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT 25234edf00a4SPaul Burton int 25244edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 25254edf00a4SPaul Burton default 4 if CPU_R8000 25264edf00a4SPaul Burton default 0 25274edf00a4SPaul Burton 25284edf00a4SPaul Burtonconfig MIPS_ASID_BITS 25294edf00a4SPaul Burton int 25302db003a5SPaul Burton default 0 if MIPS_ASID_BITS_VARIABLE 25314edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 25324edf00a4SPaul Burton default 8 25334edf00a4SPaul Burton 25342db003a5SPaul Burtonconfig MIPS_ASID_BITS_VARIABLE 25352db003a5SPaul Burton bool 25362db003a5SPaul Burton 253720d60d99SMaciej W. Rozycki# 25381da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 25391da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 25401da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 25411da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 25421da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 25431da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 25441da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 25451da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2546797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2547797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2548797798c1SRalf Baechle# support. 25491da177e4SLinus Torvalds# 25501da177e4SLinus Torvaldsconfig HIGHMEM 25511da177e4SLinus Torvalds bool "High Memory Support" 2552a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2553797798c1SRalf Baechle 2554797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2555797798c1SRalf Baechle bool 2556797798c1SRalf Baechle 2557797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2558797798c1SRalf Baechle bool 25591da177e4SLinus Torvalds 25609693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 25619693a853SFranck Bui-Huu bool 25629693a853SFranck Bui-Huu 2563a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2564a6a4834cSSteven J. Hill bool 2565a6a4834cSSteven J. Hill 2566377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2567377cb1b6SRalf Baechle bool 2568377cb1b6SRalf Baechle help 2569377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2570377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2571377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2572377cb1b6SRalf Baechle 2573a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2574a5e9a69eSPaul Burton bool 2575a5e9a69eSPaul Burton 2576b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2577b4819b59SYoichi Yuasa def_bool y 2578f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2579b4819b59SYoichi Yuasa 2580d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2581d8cb4e11SRalf Baechle bool 2582d8cb4e11SRalf Baechle default y if SGI_IP27 2583d8cb4e11SRalf Baechle help 25843dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2585d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2586d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2587d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2588d8cb4e11SRalf Baechle 2589b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2590b1c6cd42SAtsushi Nemoto bool 25917de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 259231473747SAtsushi Nemoto 2593d8cb4e11SRalf Baechleconfig NUMA 2594d8cb4e11SRalf Baechle bool "NUMA Support" 2595d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2596d8cb4e11SRalf Baechle help 2597d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2598d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2599d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2600d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2601d8cb4e11SRalf Baechle disabled. 2602d8cb4e11SRalf Baechle 2603d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2604d8cb4e11SRalf Baechle bool 2605d8cb4e11SRalf Baechle 26068c530ea3SMatt Redfearnconfig RELOCATABLE 26078c530ea3SMatt Redfearn bool "Relocatable kernel" 26088c530ea3SMatt Redfearn depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6) 26098c530ea3SMatt Redfearn help 26108c530ea3SMatt Redfearn This builds a kernel image that retains relocation information 26118c530ea3SMatt Redfearn so it can be loaded someplace besides the default 1MB. 26128c530ea3SMatt Redfearn The relocations make the kernel binary about 15% larger, 26138c530ea3SMatt Redfearn but are discarded at runtime 26148c530ea3SMatt Redfearn 2615069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE 2616069fd766SMatt Redfearn hex "Relocation table size" 2617069fd766SMatt Redfearn depends on RELOCATABLE 2618069fd766SMatt Redfearn range 0x0 0x01000000 2619069fd766SMatt Redfearn default "0x00100000" 2620069fd766SMatt Redfearn ---help--- 2621069fd766SMatt Redfearn A table of relocation data will be appended to the kernel binary 2622069fd766SMatt Redfearn and parsed at boot to fix up the relocated kernel. 2623069fd766SMatt Redfearn 2624069fd766SMatt Redfearn This option allows the amount of space reserved for the table to be 2625069fd766SMatt Redfearn adjusted, although the default of 1Mb should be ok in most cases. 2626069fd766SMatt Redfearn 2627069fd766SMatt Redfearn The build will fail and a valid size suggested if this is too small. 2628069fd766SMatt Redfearn 2629069fd766SMatt Redfearn If unsure, leave at the default value. 2630069fd766SMatt Redfearn 2631405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE 2632405bc8fdSMatt Redfearn bool "Randomize the address of the kernel image" 2633405bc8fdSMatt Redfearn depends on RELOCATABLE 2634405bc8fdSMatt Redfearn ---help--- 2635405bc8fdSMatt Redfearn Randomizes the physical and virtual address at which the 2636405bc8fdSMatt Redfearn kernel image is loaded, as a security feature that 2637405bc8fdSMatt Redfearn deters exploit attempts relying on knowledge of the location 2638405bc8fdSMatt Redfearn of kernel internals. 2639405bc8fdSMatt Redfearn 2640405bc8fdSMatt Redfearn Entropy is generated using any coprocessor 0 registers available. 2641405bc8fdSMatt Redfearn 2642405bc8fdSMatt Redfearn The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 2643405bc8fdSMatt Redfearn 2644405bc8fdSMatt Redfearn If unsure, say N. 2645405bc8fdSMatt Redfearn 2646405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET 2647405bc8fdSMatt Redfearn hex "Maximum kASLR offset" if EXPERT 2648405bc8fdSMatt Redfearn depends on RANDOMIZE_BASE 2649405bc8fdSMatt Redfearn range 0x0 0x40000000 if EVA || 64BIT 2650405bc8fdSMatt Redfearn range 0x0 0x08000000 2651405bc8fdSMatt Redfearn default "0x01000000" 2652405bc8fdSMatt Redfearn ---help--- 2653405bc8fdSMatt Redfearn When kASLR is active, this provides the maximum offset that will 2654405bc8fdSMatt Redfearn be applied to the kernel image. It should be set according to the 2655405bc8fdSMatt Redfearn amount of physical RAM available in the target system minus 2656405bc8fdSMatt Redfearn PHYSICAL_START and must be a power of 2. 2657405bc8fdSMatt Redfearn 2658405bc8fdSMatt Redfearn This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with 2659405bc8fdSMatt Redfearn EVA or 64-bit. The default is 16Mb. 2660405bc8fdSMatt Redfearn 2661c80d79d7SYasunori Gotoconfig NODES_SHIFT 2662c80d79d7SYasunori Goto int 2663c80d79d7SYasunori Goto default "6" 2664c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2665c80d79d7SYasunori Goto 266614f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 266714f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 266823021b2bSYang Shi depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) 266914f70012SDeng-Cheng Zhu default y 267014f70012SDeng-Cheng Zhu help 267114f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 267214f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 267314f70012SDeng-Cheng Zhu 2674b4819b59SYoichi Yuasasource "mm/Kconfig" 2675b4819b59SYoichi Yuasa 26761da177e4SLinus Torvaldsconfig SMP 26771da177e4SLinus Torvalds bool "Multi-Processing support" 2678e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2679e73ea273SRalf Baechle help 26801da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 26814a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 26824a474157SRobert Graffham than one CPU, say Y. 26831da177e4SLinus Torvalds 26844a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 26851da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 26861da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 26874a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 26881da177e4SLinus Torvalds will run faster if you say N here. 26891da177e4SLinus Torvalds 26901da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 26911da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 26921da177e4SLinus Torvalds 269303502faaSAdrian Bunk See also the SMP-HOWTO available at 269403502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 26951da177e4SLinus Torvalds 26961da177e4SLinus Torvalds If you don't know what to do here, say N. 26971da177e4SLinus Torvalds 26987840d618SMatt Redfearnconfig HOTPLUG_CPU 26997840d618SMatt Redfearn bool "Support for hot-pluggable CPUs" 27007840d618SMatt Redfearn depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 27017840d618SMatt Redfearn help 27027840d618SMatt Redfearn Say Y here to allow turning CPUs off and on. CPUs can be 27037840d618SMatt Redfearn controlled through /sys/devices/system/cpu. 27047840d618SMatt Redfearn (Note: power management support will enable this option 27057840d618SMatt Redfearn automatically on SMP systems. ) 27067840d618SMatt Redfearn Say N if you want to disable CPU hotplug. 27077840d618SMatt Redfearn 270887353d8aSRalf Baechleconfig SMP_UP 270987353d8aSRalf Baechle bool 271087353d8aSRalf Baechle 27114a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 27124a16ff4cSRalf Baechle bool 27134a16ff4cSRalf Baechle 27140ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 27150ee958e1SPaul Burton bool 27160ee958e1SPaul Burton 2717e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2718e73ea273SRalf Baechle bool 2719e73ea273SRalf Baechle 2720130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2721130e2fb7SRalf Baechle bool 2722130e2fb7SRalf Baechle 2723130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2724130e2fb7SRalf Baechle bool 2725130e2fb7SRalf Baechle 2726130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2727130e2fb7SRalf Baechle bool 2728130e2fb7SRalf Baechle 2729130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2730130e2fb7SRalf Baechle bool 2731130e2fb7SRalf Baechle 2732130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2733130e2fb7SRalf Baechle bool 2734130e2fb7SRalf Baechle 27351da177e4SLinus Torvaldsconfig NR_CPUS 2736a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2737a91796a9SJayachandran C range 2 256 27381da177e4SLinus Torvalds depends on SMP 2739130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2740130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2741130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2742130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2743130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 27441da177e4SLinus Torvalds help 27451da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 27461da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 27471da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 274872ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 274972ede9b1SAtsushi Nemoto and 2 for all others. 27501da177e4SLinus Torvalds 27511da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 275272ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 275372ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 275472ede9b1SAtsushi Nemoto power of two. 27551da177e4SLinus Torvalds 2756399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2757399aaa25SAl Cooper bool 2758399aaa25SAl Cooper 27591723b4a3SAtsushi Nemoto# 27601723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 27611723b4a3SAtsushi Nemoto# 27621723b4a3SAtsushi Nemoto 27631723b4a3SAtsushi Nemotochoice 27641723b4a3SAtsushi Nemoto prompt "Timer frequency" 27651723b4a3SAtsushi Nemoto default HZ_250 27661723b4a3SAtsushi Nemoto help 27671723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 27681723b4a3SAtsushi Nemoto 276967596573SPaul Burton config HZ_24 277067596573SPaul Burton bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ 277167596573SPaul Burton 27721723b4a3SAtsushi Nemoto config HZ_48 27730f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 27741723b4a3SAtsushi Nemoto 27751723b4a3SAtsushi Nemoto config HZ_100 27761723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 27771723b4a3SAtsushi Nemoto 27781723b4a3SAtsushi Nemoto config HZ_128 27791723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 27801723b4a3SAtsushi Nemoto 27811723b4a3SAtsushi Nemoto config HZ_250 27821723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 27831723b4a3SAtsushi Nemoto 27841723b4a3SAtsushi Nemoto config HZ_256 27851723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 27861723b4a3SAtsushi Nemoto 27871723b4a3SAtsushi Nemoto config HZ_1000 27881723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 27891723b4a3SAtsushi Nemoto 27901723b4a3SAtsushi Nemoto config HZ_1024 27911723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 27921723b4a3SAtsushi Nemoto 27931723b4a3SAtsushi Nemotoendchoice 27941723b4a3SAtsushi Nemoto 279567596573SPaul Burtonconfig SYS_SUPPORTS_24HZ 279667596573SPaul Burton bool 279767596573SPaul Burton 27981723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 27991723b4a3SAtsushi Nemoto bool 28001723b4a3SAtsushi Nemoto 28011723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 28021723b4a3SAtsushi Nemoto bool 28031723b4a3SAtsushi Nemoto 28041723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 28051723b4a3SAtsushi Nemoto bool 28061723b4a3SAtsushi Nemoto 28071723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 28081723b4a3SAtsushi Nemoto bool 28091723b4a3SAtsushi Nemoto 28101723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 28111723b4a3SAtsushi Nemoto bool 28121723b4a3SAtsushi Nemoto 28131723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 28141723b4a3SAtsushi Nemoto bool 28151723b4a3SAtsushi Nemoto 28161723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 28171723b4a3SAtsushi Nemoto bool 28181723b4a3SAtsushi Nemoto 28191723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 28201723b4a3SAtsushi Nemoto bool 282167596573SPaul Burton default y if !SYS_SUPPORTS_24HZ && \ 282267596573SPaul Burton !SYS_SUPPORTS_48HZ && \ 282367596573SPaul Burton !SYS_SUPPORTS_100HZ && \ 282467596573SPaul Burton !SYS_SUPPORTS_128HZ && \ 282567596573SPaul Burton !SYS_SUPPORTS_250HZ && \ 282667596573SPaul Burton !SYS_SUPPORTS_256HZ && \ 282767596573SPaul Burton !SYS_SUPPORTS_1000HZ && \ 28281723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 28291723b4a3SAtsushi Nemoto 28301723b4a3SAtsushi Nemotoconfig HZ 28311723b4a3SAtsushi Nemoto int 283267596573SPaul Burton default 24 if HZ_24 28331723b4a3SAtsushi Nemoto default 48 if HZ_48 28341723b4a3SAtsushi Nemoto default 100 if HZ_100 28351723b4a3SAtsushi Nemoto default 128 if HZ_128 28361723b4a3SAtsushi Nemoto default 250 if HZ_250 28371723b4a3SAtsushi Nemoto default 256 if HZ_256 28381723b4a3SAtsushi Nemoto default 1000 if HZ_1000 28391723b4a3SAtsushi Nemoto default 1024 if HZ_1024 28401723b4a3SAtsushi Nemoto 284196685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 284296685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 284396685b17SDeng-Cheng Zhu 2844e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 28451da177e4SLinus Torvalds 2846ea6e942bSAtsushi Nemotoconfig KEXEC 28477d60717eSKees Cook bool "Kexec system call" 28482965faa5SDave Young select KEXEC_CORE 2849ea6e942bSAtsushi Nemoto help 2850ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2851ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 28523dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2853ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2854ea6e942bSAtsushi Nemoto 285501dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2856ea6e942bSAtsushi Nemoto 2857ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2858ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2859bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2860bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2861bf220695SGeert Uytterhoeven made. 2862ea6e942bSAtsushi Nemoto 28637aa1c8f4SRalf Baechleconfig CRASH_DUMP 28647aa1c8f4SRalf Baechle bool "Kernel crash dumps" 28657aa1c8f4SRalf Baechle help 28667aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 28677aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 28687aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 28697aa1c8f4SRalf Baechle a specially reserved region and then later executed after 28707aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 28717aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 28727aa1c8f4SRalf Baechle PHYSICAL_START. 28737aa1c8f4SRalf Baechle 28747aa1c8f4SRalf Baechleconfig PHYSICAL_START 28757aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 28767aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 28777aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 28787aa1c8f4SRalf Baechle depends on CRASH_DUMP 28797aa1c8f4SRalf Baechle help 28807aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 28817aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 28827aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 28837aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 28847aa1c8f4SRalf Baechle passed to the panic-ed kernel). 28857aa1c8f4SRalf Baechle 2886ea6e942bSAtsushi Nemotoconfig SECCOMP 2887ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2888293c5bd1SRalf Baechle depends on PROC_FS 2889ea6e942bSAtsushi Nemoto default y 2890ea6e942bSAtsushi Nemoto help 2891ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2892ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2893ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2894ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2895ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2896ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2897ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2898ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2899ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2900ea6e942bSAtsushi Nemoto 2901ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2902ea6e942bSAtsushi Nemoto 2903597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 29040ce3417eSPaul Burton bool "Support for O32 binaries using 64-bit FP" 2905597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2906597ce172SPaul Burton help 2907597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2908597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2909597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2910597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2911597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2912597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2913597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2914597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2915597ce172SPaul Burton saying N here. 2916597ce172SPaul Burton 291706e2e882SPaul Burton Although binutils currently supports use of this flag the details 291806e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 291906e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 292006e2e882SPaul Burton behaviour before the details have been finalised, this option should 292106e2e882SPaul Burton be considered experimental and only enabled by those working upon 292206e2e882SPaul Burton said details. 292306e2e882SPaul Burton 292406e2e882SPaul Burton If unsure, say N. 2925597ce172SPaul Burton 2926f2ffa5abSDezhong Diaoconfig USE_OF 29270b3e06fdSJonas Gorski bool 2928f2ffa5abSDezhong Diao select OF 2929e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2930abd2363fSGrant Likely select IRQ_DOMAIN 2931f2ffa5abSDezhong Diao 29327fafb068SAndrew Brestickerconfig BUILTIN_DTB 29337fafb068SAndrew Bresticker bool 29347fafb068SAndrew Bresticker 29351da8f179SJonas Gorskichoice 29365b24d52cSJonas Gorski prompt "Kernel appended dtb support" if USE_OF 29371da8f179SJonas Gorski default MIPS_NO_APPENDED_DTB 29381da8f179SJonas Gorski 29391da8f179SJonas Gorski config MIPS_NO_APPENDED_DTB 29401da8f179SJonas Gorski bool "None" 29411da8f179SJonas Gorski help 29421da8f179SJonas Gorski Do not enable appended dtb support. 29431da8f179SJonas Gorski 294487db537dSAaro Koskinen config MIPS_ELF_APPENDED_DTB 294587db537dSAaro Koskinen bool "vmlinux" 294687db537dSAaro Koskinen help 294787db537dSAaro Koskinen With this option, the boot code will look for a device tree binary 294887db537dSAaro Koskinen DTB) included in the vmlinux ELF section .appended_dtb. By default 294987db537dSAaro Koskinen it is empty and the DTB can be appended using binutils command 295087db537dSAaro Koskinen objcopy: 295187db537dSAaro Koskinen 295287db537dSAaro Koskinen objcopy --update-section .appended_dtb=<filename>.dtb vmlinux 295387db537dSAaro Koskinen 295487db537dSAaro Koskinen This is meant as a backward compatiblity convenience for those 295587db537dSAaro Koskinen systems with a bootloader that can't be upgraded to accommodate 295687db537dSAaro Koskinen the documented boot protocol using a device tree. 295787db537dSAaro Koskinen 29581da8f179SJonas Gorski config MIPS_RAW_APPENDED_DTB 2959b8f54f2cSJonas Gorski bool "vmlinux.bin or vmlinuz.bin" 29601da8f179SJonas Gorski help 29611da8f179SJonas Gorski With this option, the boot code will look for a device tree binary 2962b8f54f2cSJonas Gorski DTB) appended to raw vmlinux.bin or vmlinuz.bin. 29631da8f179SJonas Gorski (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). 29641da8f179SJonas Gorski 29651da8f179SJonas Gorski This is meant as a backward compatibility convenience for those 29661da8f179SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 29671da8f179SJonas Gorski the documented boot protocol using a device tree. 29681da8f179SJonas Gorski 29691da8f179SJonas Gorski Beware that there is very little in terms of protection against 29701da8f179SJonas Gorski this option being confused by leftover garbage in memory that might 29711da8f179SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 29721da8f179SJonas Gorski to vmlinux.bin. Do not leave this option active in a production kernel 29731da8f179SJonas Gorski if you don't intend to always append a DTB. 29741da8f179SJonas Gorskiendchoice 29751da8f179SJonas Gorski 29762024972eSJonas Gorskichoice 29772024972eSJonas Gorski prompt "Kernel command line type" if !CMDLINE_OVERRIDE 29782bcef9b4SJonas Gorski default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ 29792bcef9b4SJonas Gorski !MIPS_MALTA && !MIPS_SEAD3 && \ 29802bcef9b4SJonas Gorski !CAVIUM_OCTEON_SOC 29812024972eSJonas Gorski default MIPS_CMDLINE_FROM_BOOTLOADER 29822024972eSJonas Gorski 29832024972eSJonas Gorski config MIPS_CMDLINE_FROM_DTB 29842024972eSJonas Gorski depends on USE_OF 29852024972eSJonas Gorski bool "Dtb kernel arguments if available" 29862024972eSJonas Gorski 29872024972eSJonas Gorski config MIPS_CMDLINE_DTB_EXTEND 29882024972eSJonas Gorski depends on USE_OF 29892024972eSJonas Gorski bool "Extend dtb kernel arguments with bootloader arguments" 29902024972eSJonas Gorski 29912024972eSJonas Gorski config MIPS_CMDLINE_FROM_BOOTLOADER 29922024972eSJonas Gorski bool "Bootloader kernel arguments if available" 2993ed47e153SRabin Vincent 2994ed47e153SRabin Vincent config MIPS_CMDLINE_BUILTIN_EXTEND 2995ed47e153SRabin Vincent depends on CMDLINE_BOOL 2996ed47e153SRabin Vincent bool "Extend builtin kernel arguments with bootloader arguments" 29972024972eSJonas Gorskiendchoice 29982024972eSJonas Gorski 29995e83d430SRalf Baechleendmenu 30005e83d430SRalf Baechle 30011df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 30021df0f0ffSAtsushi Nemoto bool 30031df0f0ffSAtsushi Nemoto default y 30041df0f0ffSAtsushi Nemoto 30051df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 30061df0f0ffSAtsushi Nemoto bool 30071df0f0ffSAtsushi Nemoto default y 30081df0f0ffSAtsushi Nemoto 3009e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT 3010e1e16115SAaro Koskinen bool 3011e1e16115SAaro Koskinen default y 3012e1e16115SAaro Koskinen 3013a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS 3014a728ab52SKirill A. Shutemov int 3015a728ab52SKirill A. Shutemov default 3 if 64BIT && !PAGE_SIZE_64KB 3016a728ab52SKirill A. Shutemov default 2 3017a728ab52SKirill A. Shutemov 3018b6c3539bSRalf Baechlesource "init/Kconfig" 3019b6c3539bSRalf Baechle 3020dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 3021dc52ddc0SMatt Helsley 30221da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 30231da177e4SLinus Torvalds 30245e83d430SRalf Baechleconfig HW_HAS_EISA 30255e83d430SRalf Baechle bool 30261da177e4SLinus Torvaldsconfig HW_HAS_PCI 30271da177e4SLinus Torvalds bool 30281da177e4SLinus Torvalds 30291da177e4SLinus Torvaldsconfig PCI 30301da177e4SLinus Torvalds bool "Support for PCI controller" 30311da177e4SLinus Torvalds depends on HW_HAS_PCI 3032abb4ae46SRalf Baechle select PCI_DOMAINS 30331da177e4SLinus Torvalds help 30341da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 30351da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 30361da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 30371da177e4SLinus Torvalds say Y, otherwise N. 30381da177e4SLinus Torvalds 30390e476d91SHuacai Chenconfig HT_PCI 30400e476d91SHuacai Chen bool "Support for HT-linked PCI" 30410e476d91SHuacai Chen default y 30420e476d91SHuacai Chen depends on CPU_LOONGSON3 30430e476d91SHuacai Chen select PCI 30440e476d91SHuacai Chen select PCI_DOMAINS 30450e476d91SHuacai Chen help 30460e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 30470e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 30480e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 30490e476d91SHuacai Chen 30501da177e4SLinus Torvaldsconfig PCI_DOMAINS 30511da177e4SLinus Torvalds bool 30521da177e4SLinus Torvalds 305388555b48SPaul Burtonconfig PCI_DOMAINS_GENERIC 305488555b48SPaul Burton bool 305588555b48SPaul Burton 3056c5611df9SPaul Burtonconfig PCI_DRIVERS_GENERIC 305787dd9a4dSPaul Burton select PCI_DOMAINS_GENERIC if PCI_DOMAINS 3058c5611df9SPaul Burton bool 3059c5611df9SPaul Burton 3060c5611df9SPaul Burtonconfig PCI_DRIVERS_LEGACY 3061c5611df9SPaul Burton def_bool !PCI_DRIVERS_GENERIC 3062c5611df9SPaul Burton select NO_GENERIC_PCI_IOPORT_MAP 3063c5611df9SPaul Burton 30641da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 30651da177e4SLinus Torvalds 30661da177e4SLinus Torvalds# 30671da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 30681da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 30691da177e4SLinus Torvalds# users to choose the right thing ... 30701da177e4SLinus Torvalds# 30711da177e4SLinus Torvaldsconfig ISA 30721da177e4SLinus Torvalds bool 30731da177e4SLinus Torvalds 30741da177e4SLinus Torvaldsconfig EISA 30751da177e4SLinus Torvalds bool "EISA support" 30765e83d430SRalf Baechle depends on HW_HAS_EISA 30771da177e4SLinus Torvalds select ISA 3078aa414dffSRalf Baechle select GENERIC_ISA_DMA 30791da177e4SLinus Torvalds ---help--- 30801da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 30811da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 30821da177e4SLinus Torvalds 30831da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 30841da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 30851da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 30861da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 30871da177e4SLinus Torvalds 30881da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 30891da177e4SLinus Torvalds 30901da177e4SLinus Torvalds Otherwise, say N. 30911da177e4SLinus Torvalds 30921da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 30931da177e4SLinus Torvalds 30941da177e4SLinus Torvaldsconfig TC 30951da177e4SLinus Torvalds bool "TURBOchannel support" 30961da177e4SLinus Torvalds depends on MACH_DECSTATION 30971da177e4SLinus Torvalds help 309850a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 309950a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 310050a23e6eSJustin P. Mattock at: 310150a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 310250a23e6eSJustin P. Mattock and: 310350a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 310450a23e6eSJustin P. Mattock Linux driver support status is documented at: 310550a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 31061da177e4SLinus Torvalds 31071da177e4SLinus Torvaldsconfig MMU 31081da177e4SLinus Torvalds bool 31091da177e4SLinus Torvalds default y 31101da177e4SLinus Torvalds 3111d865bea4SRalf Baechleconfig I8253 3112d865bea4SRalf Baechle bool 3113798778b8SRussell King select CLKSRC_I8253 31142d02612fSThomas Gleixner select CLKEVT_I8253 31159726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 3116d865bea4SRalf Baechle 3117e05eb3f8SRalf Baechleconfig ZONE_DMA 3118e05eb3f8SRalf Baechle bool 3119e05eb3f8SRalf Baechle 3120cce335aeSRalf Baechleconfig ZONE_DMA32 3121cce335aeSRalf Baechle bool 3122cce335aeSRalf Baechle 31231da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 31241da177e4SLinus Torvalds 3125388b78adSAlexandre Bounineconfig RAPIDIO 312656abde72SAlexandre Bounine tristate "RapidIO support" 3127388b78adSAlexandre Bounine depends on PCI 3128388b78adSAlexandre Bounine default n 3129388b78adSAlexandre Bounine help 3130388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 3131388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 3132388b78adSAlexandre Bounine 3133388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 3134388b78adSAlexandre Bounine 31351da177e4SLinus Torvaldsendmenu 31361da177e4SLinus Torvalds 31371da177e4SLinus Torvaldsmenu "Executable file formats" 31381da177e4SLinus Torvalds 31391da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 31401da177e4SLinus Torvalds 31411da177e4SLinus Torvaldsconfig TRAD_SIGNALS 31421da177e4SLinus Torvalds bool 31431da177e4SLinus Torvalds 31441da177e4SLinus Torvaldsconfig MIPS32_COMPAT 314578aaf956SRalf Baechle bool 31461da177e4SLinus Torvalds 31471da177e4SLinus Torvaldsconfig COMPAT 31481da177e4SLinus Torvalds bool 31491da177e4SLinus Torvalds 315005e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 315105e43966SAtsushi Nemoto bool 315205e43966SAtsushi Nemoto 31531da177e4SLinus Torvaldsconfig MIPS32_O32 31541da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 315578aaf956SRalf Baechle depends on 64BIT 315678aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 315778aaf956SRalf Baechle select COMPAT 315878aaf956SRalf Baechle select MIPS32_COMPAT 315978aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 31601da177e4SLinus Torvalds help 31611da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 31621da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 31631da177e4SLinus Torvalds existing binaries are in this format. 31641da177e4SLinus Torvalds 31651da177e4SLinus Torvalds If unsure, say Y. 31661da177e4SLinus Torvalds 31671da177e4SLinus Torvaldsconfig MIPS32_N32 31681da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 3169c22eacfeSRalf Baechle depends on 64BIT 317078aaf956SRalf Baechle select COMPAT 317178aaf956SRalf Baechle select MIPS32_COMPAT 317278aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 31731da177e4SLinus Torvalds help 31741da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 31751da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 31761da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 31771da177e4SLinus Torvalds cases. 31781da177e4SLinus Torvalds 31791da177e4SLinus Torvalds If unsure, say N. 31801da177e4SLinus Torvalds 31811da177e4SLinus Torvaldsconfig BINFMT_ELF32 31821da177e4SLinus Torvalds bool 31831da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 3184f43edca7SRalf Baechle select ELFCORE 31851da177e4SLinus Torvalds 31862116245eSRalf Baechleendmenu 31871da177e4SLinus Torvalds 31882116245eSRalf Baechlemenu "Power management options" 3189952fa954SRodolfo Giometti 3190363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 3191363c55caSWu Zhangjin def_bool y 31923f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3193363c55caSWu Zhangjin 3194f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 3195f4cb5700SJohannes Berg def_bool y 31963f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3197f4cb5700SJohannes Berg 31982116245eSRalf Baechlesource "kernel/power/Kconfig" 3199952fa954SRodolfo Giometti 32001da177e4SLinus Torvaldsendmenu 32011da177e4SLinus Torvalds 32027a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 32037a998935SViresh Kumar bool 32047a998935SViresh Kumar 32057a998935SViresh Kumarmenu "CPU Power Management" 3206c095ebafSPaul Burton 3207c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 32087a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 32097a998935SViresh Kumarendif 32109726b43aSWu Zhangjin 3211c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 3212c095ebafSPaul Burton 3213c095ebafSPaul Burtonendmenu 3214c095ebafSPaul Burton 3215d5950b43SSam Ravnborgsource "net/Kconfig" 3216d5950b43SSam Ravnborg 32171da177e4SLinus Torvaldssource "drivers/Kconfig" 32181da177e4SLinus Torvalds 321998cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 322098cdee0eSRalf Baechle 32211da177e4SLinus Torvaldssource "fs/Kconfig" 32221da177e4SLinus Torvalds 32231da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 32241da177e4SLinus Torvalds 32251da177e4SLinus Torvaldssource "security/Kconfig" 32261da177e4SLinus Torvalds 32271da177e4SLinus Torvaldssource "crypto/Kconfig" 32281da177e4SLinus Torvalds 32291da177e4SLinus Torvaldssource "lib/Kconfig" 32302235a54dSSanjay Lal 32312235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 3232