xref: /linux/arch/mips/Kconfig (revision ecafe3e9b27644b51282b539878b7671ea28ac34)
11da177e4SLinus Torvaldsconfig MIPS
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
440e084a5SRalf Baechle	select ARCH_SUPPORTS_UPROBES
5a862a426SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
6393c1262SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
75fac4f7aSPaul Burton	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
81ee3630aSRalf Baechle	select ARCH_USE_BUILTIN_BSWAP
9c3fc5cd5SRalf Baechle	select HAVE_CONTEXT_TRACKING
10f8ac0425SYoichi Yuasa	select HAVE_GENERIC_DMA_COHERENT
11ec7748b5SSam Ravnborg	select HAVE_IDE
1242d4b839SMathieu Desnoyers	select HAVE_OPROFILE
137f788d2dSDeng-Cheng Zhu	select HAVE_PERF_EVENTS
147f788d2dSDeng-Cheng Zhu	select PERF_USE_VMALLOC
1588547001SJason Wessel	select HAVE_ARCH_KGDB
16490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
17c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
183f5fdb4bSMarkos Chandras	select HAVE_BPF_JIT if !CPU_MICROMIPS
19d2bb0762SWu Zhangjin	select HAVE_FUNCTION_TRACER
20538f1952SWu Zhangjin	select HAVE_DYNAMIC_FTRACE
21538f1952SWu Zhangjin	select HAVE_FTRACE_MCOUNT_RECORD
2264575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
2329c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
24c1bf207dSDavid Daney	select HAVE_KPROBES
25c1bf207dSDavid Daney	select HAVE_KRETPROBES
26fb59e394SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
27b69ec42bSCatalin Marinas	select HAVE_DEBUG_KMEMLEAK
281d7bf993SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
292b68f6caSKees Cook	select ARCH_HAS_ELF_RANDOMIZE
30383c97b4SBen Hutchings	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
3130ad29bbSHuacai Chen	select RTC_LIB if !MACH_LOONGSON64
322b78920dSDeng-Cheng Zhu	select GENERIC_ATOMIC64 if !64BIT
337463449bSCatalin Marinas	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
3448e1fd5aSDavid Daney	select HAVE_DMA_ATTRS
35f4649382SZubair Lutfullah Kakakhel	select HAVE_DMA_CONTIGUOUS
3648e1fd5aSDavid Daney	select HAVE_DMA_API_DEBUG
373bd27e32SDavid Daney	select GENERIC_IRQ_PROBE
38f8396c17SThomas Gleixner	select GENERIC_IRQ_SHOW
3978857614SMarkos Chandras	select GENERIC_PCI_IOMAP
4094bb0c1aSDavid Daney	select HAVE_ARCH_JUMP_LABEL
41c1d7e01dSWill Deacon	select ARCH_WANT_IPC_PARSE_VERSION
420f462e3cSThomas Gleixner	select IRQ_FORCED_THREADING
439d15ffc8STejun Heo	select HAVE_MEMBLOCK
449d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
459d15ffc8STejun Heo	select ARCH_DISCARD_MEMBLOCK
46360014a3SThomas Gleixner	select GENERIC_SMP_IDLE_THREAD
474b054495SDavid Daney	select BUILDTIME_EXTABLE_SORT
48cde1794bSAnna-Maria Gleixner	select GENERIC_CLOCKEVENTS
49929de4ccSDeng-Cheng Zhu	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
50cde1794bSAnna-Maria Gleixner	select GENERIC_CMOS_UPDATE
51786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
524febd95aSStephen Rothwell	select VIRT_TO_BUS
532f12fb20SJoshua Kinard	select MODULES_USE_ELF_REL if MODULES
542f12fb20SJoshua Kinard	select MODULES_USE_ELF_RELA if MODULES && 64BIT
5550150d2bSAl Viro	select CLONE_BACKWARDS
56d1a1dc0bSDave Hansen	select HAVE_DEBUG_STACKOVERFLOW
5719952a92SKees Cook	select HAVE_CC_STACKPROTECTOR
58b1d4c6caSJames Hogan	select CPU_PM if CPU_IDLE
59cc7964afSPaul Burton	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
6090cee759SPaul Burton	select ARCH_BINFMT_ELF_STATE
61d79d853dSMarkos Chandras	select SYSCTL_EXCEPTION_TRACE
62bb877e96SDeng-Cheng Zhu	select HAVE_VIRT_CPU_ACCOUNTING_GEN
63ec9ddad3SDeng-Cheng Zhu	select HAVE_IRQ_TIME_ACCOUNTING
641da177e4SLinus Torvalds
651da177e4SLinus Torvaldsmenu "Machine selection"
661da177e4SLinus Torvalds
675e83d430SRalf Baechlechoice
685e83d430SRalf Baechle	prompt "System type"
695e83d430SRalf Baechle	default SGI_IP22
701da177e4SLinus Torvalds
7142a4f17dSManuel Laussconfig MIPS_ALCHEMY
72c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
7334adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
74f772cdb2SRalf Baechle	select CEVT_R4K
75d7ea335cSSteven J. Hill	select CSRC_R4K
7667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7788e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
7842a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
7942a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
8042a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
81efb12436SAlexandre Courbot	select ARCH_REQUIRE_GPIOLIB
821b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
8347440229SManuel Lauss	select COMMON_CLK
841da177e4SLinus Torvalds
857ca5dc14SFlorian Fainelliconfig AR7
867ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
877ca5dc14SFlorian Fainelli	select BOOT_ELF32
887ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
897ca5dc14SFlorian Fainelli	select CEVT_R4K
907ca5dc14SFlorian Fainelli	select CSRC_R4K
9167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
927ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
937ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
947ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
957ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
967ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
977ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
98377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
991b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
1005f3c9098SFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
1017ca5dc14SFlorian Fainelli	select VLYNQ
1028551fb64SYoichi Yuasa	select HAVE_CLK
1037ca5dc14SFlorian Fainelli	help
1047ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
1057ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
1067ca5dc14SFlorian Fainelli
10743cc739fSSergey Ryazanovconfig ATH25
10843cc739fSSergey Ryazanov	bool "Atheros AR231x/AR531x SoC support"
10943cc739fSSergey Ryazanov	select CEVT_R4K
11043cc739fSSergey Ryazanov	select CSRC_R4K
11143cc739fSSergey Ryazanov	select DMA_NONCOHERENT
11267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1131753e74eSSergey Ryazanov	select IRQ_DOMAIN
11443cc739fSSergey Ryazanov	select SYS_HAS_CPU_MIPS32_R1
11543cc739fSSergey Ryazanov	select SYS_SUPPORTS_BIG_ENDIAN
11643cc739fSSergey Ryazanov	select SYS_SUPPORTS_32BIT_KERNEL
1178aaa7278SSergey Ryazanov	select SYS_HAS_EARLY_PRINTK
11843cc739fSSergey Ryazanov	help
11943cc739fSSergey Ryazanov	  Support for Atheros AR231x and Atheros AR531x based boards
12043cc739fSSergey Ryazanov
121d4a67d9dSGabor Juhosconfig ATH79
122d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
123ff591a91SAlban Bedel	select ARCH_HAS_RESET_CONTROLLER
1246eae43c5SGabor Juhos	select ARCH_REQUIRE_GPIOLIB
125d4a67d9dSGabor Juhos	select BOOT_RAW
126d4a67d9dSGabor Juhos	select CEVT_R4K
127d4a67d9dSGabor Juhos	select CSRC_R4K
128d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
12994638067SGabor Juhos	select HAVE_CLK
130411520afSAlban Bedel	select COMMON_CLK
1312c4f1ac5SGabor Juhos	select CLKDEV_LOOKUP
13267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1330aabf1a4SGabor Juhos	select MIPS_MACHINE
134d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
135d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
136d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
137d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
138377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
139da628e8bSAlban Bedel	select SYS_SUPPORTS_ZBOOT
14003c8c407SAlban Bedel	select USE_OF
141d4a67d9dSGabor Juhos	help
142d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
143d4a67d9dSGabor Juhos
1445f2d4459SKevin Cernekeeconfig BMIPS_GENERIC
1455f2d4459SKevin Cernekee	bool "Broadcom Generic BMIPS kernel"
146d666cd02SKevin Cernekee	select BOOT_RAW
147d666cd02SKevin Cernekee	select NO_EXCEPT_FILL
148d666cd02SKevin Cernekee	select USE_OF
149d666cd02SKevin Cernekee	select CEVT_R4K
150d666cd02SKevin Cernekee	select CSRC_R4K
151d666cd02SKevin Cernekee	select SYNC_R4K
152d666cd02SKevin Cernekee	select COMMON_CLK
15360b858f2SKevin Cernekee	select BCM7038_L1_IRQ
15460b858f2SKevin Cernekee	select BCM7120_L2_IRQ
15560b858f2SKevin Cernekee	select BRCMSTB_L2_IRQ
15667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
15760b858f2SKevin Cernekee	select DMA_NONCOHERENT
158d666cd02SKevin Cernekee	select SYS_SUPPORTS_32BIT_KERNEL
15960b858f2SKevin Cernekee	select SYS_SUPPORTS_LITTLE_ENDIAN
160d666cd02SKevin Cernekee	select SYS_SUPPORTS_BIG_ENDIAN
161d666cd02SKevin Cernekee	select SYS_SUPPORTS_HIGHMEM
16260b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS32_3300
16360b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4350
16460b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4380
165d666cd02SKevin Cernekee	select SYS_HAS_CPU_BMIPS5000
166d666cd02SKevin Cernekee	select SWAP_IO_SPACE
16760b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
16860b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
16960b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
17060b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
171d666cd02SKevin Cernekee	help
1725f2d4459SKevin Cernekee	  Build a generic DT-based kernel image that boots on select
1735f2d4459SKevin Cernekee	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
1745f2d4459SKevin Cernekee	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
1755f2d4459SKevin Cernekee	  must be set appropriately for your board.
176d666cd02SKevin Cernekee
1771c0c13ebSAurelien Jarnoconfig BCM47XX
178c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
1792da4c74dSHauke Mehrtens	select ARCH_WANT_OPTIONAL_GPIOLIB
180fe08f8c2SHauke Mehrtens	select BOOT_RAW
18142f77542SRalf Baechle	select CEVT_R4K
182940f6b48SRalf Baechle	select CSRC_R4K
1831c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
1841c0c13ebSAurelien Jarno	select HW_HAS_PCI
18567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
186314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
187dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
1881c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
1891c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
190377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
19125e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
192e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
193c949c0bcSRafał Miłecki	select GPIOLIB
194c949c0bcSRafał Miłecki	select LEDS_GPIO_REGISTER
195f6e734a8SRafał Miłecki	select BCM47XX_NVRAM
1961c0c13ebSAurelien Jarno	help
1971c0c13ebSAurelien Jarno	 Support for BCM47XX based boards
1981c0c13ebSAurelien Jarno
199e7300d04SMaxime Bizonconfig BCM63XX
200e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
201ae8de61cSFlorian Fainelli	select BOOT_RAW
202e7300d04SMaxime Bizon	select CEVT_R4K
203e7300d04SMaxime Bizon	select CSRC_R4K
204fc264022SJonas Gorski	select SYNC_R4K
205e7300d04SMaxime Bizon	select DMA_NONCOHERENT
20667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
207e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
208e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
209e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
210e7300d04SMaxime Bizon	select SWAP_IO_SPACE
211e7300d04SMaxime Bizon	select ARCH_REQUIRE_GPIOLIB
2123e82eeebSYoichi Yuasa	select HAVE_CLK
213af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
214e7300d04SMaxime Bizon	help
215e7300d04SMaxime Bizon	 Support for BCM63XX based boards
216e7300d04SMaxime Bizon
2171da177e4SLinus Torvaldsconfig MIPS_COBALT
2183fa986faSMartin Michlmayr	bool "Cobalt Server"
21942f77542SRalf Baechle	select CEVT_R4K
220940f6b48SRalf Baechle	select CSRC_R4K
2211097c6acSYoichi Yuasa	select CEVT_GT641XX
2221da177e4SLinus Torvalds	select DMA_NONCOHERENT
2231da177e4SLinus Torvalds	select HW_HAS_PCI
224d865bea4SRalf Baechle	select I8253
2251da177e4SLinus Torvalds	select I8259
22667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
227d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
228252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
229e25bfc92SYoichi Yuasa	select PCI
2307cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
2310a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
232ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2330e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
2345e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
235e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
2361da177e4SLinus Torvalds
2371da177e4SLinus Torvaldsconfig MACH_DECSTATION
2383fa986faSMartin Michlmayr	bool "DECstations"
2391da177e4SLinus Torvalds	select BOOT_ELF32
2406457d9fcSYoichi Yuasa	select CEVT_DS1287
24181d10badSMaciej W. Rozycki	select CEVT_R4K if CPU_R4X00
2424247417dSYoichi Yuasa	select CSRC_IOASIC
24381d10badSMaciej W. Rozycki	select CSRC_R4K if CPU_R4X00
24420d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
24520d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
24620d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
2471da177e4SLinus Torvalds	select DMA_NONCOHERENT
248ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
24967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
2507cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
2517cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
252ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2537d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2545e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
2551723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
2561723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
2571723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
258930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
2595e83d430SRalf Baechle	help
2601da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
2611da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
2621da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
2631da177e4SLinus Torvalds
2641da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
2651da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
2661da177e4SLinus Torvalds
2671da177e4SLinus Torvalds		DECstation 5000/50
2681da177e4SLinus Torvalds		DECstation 5000/150
2691da177e4SLinus Torvalds		DECstation 5000/260
2701da177e4SLinus Torvalds		DECsystem 5900/260
2711da177e4SLinus Torvalds
2721da177e4SLinus Torvalds	  otherwise choose R3000.
2731da177e4SLinus Torvalds
2745e83d430SRalf Baechleconfig MACH_JAZZ
2753fa986faSMartin Michlmayr	bool "Jazz family of machines"
2760e2794b0SRalf Baechle	select FW_ARC
2770e2794b0SRalf Baechle	select FW_ARC32
2785e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
27942f77542SRalf Baechle	select CEVT_R4K
280940f6b48SRalf Baechle	select CSRC_R4K
281e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
2825e83d430SRalf Baechle	select GENERIC_ISA_DMA
2838a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
28467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
285d865bea4SRalf Baechle	select I8253
2865e83d430SRalf Baechle	select I8259
2875e83d430SRalf Baechle	select ISA
2887cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
2895e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
2907d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2911723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
2921da177e4SLinus Torvalds	help
2935e83d430SRalf Baechle	 This a family of machines based on the MIPS R4030 chipset which was
2945e83d430SRalf Baechle	 used by several vendors to build RISC/os and Windows NT workstations.
295692105b8SMatt LaPlante	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
2965e83d430SRalf Baechle	 Olivetti M700-10 workstations.
2975e83d430SRalf Baechle
298de361e8bSPaul Burtonconfig MACH_INGENIC
299de361e8bSPaul Burton	bool "Ingenic SoC based machines"
3005ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
3015ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
302f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
3035ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
30467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3055ebabe59SLars-Peter Clausen	select ARCH_REQUIRE_GPIOLIB
306ff1930c6SPaul Burton	select COMMON_CLK
30783bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
308ffb1843dSPaul Burton	select BUILTIN_DTB
309ffb1843dSPaul Burton	select USE_OF
3106ec127fbSPaul Burton	select LIBFDT
3115ebabe59SLars-Peter Clausen
312171bb2f1SJohn Crispinconfig LANTIQ
313171bb2f1SJohn Crispin	bool "Lantiq based platforms"
314171bb2f1SJohn Crispin	select DMA_NONCOHERENT
31567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
316171bb2f1SJohn Crispin	select CEVT_R4K
317171bb2f1SJohn Crispin	select CSRC_R4K
318171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
319171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
320171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
321171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
322377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
323171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
324171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
325171bb2f1SJohn Crispin	select ARCH_REQUIRE_GPIOLIB
326171bb2f1SJohn Crispin	select SWAP_IO_SPACE
327171bb2f1SJohn Crispin	select BOOT_RAW
328287e3f3fSJohn Crispin	select HAVE_MACH_CLKDEV
329287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
330a0392222SJohn Crispin	select USE_OF
3313f8c50c9SJohn Crispin	select PINCTRL
3323f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
333c530781cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
334c530781cSJohn Crispin	select RESET_CONTROLLER
335171bb2f1SJohn Crispin
3361f21d2bdSBrian Murphyconfig LASAT
3371f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
33842f77542SRalf Baechle	select CEVT_R4K
33916f0bbbcSRalf Baechle	select CRC32
340940f6b48SRalf Baechle	select CSRC_R4K
3411f21d2bdSBrian Murphy	select DMA_NONCOHERENT
3421f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
3431f21d2bdSBrian Murphy	select HW_HAS_PCI
34467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3451f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
3461f21d2bdSBrian Murphy	select MIPS_NILE4
3471f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
3481f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
3491f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
3501f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
3511f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
3521f21d2bdSBrian Murphy
35330ad29bbSHuacai Chenconfig MACH_LOONGSON32
35430ad29bbSHuacai Chen	bool "Loongson-1 family of machines"
355c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
356ade299d8SYoichi Yuasa	help
35730ad29bbSHuacai Chen	  This enables support for the Loongson-1 family of machines.
35885749d24SWu Zhangjin
35930ad29bbSHuacai Chen	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
36030ad29bbSHuacai Chen	  the Institute of Computing Technology (ICT), Chinese Academy of
36130ad29bbSHuacai Chen	  Sciences (CAS).
362ade299d8SYoichi Yuasa
36330ad29bbSHuacai Chenconfig MACH_LOONGSON64
36430ad29bbSHuacai Chen	bool "Loongson-2/3 family of machines"
365ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
366ca585cf9SKelvin Cheung	help
36730ad29bbSHuacai Chen	  This enables the support of Loongson-2/3 family of machines.
368ca585cf9SKelvin Cheung
36930ad29bbSHuacai Chen	  Loongson-2 is a family of single-core CPUs and Loongson-3 is a
37030ad29bbSHuacai Chen	  family of multi-core CPUs. They are both 64-bit general-purpose
37130ad29bbSHuacai Chen	  MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
37230ad29bbSHuacai Chen	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
37330ad29bbSHuacai Chen	  in the People's Republic of China. The chief architect is Professor
37430ad29bbSHuacai Chen	  Weiwu Hu.
375ca585cf9SKelvin Cheung
3766a438309SAndrew Brestickerconfig MACH_PISTACHIO
3776a438309SAndrew Bresticker	bool "IMG Pistachio SoC based boards"
3786a438309SAndrew Bresticker	select ARCH_REQUIRE_GPIOLIB
3796a438309SAndrew Bresticker	select BOOT_ELF32
3806a438309SAndrew Bresticker	select BOOT_RAW
3816a438309SAndrew Bresticker	select CEVT_R4K
3826a438309SAndrew Bresticker	select CLKSRC_MIPS_GIC
3836a438309SAndrew Bresticker	select COMMON_CLK
3846a438309SAndrew Bresticker	select CSRC_R4K
3856a438309SAndrew Bresticker	select DMA_MAYBE_COHERENT
38667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3876a438309SAndrew Bresticker	select LIBFDT
3886a438309SAndrew Bresticker	select MFD_SYSCON
3896a438309SAndrew Bresticker	select MIPS_CPU_SCACHE
3906a438309SAndrew Bresticker	select MIPS_GIC
3916a438309SAndrew Bresticker	select PINCTRL
3926a438309SAndrew Bresticker	select REGULATOR
3936a438309SAndrew Bresticker	select SYS_HAS_CPU_MIPS32_R2
3946a438309SAndrew Bresticker	select SYS_SUPPORTS_32BIT_KERNEL
3956a438309SAndrew Bresticker	select SYS_SUPPORTS_LITTLE_ENDIAN
3966a438309SAndrew Bresticker	select SYS_SUPPORTS_MIPS_CPS
3976a438309SAndrew Bresticker	select SYS_SUPPORTS_MULTITHREADING
3986a438309SAndrew Bresticker	select SYS_SUPPORTS_ZBOOT
399018f62eeSEzequiel Garcia	select SYS_HAS_EARLY_PRINTK
400018f62eeSEzequiel Garcia	select USE_GENERIC_EARLY_PRINTK_8250
4016a438309SAndrew Bresticker	select USE_OF
4026a438309SAndrew Bresticker	help
4036a438309SAndrew Bresticker	  This enables support for the IMG Pistachio SoC platform.
4046a438309SAndrew Bresticker
4051da177e4SLinus Torvaldsconfig MIPS_MALTA
4063fa986faSMartin Michlmayr	bool "MIPS Malta board"
40761ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
4081da177e4SLinus Torvalds	select BOOT_ELF32
409fa71c960SRalf Baechle	select BOOT_RAW
410e8823d26SPaul Burton	select BUILTIN_DTB
41142f77542SRalf Baechle	select CEVT_R4K
412940f6b48SRalf Baechle	select CSRC_R4K
413fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
41442b002abSGuenter Roeck	select COMMON_CLK
415885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
4161da177e4SLinus Torvalds	select GENERIC_ISA_DMA
4178a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
41867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4198a19b8f1SAndrew Bresticker	select MIPS_GIC
4201da177e4SLinus Torvalds	select HW_HAS_PCI
421d865bea4SRalf Baechle	select I8253
4221da177e4SLinus Torvalds	select I8259
4235e83d430SRalf Baechle	select MIPS_BONITO64
4249318c51aSChris Dearman	select MIPS_CPU_SCACHE
425a7ef1eadSKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
426252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
4275e83d430SRalf Baechle	select MIPS_MSC
428*ecafe3e9SPaul Burton	select SMP_UP if SMP
4291da177e4SLinus Torvalds	select SWAP_IO_SPACE
4307cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
4317cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
432bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
433c5b36783SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R5
434575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R6
4357cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
4365d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
437575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS64_R6
4387cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
4397cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
440ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
441ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
4425e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
443c5b36783SSteven J. Hill	select SYS_SUPPORTS_HIGHMEM
4445e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
445424ebcdfSMaciej W. Rozycki	select SYS_SUPPORTS_MICROMIPS
4460365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
447e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
448377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
449f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
4509693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
4511b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
452e8823d26SPaul Burton	select USE_OF
453abcc82b1SJames Hogan	select ZONE_DMA32 if 64BIT
454e81a8c7dSPaul Burton	select BUILTIN_DTB
455e81a8c7dSPaul Burton	select LIBFDT
4561da177e4SLinus Torvalds	help
457f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
4581da177e4SLinus Torvalds	  board.
4591da177e4SLinus Torvalds
460ec47b274SSteven J. Hillconfig MIPS_SEAD3
461ec47b274SSteven J. Hill	bool "MIPS SEAD3 board"
462ec47b274SSteven J. Hill	select BOOT_ELF32
463ec47b274SSteven J. Hill	select BOOT_RAW
464f262b5f2SAndrew Bresticker	select BUILTIN_DTB
465ec47b274SSteven J. Hill	select CEVT_R4K
466ec47b274SSteven J. Hill	select CSRC_R4K
467fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
46842b002abSGuenter Roeck	select COMMON_CLK
469ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_VI
470ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_EI
471ec47b274SSteven J. Hill	select DMA_NONCOHERENT
47267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4738a19b8f1SAndrew Bresticker	select MIPS_GIC
47444327236SQais Yousef	select LIBFDT
475ec47b274SSteven J. Hill	select MIPS_MSC
476ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R1
477ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R2
478ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS64_R1
479ec47b274SSteven J. Hill	select SYS_HAS_EARLY_PRINTK
480ec47b274SSteven J. Hill	select SYS_SUPPORTS_32BIT_KERNEL
481ec47b274SSteven J. Hill	select SYS_SUPPORTS_64BIT_KERNEL
482ec47b274SSteven J. Hill	select SYS_SUPPORTS_BIG_ENDIAN
483ec47b274SSteven J. Hill	select SYS_SUPPORTS_LITTLE_ENDIAN
484ec47b274SSteven J. Hill	select SYS_SUPPORTS_SMARTMIPS
485a6a4834cSSteven J. Hill	select SYS_SUPPORTS_MICROMIPS
486377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
487ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_DESC
488ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_MMIO
4899b731009SSteven J. Hill	select USE_OF
490ec47b274SSteven J. Hill	help
491ec47b274SSteven J. Hill	  This enables support for the MIPS Technologies SEAD3 evaluation
492ec47b274SSteven J. Hill	  board.
493ec47b274SSteven J. Hill
494a83860c2SRalf Baechleconfig NEC_MARKEINS
495a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
496a83860c2SRalf Baechle	select SOC_EMMA2RH
497a83860c2SRalf Baechle	select HW_HAS_PCI
498a83860c2SRalf Baechle	help
499a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
500ade299d8SYoichi Yuasa
5015e83d430SRalf Baechleconfig MACH_VR41XX
50274142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
50342f77542SRalf Baechle	select CEVT_R4K
504940f6b48SRalf Baechle	select CSRC_R4K
5057cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
506377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
50727fdd325SYoichi Yuasa	select ARCH_REQUIRE_GPIOLIB
5085e83d430SRalf Baechle
509edb6310aSDaniel Lairdconfig NXP_STB220
510edb6310aSDaniel Laird	bool "NXP STB220 board"
511edb6310aSDaniel Laird	select SOC_PNX833X
512edb6310aSDaniel Laird	help
513edb6310aSDaniel Laird	 Support for NXP Semiconductors STB220 Development Board.
514edb6310aSDaniel Laird
515edb6310aSDaniel Lairdconfig NXP_STB225
516edb6310aSDaniel Laird	bool "NXP 225 board"
517edb6310aSDaniel Laird	select SOC_PNX833X
518edb6310aSDaniel Laird	select SOC_PNX8335
519edb6310aSDaniel Laird	help
520edb6310aSDaniel Laird	 Support for NXP Semiconductors STB225 Development Board.
521edb6310aSDaniel Laird
5229267a30dSMarc St-Jeanconfig PMC_MSP
5239267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
52439d30c13SAnoop P A	select CEVT_R4K
52539d30c13SAnoop P A	select CSRC_R4K
5269267a30dSMarc St-Jean	select DMA_NONCOHERENT
5279267a30dSMarc St-Jean	select SWAP_IO_SPACE
5289267a30dSMarc St-Jean	select NO_EXCEPT_FILL
5299267a30dSMarc St-Jean	select BOOT_RAW
5309267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
5319267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
5329267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
5339267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
534377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
53567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5369267a30dSMarc St-Jean	select SERIAL_8250
5379267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
5389296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
5399296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
5409267a30dSMarc St-Jean	help
5419267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
5429267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
5439267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
5449267a30dSMarc St-Jean	  a variety of MIPS cores.
5459267a30dSMarc St-Jean
546ae2b5bb6SJohn Crispinconfig RALINK
547ae2b5bb6SJohn Crispin	bool "Ralink based machines"
548ae2b5bb6SJohn Crispin	select CEVT_R4K
549ae2b5bb6SJohn Crispin	select CSRC_R4K
550ae2b5bb6SJohn Crispin	select BOOT_RAW
551ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
55267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
553ae2b5bb6SJohn Crispin	select USE_OF
554ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
555ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
556ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
557ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
558377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
559ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
560ae2b5bb6SJohn Crispin	select HAVE_MACH_CLKDEV
561ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
5622a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
5632a153f1cSJohn Crispin	select RESET_CONTROLLER
564ae2b5bb6SJohn Crispin
5651da177e4SLinus Torvaldsconfig SGI_IP22
5663fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
5670e2794b0SRalf Baechle	select FW_ARC
5680e2794b0SRalf Baechle	select FW_ARC32
5691da177e4SLinus Torvalds	select BOOT_ELF32
57042f77542SRalf Baechle	select CEVT_R4K
571940f6b48SRalf Baechle	select CSRC_R4K
572e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
5731da177e4SLinus Torvalds	select DMA_NONCOHERENT
5745e83d430SRalf Baechle	select HW_HAS_EISA
575d865bea4SRalf Baechle	select I8253
57668de4803SThomas Bogendoerfer	select I8259
5771da177e4SLinus Torvalds	select IP22_CPU_SCACHE
57867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
579aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
580e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
581e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
58236e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
583e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
584e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
585e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
5861da177e4SLinus Torvalds	select SWAP_IO_SPACE
5877cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
5887cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
5892b5e63f6SMartin Michlmayr	#
5902b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
5912b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
5922b5e63f6SMartin Michlmayr	#
5932b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
5942b5e63f6SMartin Michlmayr	# for a more details discussion
5952b5e63f6SMartin Michlmayr	#
5962b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
597ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
598ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
5995e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
600930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6011da177e4SLinus Torvalds	help
6021da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
6031da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
6041da177e4SLinus Torvalds	  that runs on these, say Y here.
6051da177e4SLinus Torvalds
6061da177e4SLinus Torvaldsconfig SGI_IP27
6073fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
6080e2794b0SRalf Baechle	select FW_ARC
6090e2794b0SRalf Baechle	select FW_ARC64
6105e83d430SRalf Baechle	select BOOT_ELF64
611e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
612634286f1SRalf Baechle	select DMA_COHERENT
61336a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
6141da177e4SLinus Torvalds	select HW_HAS_PCI
615130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
6167cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
617ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6185e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
619d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
6201a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
621930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6221da177e4SLinus Torvalds	help
6231da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
6241da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
6251da177e4SLinus Torvalds	  here.
6261da177e4SLinus Torvalds
627e2defae5SThomas Bogendoerferconfig SGI_IP28
6287d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
6290e2794b0SRalf Baechle	select FW_ARC
6300e2794b0SRalf Baechle	select FW_ARC64
631e2defae5SThomas Bogendoerfer	select BOOT_ELF64
632e2defae5SThomas Bogendoerfer	select CEVT_R4K
633e2defae5SThomas Bogendoerfer	select CSRC_R4K
634e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
635e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
636e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
63767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
638e2defae5SThomas Bogendoerfer	select HW_HAS_EISA
639e2defae5SThomas Bogendoerfer	select I8253
640e2defae5SThomas Bogendoerfer	select I8259
641e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
642e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
6435b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
644e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
645e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
646e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
647e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
648e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
6492b5e63f6SMartin Michlmayr	#
6502b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6512b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6522b5e63f6SMartin Michlmayr	#
6532b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6542b5e63f6SMartin Michlmayr	# for a more details discussion
6552b5e63f6SMartin Michlmayr	#
6562b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
657e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
658e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
659dc24d68dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
660e2defae5SThomas Bogendoerfer      help
661e2defae5SThomas Bogendoerfer        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
662e2defae5SThomas Bogendoerfer        kernel that runs on these, say Y here.
663e2defae5SThomas Bogendoerfer
6641da177e4SLinus Torvaldsconfig SGI_IP32
665cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
6660e2794b0SRalf Baechle	select FW_ARC
6670e2794b0SRalf Baechle	select FW_ARC32
6681da177e4SLinus Torvalds	select BOOT_ELF32
66942f77542SRalf Baechle	select CEVT_R4K
670940f6b48SRalf Baechle	select CSRC_R4K
6711da177e4SLinus Torvalds	select DMA_NONCOHERENT
6721da177e4SLinus Torvalds	select HW_HAS_PCI
67367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
6741da177e4SLinus Torvalds	select R5000_CPU_SCACHE
6751da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
6767cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
6777cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
6787cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
679dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
680ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6815e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6821da177e4SLinus Torvalds	help
6831da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
6841da177e4SLinus Torvalds
685ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
686ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
6875e83d430SRalf Baechle	select BOOT_ELF32
6885e83d430SRalf Baechle	select DMA_COHERENT
6895e83d430SRalf Baechle	select SIBYTE_BCM1120
6905e83d430SRalf Baechle	select SWAP_IO_SPACE
6917cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
6925e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6935e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
6945e83d430SRalf Baechle
695ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
696ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
6975e83d430SRalf Baechle	select BOOT_ELF32
6985e83d430SRalf Baechle	select DMA_COHERENT
6995e83d430SRalf Baechle	select SIBYTE_BCM1120
7005e83d430SRalf Baechle	select SWAP_IO_SPACE
7017cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7025e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7035e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7045e83d430SRalf Baechle
7055e83d430SRalf Baechleconfig SIBYTE_CRHONE
7063fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
7075e83d430SRalf Baechle	select BOOT_ELF32
7085e83d430SRalf Baechle	select DMA_COHERENT
7095e83d430SRalf Baechle	select SIBYTE_BCM1125
7105e83d430SRalf Baechle	select SWAP_IO_SPACE
7117cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7125e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7135e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7145e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7155e83d430SRalf Baechle
716ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
717ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
718ade299d8SYoichi Yuasa	select BOOT_ELF32
719ade299d8SYoichi Yuasa	select DMA_COHERENT
720ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
721ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
722ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
723ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
724ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
725ade299d8SYoichi Yuasa
726ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
727ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
728ade299d8SYoichi Yuasa	select BOOT_ELF32
729ade299d8SYoichi Yuasa	select DMA_COHERENT
730fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
731ade299d8SYoichi Yuasa	select SIBYTE_SB1250
732ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
733ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
734ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
735ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
736ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
737cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
738ade299d8SYoichi Yuasa
739ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
740ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
741ade299d8SYoichi Yuasa	select BOOT_ELF32
742ade299d8SYoichi Yuasa	select DMA_COHERENT
743fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
744ade299d8SYoichi Yuasa	select SIBYTE_SB1250
745ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
746ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
747ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
748ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
749ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
750ade299d8SYoichi Yuasa
751ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
752ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
753ade299d8SYoichi Yuasa	select BOOT_ELF32
754ade299d8SYoichi Yuasa	select DMA_COHERENT
755ade299d8SYoichi Yuasa	select SIBYTE_SB1250
756ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
757ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
758ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
759ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
760ade299d8SYoichi Yuasa
761ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
762ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
763ade299d8SYoichi Yuasa	select BOOT_ELF32
764ade299d8SYoichi Yuasa	select DMA_COHERENT
765ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
766ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
767ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
768ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
769ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
770651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
771ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
772cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
773ade299d8SYoichi Yuasa
77414b36af4SThomas Bogendoerferconfig SNI_RM
77514b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
7760e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
7770e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
778aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
7795e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
7805e83d430SRalf Baechle	select BOOT_ELF32
78142f77542SRalf Baechle	select CEVT_R4K
782940f6b48SRalf Baechle	select CSRC_R4K
783e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
7845e83d430SRalf Baechle	select DMA_NONCOHERENT
7855e83d430SRalf Baechle	select GENERIC_ISA_DMA
7868a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
7875e83d430SRalf Baechle	select HW_HAS_EISA
7885e83d430SRalf Baechle	select HW_HAS_PCI
78967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
790d865bea4SRalf Baechle	select I8253
7915e83d430SRalf Baechle	select I8259
7925e83d430SRalf Baechle	select ISA
7934a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
7947cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
7954a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
796c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
7974a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
79836a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
799ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
8007d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
8014a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
8025e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
8035e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
8041da177e4SLinus Torvalds	help
80514b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
80614b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
8075e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
8085e83d430SRalf Baechle	  support this machine type.
8091da177e4SLinus Torvalds
810edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
811edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
8125e83d430SRalf Baechle
813edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
814edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
81523fbee9dSRalf Baechle
81673b4390fSRalf Baechleconfig MIKROTIK_RB532
81773b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
81873b4390fSRalf Baechle	select CEVT_R4K
81973b4390fSRalf Baechle	select CSRC_R4K
82073b4390fSRalf Baechle	select DMA_NONCOHERENT
82173b4390fSRalf Baechle	select HW_HAS_PCI
82267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
82373b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
82473b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
82573b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
82673b4390fSRalf Baechle	select SWAP_IO_SPACE
82773b4390fSRalf Baechle	select BOOT_RAW
828d888e25bSFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
829930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
83073b4390fSRalf Baechle	help
83173b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
83273b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
83373b4390fSRalf Baechle
8349ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
8359ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
836a86c7f72SDavid Daney	select CEVT_R4K
83734adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
838a86c7f72SDavid Daney	select DMA_COHERENT
839a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
840a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
841f65aad41SRalf Baechle	select EDAC_SUPPORT
842b01aec9bSBorislav Petkov	select EDAC_ATOMIC_SCRUB
84373569d87SDavid Daney	select SYS_SUPPORTS_LITTLE_ENDIAN
84473569d87SDavid Daney	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
845a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
8465e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
847a86c7f72SDavid Daney	select SWAP_IO_SPACE
848e8635b48SDavid Daney	select HW_HAS_PCI
849f00e001eSDavid Daney	select ZONE_DMA32
850465aaed0SDavid Daney	select HOLES_IN_ZONE
85199cab4bbSDavid Daney	select ARCH_REQUIRE_GPIOLIB
8526e511163SDavid Daney	select LIBFDT
8536e511163SDavid Daney	select USE_OF
8546e511163SDavid Daney	select ARCH_SPARSEMEM_ENABLE
8556e511163SDavid Daney	select SYS_SUPPORTS_SMP
8566e511163SDavid Daney	select NR_CPUS_DEFAULT_16
857e326479fSAndrew Bresticker	select BUILTIN_DTB
8588c1e6b14SDavid Daney	select MTD_COMPLEX_MAPPINGS
859a86c7f72SDavid Daney	help
860a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
861a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
862a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
863a86c7f72SDavid Daney	  Some of the supported boards are:
864a86c7f72SDavid Daney		EBT3000
865a86c7f72SDavid Daney		EBH3000
866a86c7f72SDavid Daney		EBH3100
867a86c7f72SDavid Daney		Thunder
868a86c7f72SDavid Daney		Kodama
869a86c7f72SDavid Daney		Hikari
870a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
871a86c7f72SDavid Daney
8727f058e85SJayachandran Cconfig NLM_XLR_BOARD
8737f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
8747f058e85SJayachandran C	select BOOT_ELF32
8757f058e85SJayachandran C	select NLM_COMMON
8767f058e85SJayachandran C	select SYS_HAS_CPU_XLR
8777f058e85SJayachandran C	select SYS_SUPPORTS_SMP
8787f058e85SJayachandran C	select HW_HAS_PCI
8797f058e85SJayachandran C	select SWAP_IO_SPACE
8807f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
8817f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
88234adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
8837f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
8847f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
8857f058e85SJayachandran C	select DMA_COHERENT
8867f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
8877f058e85SJayachandran C	select CEVT_R4K
8887f058e85SJayachandran C	select CSRC_R4K
88967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
890b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
8917f058e85SJayachandran C	select SYNC_R4K
8927f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
8938f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
8948f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
8957f058e85SJayachandran C	help
8967f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
8977f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
8987f058e85SJayachandran C
8991c773ea4SJayachandran Cconfig NLM_XLP_BOARD
9001c773ea4SJayachandran C	bool "Netlogic XLP based systems"
9011c773ea4SJayachandran C	select BOOT_ELF32
9021c773ea4SJayachandran C	select NLM_COMMON
9031c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
9041c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
9051c773ea4SJayachandran C	select HW_HAS_PCI
9061c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9071c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
90834adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
909079e3160SKamlakant Patel	select ARCH_REQUIRE_GPIOLIB
9101c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9111c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
9121c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9131c773ea4SJayachandran C	select DMA_COHERENT
9141c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
9151c773ea4SJayachandran C	select CEVT_R4K
9161c773ea4SJayachandran C	select CSRC_R4K
91767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
918b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9191c773ea4SJayachandran C	select SYNC_R4K
9201c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
9212f6528e1SJayachandran C	select USE_OF
9228f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9238f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9241c773ea4SJayachandran C	help
9251c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
9261c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
9271c773ea4SJayachandran C
9289bc463beSDavid Daneyconfig MIPS_PARAVIRT
9299bc463beSDavid Daney	bool "Para-Virtualized guest system"
9309bc463beSDavid Daney	select CEVT_R4K
9319bc463beSDavid Daney	select CSRC_R4K
9329bc463beSDavid Daney	select DMA_COHERENT
9339bc463beSDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
9349bc463beSDavid Daney	select SYS_SUPPORTS_32BIT_KERNEL
9359bc463beSDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
9369bc463beSDavid Daney	select SYS_SUPPORTS_SMP
9379bc463beSDavid Daney	select NR_CPUS_DEFAULT_4
9389bc463beSDavid Daney	select SYS_HAS_EARLY_PRINTK
9399bc463beSDavid Daney	select SYS_HAS_CPU_MIPS32_R2
9409bc463beSDavid Daney	select SYS_HAS_CPU_MIPS64_R2
9419bc463beSDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
9429bc463beSDavid Daney	select HW_HAS_PCI
9439bc463beSDavid Daney	select SWAP_IO_SPACE
9449bc463beSDavid Daney	help
9459bc463beSDavid Daney	  This option supports guest running under ????
9469bc463beSDavid Daney
9471da177e4SLinus Torvaldsendchoice
9481da177e4SLinus Torvalds
949e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
9503b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig"
951d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
952a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
953e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
9548945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig"
9555e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
9565ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
9578ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
9581f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
959af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig"
9600f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
961ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
96229c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
96338b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
96422b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
9655e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
966a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
96730ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig"
96830ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig"
9697f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
970ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig"
97138b18f72SRalf Baechle
9725e83d430SRalf Baechleendmenu
9735e83d430SRalf Baechle
9741da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK
9751da177e4SLinus Torvalds	bool
9761da177e4SLinus Torvalds	default y
9771da177e4SLinus Torvalds
9781da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
9791da177e4SLinus Torvalds	bool
9801da177e4SLinus Torvalds
981f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32
982f0d1b0b3SDavid Howells	bool
983f0d1b0b3SDavid Howells	default n
984f0d1b0b3SDavid Howells
985f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64
986f0d1b0b3SDavid Howells	bool
987f0d1b0b3SDavid Howells	default n
988f0d1b0b3SDavid Howells
9893c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
9903c9ee7efSAkinobu Mita	bool
9913c9ee7efSAkinobu Mita	default y
9923c9ee7efSAkinobu Mita
9931da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
9941da177e4SLinus Torvalds	bool
9951da177e4SLinus Torvalds	default y
9961da177e4SLinus Torvalds
997ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
9981cc89038SAtsushi Nemoto	bool
9991cc89038SAtsushi Nemoto	default y
10001cc89038SAtsushi Nemoto
10011da177e4SLinus Torvalds#
10021da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
10031da177e4SLinus Torvalds#
10040e2794b0SRalf Baechleconfig FW_ARC
10051da177e4SLinus Torvalds	bool
10061da177e4SLinus Torvalds
100761ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
100861ed242dSRalf Baechle	bool
100961ed242dSRalf Baechle
10109267a30dSMarc St-Jeanconfig BOOT_RAW
10119267a30dSMarc St-Jean	bool
10129267a30dSMarc St-Jean
1013217dd11eSRalf Baechleconfig CEVT_BCM1480
1014217dd11eSRalf Baechle	bool
1015217dd11eSRalf Baechle
10166457d9fcSYoichi Yuasaconfig CEVT_DS1287
10176457d9fcSYoichi Yuasa	bool
10186457d9fcSYoichi Yuasa
10191097c6acSYoichi Yuasaconfig CEVT_GT641XX
10201097c6acSYoichi Yuasa	bool
10211097c6acSYoichi Yuasa
102242f77542SRalf Baechleconfig CEVT_R4K
102342f77542SRalf Baechle	bool
102442f77542SRalf Baechle
1025217dd11eSRalf Baechleconfig CEVT_SB1250
1026217dd11eSRalf Baechle	bool
1027217dd11eSRalf Baechle
1028229f773eSAtsushi Nemotoconfig CEVT_TXX9
1029229f773eSAtsushi Nemoto	bool
1030229f773eSAtsushi Nemoto
1031217dd11eSRalf Baechleconfig CSRC_BCM1480
1032217dd11eSRalf Baechle	bool
1033217dd11eSRalf Baechle
10344247417dSYoichi Yuasaconfig CSRC_IOASIC
10354247417dSYoichi Yuasa	bool
10364247417dSYoichi Yuasa
1037940f6b48SRalf Baechleconfig CSRC_R4K
1038940f6b48SRalf Baechle	bool
1039940f6b48SRalf Baechle
1040217dd11eSRalf Baechleconfig CSRC_SB1250
1041217dd11eSRalf Baechle	bool
1042217dd11eSRalf Baechle
1043a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
10447444a72eSMichael Buesch	select ARCH_REQUIRE_GPIOLIB
1045a9aec7feSAtsushi Nemoto	bool
1046a9aec7feSAtsushi Nemoto
10470e2794b0SRalf Baechleconfig FW_CFE
1048df78b5c8SAurelien Jarno	bool
1049df78b5c8SAurelien Jarno
10504bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT
105134adb28dSRalf Baechle	def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
10524bafad92SFUJITA Tomonori
105340e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES
105440e084a5SRalf Baechle	bool
105540e084a5SRalf Baechle
1056885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
1057885014bcSFelix Fietkau	select DMA_NONCOHERENT
1058885014bcSFelix Fietkau	bool
1059885014bcSFelix Fietkau
10601da177e4SLinus Torvaldsconfig DMA_COHERENT
10611da177e4SLinus Torvalds	bool
10621da177e4SLinus Torvalds
10631da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
10641da177e4SLinus Torvalds	bool
1065e1e02b32SFUJITA Tomonori	select NEED_DMA_MAP_STATE
10664ce588cdSRalf Baechle
1067e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
10684ce588cdSRalf Baechle	bool
10691da177e4SLinus Torvalds
107036a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
10711da177e4SLinus Torvalds	bool
10721da177e4SLinus Torvalds
1073dbb74540SRalf Baechleconfig HOTPLUG_CPU
10741b2bc75cSRalf Baechle	bool "Support for hot-pluggable CPUs"
107540b31360SStephen Rothwell	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
10761b2bc75cSRalf Baechle	help
10771b2bc75cSRalf Baechle	  Say Y here to allow turning CPUs off and on. CPUs can be
10781b2bc75cSRalf Baechle	  controlled through /sys/devices/system/cpu.
10791b2bc75cSRalf Baechle	  (Note: power management support will enable this option
10801b2bc75cSRalf Baechle	    automatically on SMP systems. )
10811b2bc75cSRalf Baechle	  Say N if you want to disable CPU hotplug.
10821b2bc75cSRalf Baechle
10831b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
1084dbb74540SRalf Baechle	bool
1085dbb74540SRalf Baechle
10861da177e4SLinus Torvaldsconfig MIPS_BONITO64
10871da177e4SLinus Torvalds	bool
10881da177e4SLinus Torvalds
10891da177e4SLinus Torvaldsconfig MIPS_MSC
10901da177e4SLinus Torvalds	bool
10911da177e4SLinus Torvalds
10921f21d2bdSBrian Murphyconfig MIPS_NILE4
10931f21d2bdSBrian Murphy	bool
10941f21d2bdSBrian Murphy
109539b8d525SRalf Baechleconfig SYNC_R4K
109639b8d525SRalf Baechle	bool
109739b8d525SRalf Baechle
1098487d70d0SGabor Juhosconfig MIPS_MACHINE
1099487d70d0SGabor Juhos	def_bool n
1100487d70d0SGabor Juhos
1101ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1102d388d685SMaciej W. Rozycki	def_bool n
1103d388d685SMaciej W. Rozycki
11044e0748f5SMarkos Chandrasconfig GENERIC_CSUM
11054e0748f5SMarkos Chandras	bool
11064e0748f5SMarkos Chandras
11078313da30SRalf Baechleconfig GENERIC_ISA_DMA
11088313da30SRalf Baechle	bool
11098313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1110a35bee8aSNamhyung Kim	select ISA_DMA_API
11118313da30SRalf Baechle
1112aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1113aa414dffSRalf Baechle	bool
11148313da30SRalf Baechle	select GENERIC_ISA_DMA
1115aa414dffSRalf Baechle
1116a35bee8aSNamhyung Kimconfig ISA_DMA_API
1117a35bee8aSNamhyung Kim	bool
1118a35bee8aSNamhyung Kim
1119465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1120465aaed0SDavid Daney	bool
1121465aaed0SDavid Daney
11225e83d430SRalf Baechle#
11236b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
11245e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
11255e83d430SRalf Baechle# choice statement should be more obvious to the user.
11265e83d430SRalf Baechle#
11275e83d430SRalf Baechlechoice
11286b2aac42SMasanari Iida	prompt "Endianness selection"
11291da177e4SLinus Torvalds	help
11301da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
11315e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
11323cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
11335e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
11343dde6ad8SDavid Sterba	  one or the other endianness.
11355e83d430SRalf Baechle
11365e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
11375e83d430SRalf Baechle	bool "Big endian"
11385e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
11395e83d430SRalf Baechle
11405e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
11415e83d430SRalf Baechle	bool "Little endian"
11425e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
11435e83d430SRalf Baechle
11445e83d430SRalf Baechleendchoice
11455e83d430SRalf Baechle
114622b0763aSDavid Daneyconfig EXPORT_UASM
114722b0763aSDavid Daney	bool
114822b0763aSDavid Daney
11492116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
11502116245eSRalf Baechle	bool
11512116245eSRalf Baechle
11525e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
11535e83d430SRalf Baechle	bool
11545e83d430SRalf Baechle
11555e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
11565e83d430SRalf Baechle	bool
11571da177e4SLinus Torvalds
11589cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
11599cffd154SDavid Daney	bool
11609cffd154SDavid Daney	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
11619cffd154SDavid Daney	default y
11629cffd154SDavid Daney
1163aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1164aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1165aa1762f4SDavid Daney
11661da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
11671da177e4SLinus Torvalds	bool
11681da177e4SLinus Torvalds
11699267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
11709267a30dSMarc St-Jean	bool
11719267a30dSMarc St-Jean
11729267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
11739267a30dSMarc St-Jean	bool
11749267a30dSMarc St-Jean
11758420fd00SAtsushi Nemotoconfig IRQ_TXX9
11768420fd00SAtsushi Nemoto	bool
11778420fd00SAtsushi Nemoto
1178d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1179d5ab1a69SYoichi Yuasa	bool
1180d5ab1a69SYoichi Yuasa
1181252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
11821da177e4SLinus Torvalds	bool
11831da177e4SLinus Torvalds
11849267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
11859267a30dSMarc St-Jean	bool
11869267a30dSMarc St-Jean
1187a83860c2SRalf Baechleconfig SOC_EMMA2RH
1188a83860c2SRalf Baechle	bool
1189a83860c2SRalf Baechle	select CEVT_R4K
1190a83860c2SRalf Baechle	select CSRC_R4K
1191a83860c2SRalf Baechle	select DMA_NONCOHERENT
119267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1193a83860c2SRalf Baechle	select SWAP_IO_SPACE
1194a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1195a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1196a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1197a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1198a83860c2SRalf Baechle
1199edb6310aSDaniel Lairdconfig SOC_PNX833X
1200edb6310aSDaniel Laird	bool
1201edb6310aSDaniel Laird	select CEVT_R4K
1202edb6310aSDaniel Laird	select CSRC_R4K
120367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1204edb6310aSDaniel Laird	select DMA_NONCOHERENT
1205edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1206edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1207edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1208edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1209377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1210edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1211edb6310aSDaniel Laird
1212edb6310aSDaniel Lairdconfig SOC_PNX8335
1213edb6310aSDaniel Laird	bool
1214edb6310aSDaniel Laird	select SOC_PNX833X
1215edb6310aSDaniel Laird
1216a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM
1217a7e07b1aSMarkos Chandras	bool
1218a7e07b1aSMarkos Chandras
12191da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
12201da177e4SLinus Torvalds	bool
12211da177e4SLinus Torvalds
1222e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1223e2defae5SThomas Bogendoerfer	bool
1224e2defae5SThomas Bogendoerfer
12255b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
12265b438c44SThomas Bogendoerfer	bool
12275b438c44SThomas Bogendoerfer
1228e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1229e2defae5SThomas Bogendoerfer	bool
1230e2defae5SThomas Bogendoerfer
1231e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1232e2defae5SThomas Bogendoerfer	bool
1233e2defae5SThomas Bogendoerfer
1234e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1235e2defae5SThomas Bogendoerfer	bool
1236e2defae5SThomas Bogendoerfer
1237e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1238e2defae5SThomas Bogendoerfer	bool
1239e2defae5SThomas Bogendoerfer
1240e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1241e2defae5SThomas Bogendoerfer	bool
1242e2defae5SThomas Bogendoerfer
12430e2794b0SRalf Baechleconfig FW_ARC32
12445e83d430SRalf Baechle	bool
12455e83d430SRalf Baechle
1246aaa9fad3SPaul Bolleconfig FW_SNIPROM
1247231a35d3SThomas Bogendoerfer	bool
1248231a35d3SThomas Bogendoerfer
12491da177e4SLinus Torvaldsconfig BOOT_ELF32
12501da177e4SLinus Torvalds	bool
12511da177e4SLinus Torvalds
1252930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1253930beb5aSFlorian Fainelli	bool
1254930beb5aSFlorian Fainelli
1255930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1256930beb5aSFlorian Fainelli	bool
1257930beb5aSFlorian Fainelli
1258930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1259930beb5aSFlorian Fainelli	bool
1260930beb5aSFlorian Fainelli
1261930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1262930beb5aSFlorian Fainelli	bool
1263930beb5aSFlorian Fainelli
12641da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
12651da177e4SLinus Torvalds	int
1266a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
12675432eeb6SKevin Cernekee	default "6" if MIPS_L1_CACHE_SHIFT_6
12685432eeb6SKevin Cernekee	default "5" if MIPS_L1_CACHE_SHIFT_5
12695432eeb6SKevin Cernekee	default "4" if MIPS_L1_CACHE_SHIFT_4
12701da177e4SLinus Torvalds	default "5"
12711da177e4SLinus Torvalds
12721da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
12731da177e4SLinus Torvalds	bool
12741da177e4SLinus Torvalds
12751da177e4SLinus Torvaldsconfig ARC_CONSOLE
12761da177e4SLinus Torvalds	bool "ARC console support"
1277e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
12781da177e4SLinus Torvalds
12791da177e4SLinus Torvaldsconfig ARC_MEMORY
12801da177e4SLinus Torvalds	bool
128114b36af4SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP32
12821da177e4SLinus Torvalds	default y
12831da177e4SLinus Torvalds
12841da177e4SLinus Torvaldsconfig ARC_PROMLIB
12851da177e4SLinus Torvalds	bool
1286e2defae5SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
12871da177e4SLinus Torvalds	default y
12881da177e4SLinus Torvalds
12890e2794b0SRalf Baechleconfig FW_ARC64
12901da177e4SLinus Torvalds	bool
12911da177e4SLinus Torvalds
12921da177e4SLinus Torvaldsconfig BOOT_ELF64
12931da177e4SLinus Torvalds	bool
12941da177e4SLinus Torvalds
12951da177e4SLinus Torvaldsmenu "CPU selection"
12961da177e4SLinus Torvalds
12971da177e4SLinus Torvaldschoice
12981da177e4SLinus Torvalds	prompt "CPU type"
12991da177e4SLinus Torvalds	default CPU_R4X00
13001da177e4SLinus Torvalds
13010e476d91SHuacai Chenconfig CPU_LOONGSON3
13020e476d91SHuacai Chen	bool "Loongson 3 CPU"
13030e476d91SHuacai Chen	depends on SYS_HAS_CPU_LOONGSON3
13040e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
13050e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
13060e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
13070e476d91SHuacai Chen	select WEAK_ORDERING
13080e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
1309cbfb3ea7SHuacai Chen	select ARCH_REQUIRE_GPIOLIB
13100e476d91SHuacai Chen	help
13110e476d91SHuacai Chen		The Loongson 3 processor implements the MIPS64R2 instruction
13120e476d91SHuacai Chen		set with many extensions.
13130e476d91SHuacai Chen
13143702bba5SWu Zhangjinconfig CPU_LOONGSON2E
13153702bba5SWu Zhangjin	bool "Loongson 2E"
13163702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
13173702bba5SWu Zhangjin	select CPU_LOONGSON2
13182a21c730SFuxin Zhang	help
13192a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
13202a21c730SFuxin Zhang	  with many extensions.
13212a21c730SFuxin Zhang
132225985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
13236f7a251aSWu Zhangjin	  bonito64.
13246f7a251aSWu Zhangjin
13256f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
13266f7a251aSWu Zhangjin	bool "Loongson 2F"
13276f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
13286f7a251aSWu Zhangjin	select CPU_LOONGSON2
1329c197da91SArnaud Patard	select ARCH_REQUIRE_GPIOLIB
13306f7a251aSWu Zhangjin	help
13316f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
13326f7a251aSWu Zhangjin	  with many extensions.
13336f7a251aSWu Zhangjin
13346f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
13356f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
13366f7a251aSWu Zhangjin	  Loongson2E.
13376f7a251aSWu Zhangjin
1338ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1339ca585cf9SKelvin Cheung	bool "Loongson 1B"
1340ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1341ca585cf9SKelvin Cheung	select CPU_LOONGSON1
1342ca585cf9SKelvin Cheung	help
1343ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1344ca585cf9SKelvin Cheung	  release 2 instruction set.
1345ca585cf9SKelvin Cheung
13466e760c8dSRalf Baechleconfig CPU_MIPS32_R1
13476e760c8dSRalf Baechle	bool "MIPS32 Release 1"
13487cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
13496e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1350797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1351ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13526e760c8dSRalf Baechle	help
13535e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
13541e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13551e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13561e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
13571e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13581e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
13591e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
13601e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
13611e5f1caaSRalf Baechle	  performance.
13621e5f1caaSRalf Baechle
13631e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
13641e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
13657cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
13661e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1367797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1368ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1369a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
13702235a54dSSanjay Lal	select HAVE_KVM
13711e5f1caaSRalf Baechle	help
13725e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
13736e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13746e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13756e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
13766e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13771da177e4SLinus Torvalds
13787fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6
1379674d10e2SMarkos Chandras	bool "MIPS32 Release 6"
13807fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R6
13817fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
13827fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
13837fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
13847fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
13854e0748f5SMarkos Chandras	select GENERIC_CSUM
13867fd08ca5SLeonid Yegoshin	select HAVE_KVM
13877fd08ca5SLeonid Yegoshin	select MIPS_O32_FP64_SUPPORT
13887fd08ca5SLeonid Yegoshin	help
13897fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
13907fd08ca5SLeonid Yegoshin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
13917fd08ca5SLeonid Yegoshin	  family, are based on a MIPS32r6 processor. If you own an older
13927fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
13937fd08ca5SLeonid Yegoshin
13946e760c8dSRalf Baechleconfig CPU_MIPS64_R1
13956e760c8dSRalf Baechle	bool "MIPS64 Release 1"
13967cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1397797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1398ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1399ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1400ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14019cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
14026e760c8dSRalf Baechle	help
14036e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
14046e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14056e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14066e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14076e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14081e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
14091e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
14101e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
14111e5f1caaSRalf Baechle	  performance.
14121e5f1caaSRalf Baechle
14131e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
14141e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
14157cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1416797798c1SRalf Baechle	select CPU_HAS_PREFETCH
14171e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
14181e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1419ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14209cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1421a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14221e5f1caaSRalf Baechle	help
14231e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14241e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14251e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14261e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
14271e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14281da177e4SLinus Torvalds
14297fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6
1430674d10e2SMarkos Chandras	bool "MIPS64 Release 6"
14317fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS64_R6
14327fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14337fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14347fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_64BIT_KERNEL
14357fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14367fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14374e0748f5SMarkos Chandras	select GENERIC_CSUM
14384e9d324dSPaul Burton	select MIPS_O32_FP64_SUPPORT if MIPS32_O32
14397fd08ca5SLeonid Yegoshin	help
14407fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14417fd08ca5SLeonid Yegoshin	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
14427fd08ca5SLeonid Yegoshin	  family, are based on a MIPS64r6 processor. If you own an older
14437fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
14447fd08ca5SLeonid Yegoshin
14451da177e4SLinus Torvaldsconfig CPU_R3000
14461da177e4SLinus Torvalds	bool "R3000"
14477cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1448f7062ddbSRalf Baechle	select CPU_HAS_WB
1449ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1450797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14511da177e4SLinus Torvalds	help
14521da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
14531da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
14541da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
14551da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
14561da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
14571da177e4SLinus Torvalds	  try to recompile with R3000.
14581da177e4SLinus Torvalds
14591da177e4SLinus Torvaldsconfig CPU_TX39XX
14601da177e4SLinus Torvalds	bool "R39XX"
14617cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1462ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
14631da177e4SLinus Torvalds
14641da177e4SLinus Torvaldsconfig CPU_VR41XX
14651da177e4SLinus Torvalds	bool "R41xx"
14667cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1467ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1468ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
14691da177e4SLinus Torvalds	help
14705e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
14711da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
14721da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
14731da177e4SLinus Torvalds	  processor or vice versa.
14741da177e4SLinus Torvalds
14751da177e4SLinus Torvaldsconfig CPU_R4300
14761da177e4SLinus Torvalds	bool "R4300"
14777cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4300
1478ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1479ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
14801da177e4SLinus Torvalds	help
14811da177e4SLinus Torvalds	  MIPS Technologies R4300-series processors.
14821da177e4SLinus Torvalds
14831da177e4SLinus Torvaldsconfig CPU_R4X00
14841da177e4SLinus Torvalds	bool "R4x00"
14857cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1486ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1487ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1488970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14891da177e4SLinus Torvalds	help
14901da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
14911da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
14921da177e4SLinus Torvalds
14931da177e4SLinus Torvaldsconfig CPU_TX49XX
14941da177e4SLinus Torvalds	bool "R49XX"
14957cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1496de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1497ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1498ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1499970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15001da177e4SLinus Torvalds
15011da177e4SLinus Torvaldsconfig CPU_R5000
15021da177e4SLinus Torvalds	bool "R5000"
15037cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1504ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1505ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1506970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15071da177e4SLinus Torvalds	help
15081da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
15091da177e4SLinus Torvalds
15101da177e4SLinus Torvaldsconfig CPU_R5432
15111da177e4SLinus Torvalds	bool "R5432"
15127cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5432
15135e83d430SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
15145e83d430SRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1515970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15161da177e4SLinus Torvalds
1517542c1020SShinya Kuribayashiconfig CPU_R5500
1518542c1020SShinya Kuribayashi	bool "R5500"
1519542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1520542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1521542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
15229cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1523542c1020SShinya Kuribayashi	help
1524542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1525542c1020SShinya Kuribayashi	  instruction set.
1526542c1020SShinya Kuribayashi
15271da177e4SLinus Torvaldsconfig CPU_R6000
15281da177e4SLinus Torvalds	bool "R6000"
15297cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R6000
1530ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
15311da177e4SLinus Torvalds	help
15321da177e4SLinus Torvalds	  MIPS Technologies R6000 and R6000A series processors.  Note these
1533c09b47d8SChris Dearman	  processors are extremely rare and the support for them is incomplete.
15341da177e4SLinus Torvalds
15351da177e4SLinus Torvaldsconfig CPU_NEVADA
15361da177e4SLinus Torvalds	bool "RM52xx"
15377cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1538ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1539ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1540970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15411da177e4SLinus Torvalds	help
15421da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
15431da177e4SLinus Torvalds
15441da177e4SLinus Torvaldsconfig CPU_R8000
15451da177e4SLinus Torvalds	bool "R8000"
15467cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R8000
15475e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1548ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15491da177e4SLinus Torvalds	help
15501da177e4SLinus Torvalds	  MIPS Technologies R8000 processors.  Note these processors are
15511da177e4SLinus Torvalds	  uncommon and the support for them is incomplete.
15521da177e4SLinus Torvalds
15531da177e4SLinus Torvaldsconfig CPU_R10000
15541da177e4SLinus Torvalds	bool "R10000"
15557cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
15565e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1557ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1558ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1559797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1560970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15611da177e4SLinus Torvalds	help
15621da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
15631da177e4SLinus Torvalds
15641da177e4SLinus Torvaldsconfig CPU_RM7000
15651da177e4SLinus Torvalds	bool "RM7000"
15667cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
15675e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1568ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1569ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1570797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1571970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15721da177e4SLinus Torvalds
15731da177e4SLinus Torvaldsconfig CPU_SB1
15741da177e4SLinus Torvalds	bool "SB1"
15757cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1576ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1577ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1578797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1579970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15800004a9dfSRalf Baechle	select WEAK_ORDERING
15811da177e4SLinus Torvalds
1582a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1583a86c7f72SDavid Daney	bool "Cavium Octeon processor"
15845e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1585a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1586a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1587a86c7f72SDavid Daney	select WEAK_ORDERING
1588a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
15899cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1590df115f3eSBen Hutchings	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1591df115f3eSBen Hutchings	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1592930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
1593a86c7f72SDavid Daney	help
1594a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1595a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1596a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1597a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1598a86c7f72SDavid Daney
1599cd746249SJonas Gorskiconfig CPU_BMIPS
1600cd746249SJonas Gorski	bool "Broadcom BMIPS"
1601cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1602cd746249SJonas Gorski	select CPU_MIPS32
1603fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1604cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1605cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1606cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1607cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1608cd746249SJonas Gorski	select DMA_NONCOHERENT
160967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1610cd746249SJonas Gorski	select SWAP_IO_SPACE
1611cd746249SJonas Gorski	select WEAK_ORDERING
1612c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
161369aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1614c1c0c461SKevin Cernekee	help
1615fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1616c1c0c461SKevin Cernekee
16177f058e85SJayachandran Cconfig CPU_XLR
16187f058e85SJayachandran C	bool "Netlogic XLR SoC"
16197f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
16207f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16217f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16227f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1623970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16247f058e85SJayachandran C	select WEAK_ORDERING
16257f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16267f058e85SJayachandran C	help
16277f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
16281c773ea4SJayachandran C
16291c773ea4SJayachandran Cconfig CPU_XLP
16301c773ea4SJayachandran C	bool "Netlogic XLP SoC"
16311c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
16321c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16331c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16341c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
16351c773ea4SJayachandran C	select WEAK_ORDERING
16361c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16371c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1638d6504846SJayachandran C	select CPU_MIPSR2
1639ddba6833SPrem Mallappa	select CPU_SUPPORTS_HUGEPAGES
16401c773ea4SJayachandran C	help
16411c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
16421da177e4SLinus Torvaldsendchoice
16431da177e4SLinus Torvalds
1644a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1645a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1646a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
16477fd08ca5SLeonid Yegoshin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1648a6e18781SLeonid Yegoshin	help
1649a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1650a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1651a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1652a6e18781SLeonid Yegoshin
1653a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1654a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1655a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1656a6e18781SLeonid Yegoshin	select EVA
1657a6e18781SLeonid Yegoshin	default y
1658a6e18781SLeonid Yegoshin	help
1659a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1660a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1661a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1662a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1663a6e18781SLeonid Yegoshin
1664c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES
1665c5b36783SSteven J. Hill	bool "MIPS32 Release 5 Features"
1666c5b36783SSteven J. Hill	depends on SYS_HAS_CPU_MIPS32_R5
1667c5b36783SSteven J. Hill	depends on CPU_MIPS32_R2
1668c5b36783SSteven J. Hill	help
1669c5b36783SSteven J. Hill	  Choose this option to build a kernel for release 2 or later of the
1670c5b36783SSteven J. Hill	  MIPS32 architecture including features from release 5 such as
1671c5b36783SSteven J. Hill	  support for Extended Physical Addressing (XPA).
1672c5b36783SSteven J. Hill
1673c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA
1674c5b36783SSteven J. Hill	bool "Extended Physical Addressing (XPA)"
1675c5b36783SSteven J. Hill	depends on CPU_MIPS32_R5_FEATURES
1676c5b36783SSteven J. Hill	depends on !EVA
1677c5b36783SSteven J. Hill	depends on !PAGE_SIZE_4KB
1678c5b36783SSteven J. Hill	depends on SYS_SUPPORTS_HIGHMEM
1679c5b36783SSteven J. Hill	select XPA
1680c5b36783SSteven J. Hill	select HIGHMEM
1681c5b36783SSteven J. Hill	select ARCH_PHYS_ADDR_T_64BIT
1682c5b36783SSteven J. Hill	default n
1683c5b36783SSteven J. Hill	help
1684c5b36783SSteven J. Hill	  Choose this option if you want to enable the Extended Physical
1685c5b36783SSteven J. Hill	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1686c5b36783SSteven J. Hill	  benefit is to increase physical addressing equal to or greater
1687c5b36783SSteven J. Hill	  than 40 bits. Note that this has the side effect of turning on
1688c5b36783SSteven J. Hill	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1689c5b36783SSteven J. Hill	  If unsure, say 'N' here.
1690c5b36783SSteven J. Hill
1691622844bfSWu Zhangjinif CPU_LOONGSON2F
1692622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1693622844bfSWu Zhangjin	bool
1694622844bfSWu Zhangjin
1695622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1696622844bfSWu Zhangjin	bool
1697622844bfSWu Zhangjin
1698622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1699622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1700622844bfSWu Zhangjin	default y
1701622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1702622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1703622844bfSWu Zhangjin	help
1704622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1705622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1706622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1707622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1708622844bfSWu Zhangjin
1709622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1710622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1711622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1712622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1713622844bfSWu Zhangjin	  systems.
1714622844bfSWu Zhangjin
1715622844bfSWu Zhangjin	  If unsure, please say Y.
1716622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1717622844bfSWu Zhangjin
17181b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
17191b93b3c3SWu Zhangjin	bool
17201b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
17211b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
172231c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
17231b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1724fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
17254e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
17261b93b3c3SWu Zhangjin
17271b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
17281b93b3c3SWu Zhangjin	bool
17291b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
17301b93b3c3SWu Zhangjin
17313702bba5SWu Zhangjinconfig CPU_LOONGSON2
17323702bba5SWu Zhangjin	bool
17333702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
17343702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
17353702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1736970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17373702bba5SWu Zhangjin
1738ca585cf9SKelvin Cheungconfig CPU_LOONGSON1
1739ca585cf9SKelvin Cheung	bool
1740ca585cf9SKelvin Cheung	select CPU_MIPS32
1741ca585cf9SKelvin Cheung	select CPU_MIPSR2
1742ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1743ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1744ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1745f29ad10dSKelvin Cheung	select CPU_SUPPORTS_CPUFREQ
1746ca585cf9SKelvin Cheung
1747fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
174804fa8bf7SJonas Gorski	select SMP_UP if SMP
17491bbb6c1bSKevin Cernekee	bool
1750cd746249SJonas Gorski
1751cd746249SJonas Gorskiconfig CPU_BMIPS4350
1752cd746249SJonas Gorski	bool
1753cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1754cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1755cd746249SJonas Gorski
1756cd746249SJonas Gorskiconfig CPU_BMIPS4380
1757cd746249SJonas Gorski	bool
1758bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
1759cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1760cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1761cd746249SJonas Gorski
1762cd746249SJonas Gorskiconfig CPU_BMIPS5000
1763cd746249SJonas Gorski	bool
1764cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1765bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_7
1766cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1767cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
17681bbb6c1bSKevin Cernekee
17690e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3
17700e476d91SHuacai Chen	bool
17710e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
17720e476d91SHuacai Chen
17733702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
17742a21c730SFuxin Zhang	bool
17752a21c730SFuxin Zhang
17766f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
17776f7a251aSWu Zhangjin	bool
177855045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
177955045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
178022f1fdfdSWu Zhangjin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
17816f7a251aSWu Zhangjin
1782ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1783ca585cf9SKelvin Cheung	bool
1784ca585cf9SKelvin Cheung
17857cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
17867cf8053bSRalf Baechle	bool
17877cf8053bSRalf Baechle
17887cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
17897cf8053bSRalf Baechle	bool
17907cf8053bSRalf Baechle
1791a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1792a6e18781SLeonid Yegoshin	bool
1793a6e18781SLeonid Yegoshin
1794c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5
1795c5b36783SSteven J. Hill	bool
1796c5b36783SSteven J. Hill
17977fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6
17987fd08ca5SLeonid Yegoshin	bool
17997fd08ca5SLeonid Yegoshin
18007cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
18017cf8053bSRalf Baechle	bool
18027cf8053bSRalf Baechle
18037cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
18047cf8053bSRalf Baechle	bool
18057cf8053bSRalf Baechle
18067fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6
18077fd08ca5SLeonid Yegoshin	bool
18087fd08ca5SLeonid Yegoshin
18097cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
18107cf8053bSRalf Baechle	bool
18117cf8053bSRalf Baechle
18127cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
18137cf8053bSRalf Baechle	bool
18147cf8053bSRalf Baechle
18157cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
18167cf8053bSRalf Baechle	bool
18177cf8053bSRalf Baechle
18187cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300
18197cf8053bSRalf Baechle	bool
18207cf8053bSRalf Baechle
18217cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
18227cf8053bSRalf Baechle	bool
18237cf8053bSRalf Baechle
18247cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
18257cf8053bSRalf Baechle	bool
18267cf8053bSRalf Baechle
18277cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
18287cf8053bSRalf Baechle	bool
18297cf8053bSRalf Baechle
18307cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432
18317cf8053bSRalf Baechle	bool
18327cf8053bSRalf Baechle
1833542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1834542c1020SShinya Kuribayashi	bool
1835542c1020SShinya Kuribayashi
18367cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000
18377cf8053bSRalf Baechle	bool
18387cf8053bSRalf Baechle
18397cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
18407cf8053bSRalf Baechle	bool
18417cf8053bSRalf Baechle
18427cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000
18437cf8053bSRalf Baechle	bool
18447cf8053bSRalf Baechle
18457cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
18467cf8053bSRalf Baechle	bool
18477cf8053bSRalf Baechle
18487cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
18497cf8053bSRalf Baechle	bool
18507cf8053bSRalf Baechle
18517cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
18527cf8053bSRalf Baechle	bool
18537cf8053bSRalf Baechle
18545e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
18555e683389SDavid Daney	bool
18565e683389SDavid Daney
1857cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
1858c1c0c461SKevin Cernekee	bool
1859c1c0c461SKevin Cernekee
1860fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
1861c1c0c461SKevin Cernekee	bool
1862cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1863c1c0c461SKevin Cernekee
1864c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
1865c1c0c461SKevin Cernekee	bool
1866cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1867c1c0c461SKevin Cernekee
1868c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
1869c1c0c461SKevin Cernekee	bool
1870cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1871c1c0c461SKevin Cernekee
1872c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
1873c1c0c461SKevin Cernekee	bool
1874cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1875c1c0c461SKevin Cernekee
18767f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
18777f058e85SJayachandran C	bool
18787f058e85SJayachandran C
18791c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
18801c773ea4SJayachandran C	bool
18811c773ea4SJayachandran C
1882b6911bbaSPaul Burtonconfig MIPS_MALTA_PM
1883b6911bbaSPaul Burton	depends on MIPS_MALTA
1884b6911bbaSPaul Burton	depends on PCI
1885b6911bbaSPaul Burton	bool
1886b6911bbaSPaul Burton	default y
1887b6911bbaSPaul Burton
188817099b11SRalf Baechle#
188917099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
189017099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
189117099b11SRalf Baechle#
18920004a9dfSRalf Baechleconfig WEAK_ORDERING
18930004a9dfSRalf Baechle	bool
189417099b11SRalf Baechle
189517099b11SRalf Baechle#
189617099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
189717099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
189817099b11SRalf Baechle#
189917099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
190017099b11SRalf Baechle	bool
19015e83d430SRalf Baechleendmenu
19025e83d430SRalf Baechle
19035e83d430SRalf Baechle#
19045e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
19055e83d430SRalf Baechle#
19065e83d430SRalf Baechleconfig CPU_MIPS32
19075e83d430SRalf Baechle	bool
19087fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
19095e83d430SRalf Baechle
19105e83d430SRalf Baechleconfig CPU_MIPS64
19115e83d430SRalf Baechle	bool
19127fd08ca5SLeonid Yegoshin	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
19135e83d430SRalf Baechle
19145e83d430SRalf Baechle#
1915c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2
19165e83d430SRalf Baechle#
19175e83d430SRalf Baechleconfig CPU_MIPSR1
19185e83d430SRalf Baechle	bool
19195e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
19205e83d430SRalf Baechle
19215e83d430SRalf Baechleconfig CPU_MIPSR2
19225e83d430SRalf Baechle	bool
1923a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1924a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19255e83d430SRalf Baechle
19267fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6
19277fd08ca5SLeonid Yegoshin	bool
19287fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1929a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19305e83d430SRalf Baechle
1931a6e18781SLeonid Yegoshinconfig EVA
1932a6e18781SLeonid Yegoshin	bool
1933a6e18781SLeonid Yegoshin
1934c5b36783SSteven J. Hillconfig XPA
1935c5b36783SSteven J. Hill	bool
1936c5b36783SSteven J. Hill
19375e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
19385e83d430SRalf Baechle	bool
19395e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
19405e83d430SRalf Baechle	bool
19415e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
19425e83d430SRalf Baechle	bool
19435e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
19445e83d430SRalf Baechle	bool
194555045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
194655045ff5SWu Zhangjin	bool
194755045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
194855045ff5SWu Zhangjin	bool
19499cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
19509cffd154SDavid Daney	bool
195122f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED
195222f1fdfdSWu Zhangjin	bool
195382622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
195482622284SDavid Daney	bool
1955d6504846SJayachandran C	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
19565e83d430SRalf Baechle
19578192c9eaSDavid Daney#
19588192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
19598192c9eaSDavid Daney#
19608192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
19618192c9eaSDavid Daney       bool
1962f839490aSDavid Daney       default y if CPU_MIPSR1 || CPU_MIPSR2
19638192c9eaSDavid Daney
19645e83d430SRalf Baechlemenu "Kernel type"
19655e83d430SRalf Baechle
19665e83d430SRalf Baechlechoice
19675e83d430SRalf Baechle	prompt "Kernel code model"
19685e83d430SRalf Baechle	help
19695e83d430SRalf Baechle	  You should only select this option if you have a workload that
19705e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
19715e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
19725e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
19735e83d430SRalf Baechle
19745e83d430SRalf Baechleconfig 32BIT
19755e83d430SRalf Baechle	bool "32-bit kernel"
19765e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
19775e83d430SRalf Baechle	select TRAD_SIGNALS
19785e83d430SRalf Baechle	help
19795e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
1980f17c4ca3SRalf Baechle
19815e83d430SRalf Baechleconfig 64BIT
19825e83d430SRalf Baechle	bool "64-bit kernel"
19835e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
19845e83d430SRalf Baechle	help
19855e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
19865e83d430SRalf Baechle
19875e83d430SRalf Baechleendchoice
19885e83d430SRalf Baechle
19892235a54dSSanjay Lalconfig KVM_GUEST
19902235a54dSSanjay Lal	bool "KVM Guest Kernel"
1991f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
19922235a54dSSanjay Lal	help
19932235a54dSSanjay Lal	  Select this option if building a guest kernel for KVM (Trap & Emulate) mode
19942235a54dSSanjay Lal
1995eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ
1996eda3d33cSJames Hogan	int "Count/Compare Timer Frequency (MHz)"
19972235a54dSSanjay Lal	depends on KVM_GUEST
1998eda3d33cSJames Hogan	default 100
19992235a54dSSanjay Lal	help
2000eda3d33cSJames Hogan	  Set this to non-zero if building a guest kernel for KVM to skip RTC
2001eda3d33cSJames Hogan	  emulation when determining guest CPU Frequency. Instead, the guest's
2002eda3d33cSJames Hogan	  timer frequency is specified directly.
20032235a54dSSanjay Lal
20041da177e4SLinus Torvaldschoice
20051da177e4SLinus Torvalds	prompt "Kernel page size"
20061da177e4SLinus Torvalds	default PAGE_SIZE_4KB
20071da177e4SLinus Torvalds
20081da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
20091da177e4SLinus Torvalds	bool "4kB"
20100e476d91SHuacai Chen	depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
20111da177e4SLinus Torvalds	help
20121da177e4SLinus Torvalds	 This option select the standard 4kB Linux page size.  On some
20131da177e4SLinus Torvalds	 R3000-family processors this is the only available page size.  Using
20141da177e4SLinus Torvalds	 4kB page size will minimize memory consumption and is therefore
20151da177e4SLinus Torvalds	 recommended for low memory systems.
20161da177e4SLinus Torvalds
20171da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
20181da177e4SLinus Torvalds	bool "8kB"
20197d60717eSKees Cook	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
20201da177e4SLinus Torvalds	help
20211da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
20221da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
2023c52399beSRalf Baechle	  only on R8000 and cnMIPS processors.  Note that you will need a
2024c52399beSRalf Baechle	  suitable Linux distribution to support this.
20251da177e4SLinus Torvalds
20261da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
20271da177e4SLinus Torvalds	bool "16kB"
2028714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
20291da177e4SLinus Torvalds	help
20301da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
20311da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
2032714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
2033714bfad6SRalf Baechle	  Linux distribution to support this.
20341da177e4SLinus Torvalds
2035c52399beSRalf Baechleconfig PAGE_SIZE_32KB
2036c52399beSRalf Baechle	bool "32kB"
2037c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
2038c52399beSRalf Baechle	help
2039c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
2040c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
2041c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
2042c52399beSRalf Baechle	  distribution to support this.
2043c52399beSRalf Baechle
20441da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
20451da177e4SLinus Torvalds	bool "64kB"
20467d60717eSKees Cook	depends on !CPU_R3000 && !CPU_TX39XX
20471da177e4SLinus Torvalds	help
20481da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
20491da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
20501da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
2051714bfad6SRalf Baechle	  writing this option is still high experimental.
20521da177e4SLinus Torvalds
20531da177e4SLinus Torvaldsendchoice
20541da177e4SLinus Torvalds
2055c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
2056c9bace7cSDavid Daney	int "Maximum zone order"
2057e4362d1eSAlex Smith	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2058e4362d1eSAlex Smith	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2059e4362d1eSAlex Smith	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2060e4362d1eSAlex Smith	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2061e4362d1eSAlex Smith	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2062e4362d1eSAlex Smith	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2063c9bace7cSDavid Daney	range 11 64
2064c9bace7cSDavid Daney	default "11"
2065c9bace7cSDavid Daney	help
2066c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
2067c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
2068c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
2069c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
2070c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
2071c9bace7cSDavid Daney	  increase this value.
2072c9bace7cSDavid Daney
2073c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
2074c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
2075c9bace7cSDavid Daney
2076c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
2077c9bace7cSDavid Daney	  when choosing a value for this option.
2078c9bace7cSDavid Daney
20791da177e4SLinus Torvaldsconfig BOARD_SCACHE
20801da177e4SLinus Torvalds	bool
20811da177e4SLinus Torvalds
20821da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
20831da177e4SLinus Torvalds	bool
20841da177e4SLinus Torvalds	select BOARD_SCACHE
20851da177e4SLinus Torvalds
20869318c51aSChris Dearman#
20879318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
20889318c51aSChris Dearman#
20899318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
20909318c51aSChris Dearman	bool
20919318c51aSChris Dearman	select BOARD_SCACHE
20929318c51aSChris Dearman
20931da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
20941da177e4SLinus Torvalds	bool
20951da177e4SLinus Torvalds	select BOARD_SCACHE
20961da177e4SLinus Torvalds
20971da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
20981da177e4SLinus Torvalds	bool
20991da177e4SLinus Torvalds	select BOARD_SCACHE
21001da177e4SLinus Torvalds
21011da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
21021da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
21031da177e4SLinus Torvalds	depends on CPU_SB1
21041da177e4SLinus Torvalds	help
21051da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
21061da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
21071da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
21081da177e4SLinus Torvalds
21091da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
2110c8094b53SRalf Baechle	bool
21111da177e4SLinus Torvalds
21123165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
21133165c846SFlorian Fainelli	bool
21143165c846SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
21153165c846SFlorian Fainelli
211691405eb6SFlorian Fainelliconfig CPU_R4K_FPU
211791405eb6SFlorian Fainelli	bool
211891405eb6SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
211991405eb6SFlorian Fainelli
212062cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
212162cedc4fSFlorian Fainelli	bool
212262cedc4fSFlorian Fainelli	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
212362cedc4fSFlorian Fainelli
212459d6ab86SRalf Baechleconfig MIPS_MT_SMP
2125a92b7f87SMarkos Chandras	bool "MIPS MT SMP support (1 TC on each available VPE)"
21265676319cSMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
212759d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
2128d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
2129c080faa5SSteven J. Hill	select SYNC_R4K
21300c2cb004SPaul Burton	select MIPS_GIC_IPI
213159d6ab86SRalf Baechle	select MIPS_MT
213259d6ab86SRalf Baechle	select SMP
213387353d8aSRalf Baechle	select SMP_UP
2134c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
2135c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
2136399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
213759d6ab86SRalf Baechle	help
2138c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
2139c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
2140c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
2141c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
2142c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
214359d6ab86SRalf Baechle
2144f41ae0b2SRalf Baechleconfig MIPS_MT
2145f41ae0b2SRalf Baechle	bool
2146f41ae0b2SRalf Baechle
21470ab7aefcSRalf Baechleconfig SCHED_SMT
21480ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
21490ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
21500ab7aefcSRalf Baechle	default n
21510ab7aefcSRalf Baechle	help
21520ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
21530ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
21540ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
21550ab7aefcSRalf Baechle
21560ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
21570ab7aefcSRalf Baechle	bool
21580ab7aefcSRalf Baechle
2159f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
2160f41ae0b2SRalf Baechle	bool
2161f41ae0b2SRalf Baechle
2162f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
2163f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
2164f088fc84SRalf Baechle	default y
2165b633648cSRalf Baechle	depends on MIPS_MT_SMP
216607cc0c9eSRalf Baechle
2167b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR
2168b0a668fbSLeonid Yegoshin	bool "MIPS R2-to-R6 emulator"
2169b0a668fbSLeonid Yegoshin	depends on CPU_MIPSR6 && !SMP
2170b0a668fbSLeonid Yegoshin	default y
2171b0a668fbSLeonid Yegoshin	help
2172b0a668fbSLeonid Yegoshin	  Choose this option if you want to run non-R6 MIPS userland code.
2173b0a668fbSLeonid Yegoshin	  Even if you say 'Y' here, the emulator will still be disabled by
217407edf0d4SMarkos Chandras	  default. You can enable it using the 'mipsr2emu' kernel option.
2175b0a668fbSLeonid Yegoshin	  The only reason this is a build-time option is to save ~14K from the
2176b0a668fbSLeonid Yegoshin	  final kernel image.
2177b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels"
2178b0a668fbSLeonid Yegoshin	depends on SMP && CPU_MIPSR6
2179b0a668fbSLeonid Yegoshin
218007cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
218107cc0c9eSRalf Baechle	bool "VPE loader support."
2182704e6460SMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && MODULES
218307cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
218407cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
218507cc0c9eSRalf Baechle	select MIPS_MT
218607cc0c9eSRalf Baechle	help
218707cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
218807cc0c9eSRalf Baechle	  onto another VPE and running it.
2189f088fc84SRalf Baechle
219017a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
219117a1d523SDeng-Cheng Zhu	bool
219217a1d523SDeng-Cheng Zhu	default "y"
219317a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
219417a1d523SDeng-Cheng Zhu
21951a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
21961a2a6d7eSDeng-Cheng Zhu	bool
21971a2a6d7eSDeng-Cheng Zhu	default "y"
21981a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
21991a2a6d7eSDeng-Cheng Zhu
2200e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2201e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2202e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2203e01402b1SRalf Baechle	default y
2204e01402b1SRalf Baechle	help
2205e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2206e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2207e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2208e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2209e01402b1SRalf Baechle
2210e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2211e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2212e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
22135e83d430SRalf Baechle	help
2214e01402b1SRalf Baechle
2215da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2216da615cf6SDeng-Cheng Zhu	bool
2217da615cf6SDeng-Cheng Zhu	default "y"
2218da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2219da615cf6SDeng-Cheng Zhu
22202c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
22212c973ef0SDeng-Cheng Zhu	bool
22222c973ef0SDeng-Cheng Zhu	default "y"
22232c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
22242c973ef0SDeng-Cheng Zhu
22254a16ff4cSRalf Baechleconfig MIPS_CMP
22265cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
22275676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
222872e20142SPaul Burton	select MIPS_GIC_IPI
2229b10b43baSMarkos Chandras	select SMP
2230eb9b5141STim Anderson	select SYNC_R4K
2231b10b43baSMarkos Chandras	select SYS_SUPPORTS_SMP
22324a16ff4cSRalf Baechle	select WEAK_ORDERING
22334a16ff4cSRalf Baechle	default n
22344a16ff4cSRalf Baechle	help
2235044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2236044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2237044505c7SPaul Burton	  its ability to start secondary CPUs.
22384a16ff4cSRalf Baechle
22395cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
22405cac93b3SPaul Burton	  instead of this.
22415cac93b3SPaul Burton
22420ee958e1SPaul Burtonconfig MIPS_CPS
22430ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
22445676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CPS && !CPU_MIPSR6
22450ee958e1SPaul Burton	select MIPS_CM
22460ee958e1SPaul Burton	select MIPS_CPC
22471d8f1f5aSPaul Burton	select MIPS_CPS_PM if HOTPLUG_CPU
22480ee958e1SPaul Burton	select MIPS_GIC_IPI
22490ee958e1SPaul Burton	select SMP
22500ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
22511d8f1f5aSPaul Burton	select SYS_SUPPORTS_HOTPLUG_CPU
22520ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
22530ee958e1SPaul Burton	select WEAK_ORDERING
22540ee958e1SPaul Burton	help
22550ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
22560ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
22570ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
22580ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
22590ee958e1SPaul Burton	  support is unavailable.
22600ee958e1SPaul Burton
22613179d37eSPaul Burtonconfig MIPS_CPS_PM
226239a59593SMarkos Chandras	depends on MIPS_CPS
2263a8b84677SPaul Burton	select MIPS_CPC
22643179d37eSPaul Burton	bool
22653179d37eSPaul Burton
226672e20142SPaul Burtonconfig MIPS_GIC_IPI
226772e20142SPaul Burton	bool
226872e20142SPaul Burton
22699f98f3ddSPaul Burtonconfig MIPS_CM
22709f98f3ddSPaul Burton	bool
22719f98f3ddSPaul Burton
22729c38cf44SPaul Burtonconfig MIPS_CPC
22739c38cf44SPaul Burton	bool
22742600990eSRalf Baechle
22751da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
22761da177e4SLinus Torvalds	bool
22771da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
22781da177e4SLinus Torvalds	default y
22791da177e4SLinus Torvalds
22801da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
22811da177e4SLinus Torvalds	bool
22821da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
22831da177e4SLinus Torvalds	default y
22841da177e4SLinus Torvalds
22852235a54dSSanjay Lal
228660ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT
228734adb28dSRalf Baechle       bool
228860ec6571Spascal@pabr.org
22899e2b5372SMarkos Chandraschoice
22909e2b5372SMarkos Chandras	prompt "SmartMIPS or microMIPS ASE support"
22919e2b5372SMarkos Chandras
22929e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
22939e2b5372SMarkos Chandras	bool "None"
22949e2b5372SMarkos Chandras	help
22959e2b5372SMarkos Chandras	  Select this if you want neither microMIPS nor SmartMIPS support
22969e2b5372SMarkos Chandras
22979693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
22989693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
22999e2b5372SMarkos Chandras	bool "SmartMIPS"
23009693a853SFranck Bui-Huu	help
23019693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
23029693a853SFranck Bui-Huu	  increased security at both hardware and software level for
23039693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
23049693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
23059693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
23069693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
23079693a853SFranck Bui-Huu	  here.
23089693a853SFranck Bui-Huu
2309bce86083SSteven J. Hillconfig CPU_MICROMIPS
23107fd08ca5SLeonid Yegoshin	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
23119e2b5372SMarkos Chandras	bool "microMIPS"
2312bce86083SSteven J. Hill	help
2313bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2314bce86083SSteven J. Hill	  microMIPS ISA
2315bce86083SSteven J. Hill
23169e2b5372SMarkos Chandrasendchoice
23179e2b5372SMarkos Chandras
2318a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
23190ce3417eSPaul Burton	bool "Support for the MIPS SIMD Architecture"
2320a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
23212a6cb669SPaul Burton	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2322a5e9a69eSPaul Burton	help
2323a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2324a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
23251db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
23261db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
23271db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
23281db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
23291db1af84SPaul Burton	  the size & complexity of your kernel.
2330a5e9a69eSPaul Burton
2331a5e9a69eSPaul Burton	  If unsure, say Y.
2332a5e9a69eSPaul Burton
23331da177e4SLinus Torvaldsconfig CPU_HAS_WB
2334f7062ddbSRalf Baechle	bool
2335e01402b1SRalf Baechle
2336df0ac8a4SKevin Cernekeeconfig XKS01
2337df0ac8a4SKevin Cernekee	bool
2338df0ac8a4SKevin Cernekee
2339f41ae0b2SRalf Baechle#
2340f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2341f41ae0b2SRalf Baechle#
2342e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2343f41ae0b2SRalf Baechle	bool
2344e01402b1SRalf Baechle
2345f41ae0b2SRalf Baechle#
2346f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2347f41ae0b2SRalf Baechle#
2348e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2349f41ae0b2SRalf Baechle	bool
2350e01402b1SRalf Baechle
23511da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
23521da177e4SLinus Torvalds	bool
23531da177e4SLinus Torvalds	depends on !CPU_R3000
23541da177e4SLinus Torvalds	default y
23551da177e4SLinus Torvalds
23561da177e4SLinus Torvalds#
235720d60d99SMaciej W. Rozycki# CPU non-features
235820d60d99SMaciej W. Rozycki#
235920d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
236020d60d99SMaciej W. Rozycki	bool
236120d60d99SMaciej W. Rozycki
236220d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
236320d60d99SMaciej W. Rozycki	bool
236420d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
236520d60d99SMaciej W. Rozycki
236620d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
236720d60d99SMaciej W. Rozycki	bool
236820d60d99SMaciej W. Rozycki
236920d60d99SMaciej W. Rozycki#
23701da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
23711da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
23721da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
23731da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
23741da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
23751da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
23761da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
23771da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2378797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2379797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2380797798c1SRalf Baechle#   support.
23811da177e4SLinus Torvalds#
23821da177e4SLinus Torvaldsconfig HIGHMEM
23831da177e4SLinus Torvalds	bool "High Memory Support"
2384a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2385797798c1SRalf Baechle
2386797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2387797798c1SRalf Baechle	bool
2388797798c1SRalf Baechle
2389797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2390797798c1SRalf Baechle	bool
23911da177e4SLinus Torvalds
23929693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
23939693a853SFranck Bui-Huu	bool
23949693a853SFranck Bui-Huu
2395a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2396a6a4834cSSteven J. Hill	bool
2397a6a4834cSSteven J. Hill
2398377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16
2399377cb1b6SRalf Baechle	bool
2400377cb1b6SRalf Baechle	help
2401377cb1b6SRalf Baechle	  This option must be set if a kernel might be executed on a MIPS16-
2402377cb1b6SRalf Baechle	  enabled CPU even if MIPS16 is not actually being used.  In other
2403377cb1b6SRalf Baechle	  words, it makes the kernel MIPS16-tolerant.
2404377cb1b6SRalf Baechle
2405a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2406a5e9a69eSPaul Burton	bool
2407a5e9a69eSPaul Burton
2408b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2409b4819b59SYoichi Yuasa	def_bool y
2410f133f22dSWu Zhangjin	depends on !NUMA && !CPU_LOONGSON2
2411b4819b59SYoichi Yuasa
2412d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE
2413d8cb4e11SRalf Baechle	bool
2414d8cb4e11SRalf Baechle	default y if SGI_IP27
2415d8cb4e11SRalf Baechle	help
24163dde6ad8SDavid Sterba	  Say Y to support efficient handling of discontiguous physical memory,
2417d8cb4e11SRalf Baechle	  for architectures which are either NUMA (Non-Uniform Memory Access)
2418d8cb4e11SRalf Baechle	  or have huge holes in the physical address space for other reasons.
2419d8cb4e11SRalf Baechle	  See <file:Documentation/vm/numa> for more.
2420d8cb4e11SRalf Baechle
2421b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2422b1c6cd42SAtsushi Nemoto	bool
24237de58fabSAtsushi Nemoto	select SPARSEMEM_STATIC
242431473747SAtsushi Nemoto
2425d8cb4e11SRalf Baechleconfig NUMA
2426d8cb4e11SRalf Baechle	bool "NUMA Support"
2427d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2428d8cb4e11SRalf Baechle	help
2429d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2430d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2431d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2432d8cb4e11SRalf Baechle	  leave it disabled; on single node systems disable this option
2433d8cb4e11SRalf Baechle	  disabled.
2434d8cb4e11SRalf Baechle
2435d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2436d8cb4e11SRalf Baechle	bool
2437d8cb4e11SRalf Baechle
2438c80d79d7SYasunori Gotoconfig NODES_SHIFT
2439c80d79d7SYasunori Goto	int
2440c80d79d7SYasunori Goto	default "6"
2441c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2442c80d79d7SYasunori Goto
244314f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
244414f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
2445f14ceff7SHuacai Chen	depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
244614f70012SDeng-Cheng Zhu	default y
244714f70012SDeng-Cheng Zhu	help
244814f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
244914f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
245014f70012SDeng-Cheng Zhu
2451b4819b59SYoichi Yuasasource "mm/Kconfig"
2452b4819b59SYoichi Yuasa
24531da177e4SLinus Torvaldsconfig SMP
24541da177e4SLinus Torvalds	bool "Multi-Processing support"
2455e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2456e73ea273SRalf Baechle	help
24571da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
24584a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
24594a474157SRobert Graffham	  than one CPU, say Y.
24601da177e4SLinus Torvalds
24614a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
24621da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
24631da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
24644a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
24651da177e4SLinus Torvalds	  will run faster if you say N here.
24661da177e4SLinus Torvalds
24671da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
24681da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
24691da177e4SLinus Torvalds
247003502faaSAdrian Bunk	  See also the SMP-HOWTO available at
247103502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
24721da177e4SLinus Torvalds
24731da177e4SLinus Torvalds	  If you don't know what to do here, say N.
24741da177e4SLinus Torvalds
247587353d8aSRalf Baechleconfig SMP_UP
247687353d8aSRalf Baechle	bool
247787353d8aSRalf Baechle
24784a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
24794a16ff4cSRalf Baechle	bool
24804a16ff4cSRalf Baechle
24810ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
24820ee958e1SPaul Burton	bool
24830ee958e1SPaul Burton
2484e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2485e73ea273SRalf Baechle	bool
2486e73ea273SRalf Baechle
2487130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2488130e2fb7SRalf Baechle	bool
2489130e2fb7SRalf Baechle
2490130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2491130e2fb7SRalf Baechle	bool
2492130e2fb7SRalf Baechle
2493130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2494130e2fb7SRalf Baechle	bool
2495130e2fb7SRalf Baechle
2496130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2497130e2fb7SRalf Baechle	bool
2498130e2fb7SRalf Baechle
2499130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2500130e2fb7SRalf Baechle	bool
2501130e2fb7SRalf Baechle
25021da177e4SLinus Torvaldsconfig NR_CPUS
2503a91796a9SJayachandran C	int "Maximum number of CPUs (2-256)"
2504a91796a9SJayachandran C	range 2 256
25051da177e4SLinus Torvalds	depends on SMP
2506130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2507130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2508130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2509130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2510130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
25111da177e4SLinus Torvalds	help
25121da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
25131da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
25141da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
251572ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
251672ede9b1SAtsushi Nemoto	  and 2 for all others.
25171da177e4SLinus Torvalds
25181da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
251972ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
252072ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
252172ede9b1SAtsushi Nemoto	  power of two.
25221da177e4SLinus Torvalds
2523399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2524399aaa25SAl Cooper	bool
2525399aaa25SAl Cooper
25261723b4a3SAtsushi Nemoto#
25271723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
25281723b4a3SAtsushi Nemoto#
25291723b4a3SAtsushi Nemoto
25301723b4a3SAtsushi Nemotochoice
25311723b4a3SAtsushi Nemoto	prompt "Timer frequency"
25321723b4a3SAtsushi Nemoto	default HZ_250
25331723b4a3SAtsushi Nemoto	help
25341723b4a3SAtsushi Nemoto	 Allows the configuration of the timer frequency.
25351723b4a3SAtsushi Nemoto
253667596573SPaul Burton	config HZ_24
253767596573SPaul Burton		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
253867596573SPaul Burton
25391723b4a3SAtsushi Nemoto	config HZ_48
25400f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
25411723b4a3SAtsushi Nemoto
25421723b4a3SAtsushi Nemoto	config HZ_100
25431723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
25441723b4a3SAtsushi Nemoto
25451723b4a3SAtsushi Nemoto	config HZ_128
25461723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
25471723b4a3SAtsushi Nemoto
25481723b4a3SAtsushi Nemoto	config HZ_250
25491723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
25501723b4a3SAtsushi Nemoto
25511723b4a3SAtsushi Nemoto	config HZ_256
25521723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
25531723b4a3SAtsushi Nemoto
25541723b4a3SAtsushi Nemoto	config HZ_1000
25551723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
25561723b4a3SAtsushi Nemoto
25571723b4a3SAtsushi Nemoto	config HZ_1024
25581723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
25591723b4a3SAtsushi Nemoto
25601723b4a3SAtsushi Nemotoendchoice
25611723b4a3SAtsushi Nemoto
256267596573SPaul Burtonconfig SYS_SUPPORTS_24HZ
256367596573SPaul Burton	bool
256467596573SPaul Burton
25651723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
25661723b4a3SAtsushi Nemoto	bool
25671723b4a3SAtsushi Nemoto
25681723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
25691723b4a3SAtsushi Nemoto	bool
25701723b4a3SAtsushi Nemoto
25711723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
25721723b4a3SAtsushi Nemoto	bool
25731723b4a3SAtsushi Nemoto
25741723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
25751723b4a3SAtsushi Nemoto	bool
25761723b4a3SAtsushi Nemoto
25771723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
25781723b4a3SAtsushi Nemoto	bool
25791723b4a3SAtsushi Nemoto
25801723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
25811723b4a3SAtsushi Nemoto	bool
25821723b4a3SAtsushi Nemoto
25831723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
25841723b4a3SAtsushi Nemoto	bool
25851723b4a3SAtsushi Nemoto
25861723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
25871723b4a3SAtsushi Nemoto	bool
258867596573SPaul Burton	default y if !SYS_SUPPORTS_24HZ && \
258967596573SPaul Burton		     !SYS_SUPPORTS_48HZ && \
259067596573SPaul Burton		     !SYS_SUPPORTS_100HZ && \
259167596573SPaul Burton		     !SYS_SUPPORTS_128HZ && \
259267596573SPaul Burton		     !SYS_SUPPORTS_250HZ && \
259367596573SPaul Burton		     !SYS_SUPPORTS_256HZ && \
259467596573SPaul Burton		     !SYS_SUPPORTS_1000HZ && \
25951723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
25961723b4a3SAtsushi Nemoto
25971723b4a3SAtsushi Nemotoconfig HZ
25981723b4a3SAtsushi Nemoto	int
259967596573SPaul Burton	default 24 if HZ_24
26001723b4a3SAtsushi Nemoto	default 48 if HZ_48
26011723b4a3SAtsushi Nemoto	default 100 if HZ_100
26021723b4a3SAtsushi Nemoto	default 128 if HZ_128
26031723b4a3SAtsushi Nemoto	default 250 if HZ_250
26041723b4a3SAtsushi Nemoto	default 256 if HZ_256
26051723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
26061723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
26071723b4a3SAtsushi Nemoto
260896685b17SDeng-Cheng Zhuconfig SCHED_HRTICK
260996685b17SDeng-Cheng Zhu	def_bool HIGH_RES_TIMERS
261096685b17SDeng-Cheng Zhu
2611e80de850SRalf Baechlesource "kernel/Kconfig.preempt"
26121da177e4SLinus Torvalds
2613ea6e942bSAtsushi Nemotoconfig KEXEC
26147d60717eSKees Cook	bool "Kexec system call"
26152965faa5SDave Young	select KEXEC_CORE
2616ea6e942bSAtsushi Nemoto	help
2617ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2618ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
26193dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2620ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2621ea6e942bSAtsushi Nemoto
262201dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2623ea6e942bSAtsushi Nemoto
2624ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2625ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2626bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2627bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2628bf220695SGeert Uytterhoeven	  made.
2629ea6e942bSAtsushi Nemoto
26307aa1c8f4SRalf Baechleconfig CRASH_DUMP
26317aa1c8f4SRalf Baechle	  bool "Kernel crash dumps"
26327aa1c8f4SRalf Baechle	  help
26337aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
26347aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
26357aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
26367aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
26377aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
26387aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
26397aa1c8f4SRalf Baechle	  PHYSICAL_START.
26407aa1c8f4SRalf Baechle
26417aa1c8f4SRalf Baechleconfig PHYSICAL_START
26427aa1c8f4SRalf Baechle	  hex "Physical address where the kernel is loaded"
26437aa1c8f4SRalf Baechle	  default "0xffffffff84000000" if 64BIT
26447aa1c8f4SRalf Baechle	  default "0x84000000" if 32BIT
26457aa1c8f4SRalf Baechle	  depends on CRASH_DUMP
26467aa1c8f4SRalf Baechle	  help
26477aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
26487aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
26497aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
26507aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
26517aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
26527aa1c8f4SRalf Baechle
2653ea6e942bSAtsushi Nemotoconfig SECCOMP
2654ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2655293c5bd1SRalf Baechle	depends on PROC_FS
2656ea6e942bSAtsushi Nemoto	default y
2657ea6e942bSAtsushi Nemoto	help
2658ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2659ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2660ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2661ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2662ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2663ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2664ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2665ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2666ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2667ea6e942bSAtsushi Nemoto
2668ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2669ea6e942bSAtsushi Nemoto
2670597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
26710ce3417eSPaul Burton	bool "Support for O32 binaries using 64-bit FP"
2672597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
2673597ce172SPaul Burton	help
2674597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
2675597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
2676597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2677597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
2678597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
2679597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
2680597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
2681597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
2682597ce172SPaul Burton	  saying N here.
2683597ce172SPaul Burton
268406e2e882SPaul Burton	  Although binutils currently supports use of this flag the details
268506e2e882SPaul Burton	  concerning its effect upon the O32 ABI in userland are still being
268606e2e882SPaul Burton	  worked on. In order to avoid userland becoming dependant upon current
268706e2e882SPaul Burton	  behaviour before the details have been finalised, this option should
268806e2e882SPaul Burton	  be considered experimental and only enabled by those working upon
268906e2e882SPaul Burton	  said details.
269006e2e882SPaul Burton
269106e2e882SPaul Burton	  If unsure, say N.
2692597ce172SPaul Burton
2693f2ffa5abSDezhong Diaoconfig USE_OF
26940b3e06fdSJonas Gorski	bool
2695f2ffa5abSDezhong Diao	select OF
2696e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
2697abd2363fSGrant Likely	select IRQ_DOMAIN
2698f2ffa5abSDezhong Diao
26997fafb068SAndrew Brestickerconfig BUILTIN_DTB
27007fafb068SAndrew Bresticker	bool
27017fafb068SAndrew Bresticker
27021da8f179SJonas Gorskichoice
27031da8f179SJonas Gorski	prompt "Kernel appended dtb support" if OF
27041da8f179SJonas Gorski	default MIPS_NO_APPENDED_DTB
27051da8f179SJonas Gorski
27061da8f179SJonas Gorski	config MIPS_NO_APPENDED_DTB
27071da8f179SJonas Gorski		bool "None"
27081da8f179SJonas Gorski		help
27091da8f179SJonas Gorski		  Do not enable appended dtb support.
27101da8f179SJonas Gorski
27111da8f179SJonas Gorski	config MIPS_RAW_APPENDED_DTB
27121da8f179SJonas Gorski		bool "vmlinux.bin"
27131da8f179SJonas Gorski		help
27141da8f179SJonas Gorski		  With this option, the boot code will look for a device tree binary
27151da8f179SJonas Gorski		  DTB) appended to raw vmlinux.bin (without decompressor).
27161da8f179SJonas Gorski		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
27171da8f179SJonas Gorski
27181da8f179SJonas Gorski		  This is meant as a backward compatibility convenience for those
27191da8f179SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
27201da8f179SJonas Gorski		  the documented boot protocol using a device tree.
27211da8f179SJonas Gorski
27221da8f179SJonas Gorski		  Beware that there is very little in terms of protection against
27231da8f179SJonas Gorski		  this option being confused by leftover garbage in memory that might
27241da8f179SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
27251da8f179SJonas Gorski		  to vmlinux.bin.  Do not leave this option active in a production kernel
27261da8f179SJonas Gorski		  if you don't intend to always append a DTB.
2727c0b4e101SJonas Gorski
2728c0b4e101SJonas Gorski	config MIPS_ZBOOT_APPENDED_DTB
2729c0b4e101SJonas Gorski		bool "vmlinuz.bin"
2730c0b4e101SJonas Gorski		depends on SYS_SUPPORTS_ZBOOT
2731c0b4e101SJonas Gorski		help
2732c0b4e101SJonas Gorski		  With this option, the boot code will look for a device tree binary
2733c0b4e101SJonas Gorski		  DTB) appended to raw vmlinuz.bin (with decompressor).
2734c0b4e101SJonas Gorski		  (e.g. cat vmlinuz.bin <filename>.dtb > vmlinuz_w_dtb).
2735c0b4e101SJonas Gorski
2736c0b4e101SJonas Gorski		  This is meant as a backward compatibility convenience for those
2737c0b4e101SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
2738c0b4e101SJonas Gorski		  the documented boot protocol using a device tree.
2739c0b4e101SJonas Gorski
2740c0b4e101SJonas Gorski		  Beware that there is very little in terms of protection against
2741c0b4e101SJonas Gorski		  this option being confused by leftover garbage in memory that might
2742c0b4e101SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
2743c0b4e101SJonas Gorski		  to vmlinuz.bin.  Do not leave this option active in a production kernel
2744c0b4e101SJonas Gorski		  if you don't intend to always append a DTB.
27451da8f179SJonas Gorskiendchoice
27461da8f179SJonas Gorski
27475e83d430SRalf Baechleendmenu
27485e83d430SRalf Baechle
27491df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
27501df0f0ffSAtsushi Nemoto	bool
27511df0f0ffSAtsushi Nemoto	default y
27521df0f0ffSAtsushi Nemoto
27531df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
27541df0f0ffSAtsushi Nemoto	bool
27551df0f0ffSAtsushi Nemoto	default y
27561df0f0ffSAtsushi Nemoto
2757a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS
2758a728ab52SKirill A. Shutemov	int
2759a728ab52SKirill A. Shutemov	default 3 if 64BIT && !PAGE_SIZE_64KB
2760a728ab52SKirill A. Shutemov	default 2
2761a728ab52SKirill A. Shutemov
2762b6c3539bSRalf Baechlesource "init/Kconfig"
2763b6c3539bSRalf Baechle
2764dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
2765dc52ddc0SMatt Helsley
27661da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
27671da177e4SLinus Torvalds
27685e83d430SRalf Baechleconfig HW_HAS_EISA
27695e83d430SRalf Baechle	bool
27701da177e4SLinus Torvaldsconfig HW_HAS_PCI
27711da177e4SLinus Torvalds	bool
27721da177e4SLinus Torvalds
27731da177e4SLinus Torvaldsconfig PCI
27741da177e4SLinus Torvalds	bool "Support for PCI controller"
27751da177e4SLinus Torvalds	depends on HW_HAS_PCI
2776abb4ae46SRalf Baechle	select PCI_DOMAINS
27770f3b3956SMichael S. Tsirkin	select NO_GENERIC_PCI_IOPORT_MAP
27781da177e4SLinus Torvalds	help
27791da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
27801da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
27811da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
27821da177e4SLinus Torvalds	  say Y, otherwise N.
27831da177e4SLinus Torvalds
27840e476d91SHuacai Chenconfig HT_PCI
27850e476d91SHuacai Chen	bool "Support for HT-linked PCI"
27860e476d91SHuacai Chen	default y
27870e476d91SHuacai Chen	depends on CPU_LOONGSON3
27880e476d91SHuacai Chen	select PCI
27890e476d91SHuacai Chen	select PCI_DOMAINS
27900e476d91SHuacai Chen	help
27910e476d91SHuacai Chen	  Loongson family machines use Hyper-Transport bus for inter-core
27920e476d91SHuacai Chen	  connection and device connection. The PCI bus is a subordinate
27930e476d91SHuacai Chen	  linked at HT. Choose Y for Loongson-3 based machines.
27940e476d91SHuacai Chen
27951da177e4SLinus Torvaldsconfig PCI_DOMAINS
27961da177e4SLinus Torvalds	bool
27971da177e4SLinus Torvalds
27981da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
27991da177e4SLinus Torvalds
28003f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig"
28013f787ca4SJonas Gorski
28021da177e4SLinus Torvalds#
28031da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
28041da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
28051da177e4SLinus Torvalds# users to choose the right thing ...
28061da177e4SLinus Torvalds#
28071da177e4SLinus Torvaldsconfig ISA
28081da177e4SLinus Torvalds	bool
28091da177e4SLinus Torvalds
28101da177e4SLinus Torvaldsconfig EISA
28111da177e4SLinus Torvalds	bool "EISA support"
28125e83d430SRalf Baechle	depends on HW_HAS_EISA
28131da177e4SLinus Torvalds	select ISA
2814aa414dffSRalf Baechle	select GENERIC_ISA_DMA
28151da177e4SLinus Torvalds	---help---
28161da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
28171da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
28181da177e4SLinus Torvalds
28191da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
28201da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
28211da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
28221da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
28231da177e4SLinus Torvalds
28241da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
28251da177e4SLinus Torvalds
28261da177e4SLinus Torvalds	  Otherwise, say N.
28271da177e4SLinus Torvalds
28281da177e4SLinus Torvaldssource "drivers/eisa/Kconfig"
28291da177e4SLinus Torvalds
28301da177e4SLinus Torvaldsconfig TC
28311da177e4SLinus Torvalds	bool "TURBOchannel support"
28321da177e4SLinus Torvalds	depends on MACH_DECSTATION
28331da177e4SLinus Torvalds	help
283450a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
283550a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
283650a23e6eSJustin P. Mattock	  at:
283750a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
283850a23e6eSJustin P. Mattock	  and:
283950a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
284050a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
284150a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
28421da177e4SLinus Torvalds
28431da177e4SLinus Torvaldsconfig MMU
28441da177e4SLinus Torvalds	bool
28451da177e4SLinus Torvalds	default y
28461da177e4SLinus Torvalds
2847d865bea4SRalf Baechleconfig I8253
2848d865bea4SRalf Baechle	bool
2849798778b8SRussell King	select CLKSRC_I8253
28502d02612fSThomas Gleixner	select CLKEVT_I8253
28519726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
2852d865bea4SRalf Baechle
2853e05eb3f8SRalf Baechleconfig ZONE_DMA
2854e05eb3f8SRalf Baechle	bool
2855e05eb3f8SRalf Baechle
2856cce335aeSRalf Baechleconfig ZONE_DMA32
2857cce335aeSRalf Baechle	bool
2858cce335aeSRalf Baechle
28591da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
28601da177e4SLinus Torvalds
28611da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig"
28621da177e4SLinus Torvalds
2863388b78adSAlexandre Bounineconfig RAPIDIO
286456abde72SAlexandre Bounine	tristate "RapidIO support"
2865388b78adSAlexandre Bounine	depends on PCI
2866388b78adSAlexandre Bounine	default n
2867388b78adSAlexandre Bounine	help
2868388b78adSAlexandre Bounine	  If you say Y here, the kernel will include drivers and
2869388b78adSAlexandre Bounine	  infrastructure code to support RapidIO interconnect devices.
2870388b78adSAlexandre Bounine
2871388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig"
2872388b78adSAlexandre Bounine
28731da177e4SLinus Torvaldsendmenu
28741da177e4SLinus Torvalds
28751da177e4SLinus Torvaldsmenu "Executable file formats"
28761da177e4SLinus Torvalds
28771da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
28781da177e4SLinus Torvalds
28791da177e4SLinus Torvaldsconfig TRAD_SIGNALS
28801da177e4SLinus Torvalds	bool
28811da177e4SLinus Torvalds
28821da177e4SLinus Torvaldsconfig MIPS32_COMPAT
288378aaf956SRalf Baechle	bool
28841da177e4SLinus Torvalds
28851da177e4SLinus Torvaldsconfig COMPAT
28861da177e4SLinus Torvalds	bool
28871da177e4SLinus Torvalds
288805e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
288905e43966SAtsushi Nemoto	bool
289005e43966SAtsushi Nemoto
28911da177e4SLinus Torvaldsconfig MIPS32_O32
28921da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
289378aaf956SRalf Baechle	depends on 64BIT
289478aaf956SRalf Baechle	select ARCH_WANT_OLD_COMPAT_IPC
289578aaf956SRalf Baechle	select COMPAT
289678aaf956SRalf Baechle	select MIPS32_COMPAT
289778aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
28981da177e4SLinus Torvalds	help
28991da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
29001da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
29011da177e4SLinus Torvalds	  existing binaries are in this format.
29021da177e4SLinus Torvalds
29031da177e4SLinus Torvalds	  If unsure, say Y.
29041da177e4SLinus Torvalds
29051da177e4SLinus Torvaldsconfig MIPS32_N32
29061da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
2907c22eacfeSRalf Baechle	depends on 64BIT
290878aaf956SRalf Baechle	select COMPAT
290978aaf956SRalf Baechle	select MIPS32_COMPAT
291078aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
29111da177e4SLinus Torvalds	help
29121da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
29131da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
29141da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
29151da177e4SLinus Torvalds	  cases.
29161da177e4SLinus Torvalds
29171da177e4SLinus Torvalds	  If unsure, say N.
29181da177e4SLinus Torvalds
29191da177e4SLinus Torvaldsconfig BINFMT_ELF32
29201da177e4SLinus Torvalds	bool
29211da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
29221da177e4SLinus Torvalds
29232116245eSRalf Baechleendmenu
29241da177e4SLinus Torvalds
29252116245eSRalf Baechlemenu "Power management options"
2926952fa954SRodolfo Giometti
2927363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
2928363c55caSWu Zhangjin	def_bool y
29293f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2930363c55caSWu Zhangjin
2931f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
2932f4cb5700SJohannes Berg	def_bool y
29333f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2934f4cb5700SJohannes Berg
29352116245eSRalf Baechlesource "kernel/power/Kconfig"
2936952fa954SRodolfo Giometti
29371da177e4SLinus Torvaldsendmenu
29381da177e4SLinus Torvalds
29397a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
29407a998935SViresh Kumar	bool
29417a998935SViresh Kumar
29427a998935SViresh Kumarmenu "CPU Power Management"
2943c095ebafSPaul Burton
2944c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
29457a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
29467a998935SViresh Kumarendif
29479726b43aSWu Zhangjin
2948c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig"
2949c095ebafSPaul Burton
2950c095ebafSPaul Burtonendmenu
2951c095ebafSPaul Burton
2952d5950b43SSam Ravnborgsource "net/Kconfig"
2953d5950b43SSam Ravnborg
29541da177e4SLinus Torvaldssource "drivers/Kconfig"
29551da177e4SLinus Torvalds
295698cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
295798cdee0eSRalf Baechle
29581da177e4SLinus Torvaldssource "fs/Kconfig"
29591da177e4SLinus Torvalds
29601da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug"
29611da177e4SLinus Torvalds
29621da177e4SLinus Torvaldssource "security/Kconfig"
29631da177e4SLinus Torvalds
29641da177e4SLinus Torvaldssource "crypto/Kconfig"
29651da177e4SLinus Torvalds
29661da177e4SLinus Torvaldssource "lib/Kconfig"
29672235a54dSSanjay Lal
29682235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
2969