xref: /linux/arch/mips/Kconfig (revision d399157283fb457cdc3ae03f2897070f0bd5d7c6)
1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0
21da177e4SLinus Torvaldsconfig MIPS
31da177e4SLinus Torvalds	bool
41da177e4SLinus Torvalds	default y
5942fa985SYury Norov	select ARCH_32BIT_OFF_T if !64BIT
6ea6a3737SPaul Burton	select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
734c01e41SAlexander Lobakin	select ARCH_HAS_FORTIFY_SOURCE
834c01e41SAlexander Lobakin	select ARCH_HAS_KCOV
934c01e41SAlexander Lobakin	select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
1012597988SMatt Redfearn	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
111e35918aSHassan Naveed	select ARCH_HAS_UBSAN_SANITIZE_ALL
1212597988SMatt Redfearn	select ARCH_SUPPORTS_UPROBES
131ee3630aSRalf Baechle	select ARCH_USE_BUILTIN_BSWAP
1412597988SMatt Redfearn	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
1525da4e9dSPaul Burton	select ARCH_USE_QUEUED_RWLOCKS
160b17c967SPaul Burton	select ARCH_USE_QUEUED_SPINLOCKS
179035bd29SAlexandre Ghiti	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
1812597988SMatt Redfearn	select ARCH_WANT_IPC_PARSE_VERSION
1910916706SShile Zhang	select BUILDTIME_TABLE_SORT
2012597988SMatt Redfearn	select CLONE_BACKWARDS
2157eeacedSPaul Burton	select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
2212597988SMatt Redfearn	select CPU_PM if CPU_IDLE
2312597988SMatt Redfearn	select GENERIC_ATOMIC64 if !64BIT
2412597988SMatt Redfearn	select GENERIC_CLOCKEVENTS
2512597988SMatt Redfearn	select GENERIC_CMOS_UPDATE
2612597988SMatt Redfearn	select GENERIC_CPU_AUTOPROBE
2724640f23SVincenzo Frascino	select GENERIC_GETTIMEOFDAY
28b962aeb0SPaul Burton	select GENERIC_IOMAP
2912597988SMatt Redfearn	select GENERIC_IRQ_PROBE
3012597988SMatt Redfearn	select GENERIC_IRQ_SHOW
316630a8e5SChristoph Hellwig	select GENERIC_ISA_DMA if EISA
32740129b3SAntony Pavlov	select GENERIC_LIB_ASHLDI3
33740129b3SAntony Pavlov	select GENERIC_LIB_ASHRDI3
34740129b3SAntony Pavlov	select GENERIC_LIB_CMPDI2
35740129b3SAntony Pavlov	select GENERIC_LIB_LSHRDI3
36740129b3SAntony Pavlov	select GENERIC_LIB_UCMPDI2
3712597988SMatt Redfearn	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
3812597988SMatt Redfearn	select GENERIC_SMP_IDLE_THREAD
3912597988SMatt Redfearn	select GENERIC_TIME_VSYSCALL
40446f062bSChristoph Hellwig	select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
4112597988SMatt Redfearn	select HANDLE_DOMAIN_IRQ
42906d441fSPaul Burton	select HAVE_ARCH_COMPILER_H
4312597988SMatt Redfearn	select HAVE_ARCH_JUMP_LABEL
4488547001SJason Wessel	select HAVE_ARCH_KGDB
45109c32ffSMatt Redfearn	select HAVE_ARCH_MMAP_RND_BITS if MMU
46109c32ffSMatt Redfearn	select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
47490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
48c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
4945e03e62SDaniel Silsby	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
502ff2b7ecSMasahiro Yamada	select HAVE_ASM_MODVERSIONS
5136366e36SPaul Burton	select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
5212597988SMatt Redfearn	select HAVE_CONTEXT_TRACKING
53490f561bSFrederic Weisbecker	select HAVE_TIF_NOHZ
5412597988SMatt Redfearn	select HAVE_COPY_THREAD_TLS
5564575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
5612597988SMatt Redfearn	select HAVE_DEBUG_KMEMLEAK
5712597988SMatt Redfearn	select HAVE_DEBUG_STACKOVERFLOW
5812597988SMatt Redfearn	select HAVE_DMA_CONTIGUOUS
5912597988SMatt Redfearn	select HAVE_DYNAMIC_FTRACE
6034c01e41SAlexander Lobakin	select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
6112597988SMatt Redfearn	select HAVE_EXIT_THREAD
6267a929e0SChristoph Hellwig	select HAVE_FAST_GUP
6312597988SMatt Redfearn	select HAVE_FTRACE_MCOUNT_RECORD
6429c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
6512597988SMatt Redfearn	select HAVE_FUNCTION_TRACER
6634c01e41SAlexander Lobakin	select HAVE_GCC_PLUGINS
6734c01e41SAlexander Lobakin	select HAVE_GENERIC_VDSO
6812597988SMatt Redfearn	select HAVE_IDE
69b3a428b4SHassan Naveed	select HAVE_IOREMAP_PROT
7012597988SMatt Redfearn	select HAVE_IRQ_EXIT_ON_IRQ_STACK
7112597988SMatt Redfearn	select HAVE_IRQ_TIME_ACCOUNTING
72c1bf207dSDavid Daney	select HAVE_KPROBES
73c1bf207dSDavid Daney	select HAVE_KRETPROBES
74c0436b50SPaul Burton	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
759d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
76786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
7742a0bb3fSPetr Mladek	select HAVE_NMI
7812597988SMatt Redfearn	select HAVE_OPROFILE
7912597988SMatt Redfearn	select HAVE_PERF_EVENTS
8008bccf43SMarcin Nowakowski	select HAVE_REGS_AND_STACK_ACCESS_API
819ea141adSPaul Burton	select HAVE_RSEQ
8216c0f03fSHassan Naveed	select HAVE_SPARSE_SYSCALL_NR
83d148eac0SMasahiro Yamada	select HAVE_STACKPROTECTOR
8412597988SMatt Redfearn	select HAVE_SYSCALL_TRACEPOINTS
85a3f14310SBen Hutchings	select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
8612597988SMatt Redfearn	select IRQ_FORCED_THREADING
876630a8e5SChristoph Hellwig	select ISA if EISA
8812597988SMatt Redfearn	select MODULES_USE_ELF_REL if MODULES
8934c01e41SAlexander Lobakin	select MODULES_USE_ELF_RELA if MODULES && 64BIT
9012597988SMatt Redfearn	select PERF_USE_VMALLOC
9105a0a344SArnd Bergmann	select RTC_LIB
9212597988SMatt Redfearn	select SYSCTL_EXCEPTION_TRACE
9312597988SMatt Redfearn	select VIRT_TO_BUS
941da177e4SLinus Torvalds
95*d3991572SChristoph Hellwigconfig MIPS_FIXUP_BIGPHYS_ADDR
96*d3991572SChristoph Hellwig	bool
97*d3991572SChristoph Hellwig
981da177e4SLinus Torvaldsmenu "Machine selection"
991da177e4SLinus Torvalds
1005e83d430SRalf Baechlechoice
1015e83d430SRalf Baechle	prompt "System type"
102d41e6858SMatt Redfearn	default MIPS_GENERIC
1031da177e4SLinus Torvalds
104eed0eabdSPaul Burtonconfig MIPS_GENERIC
105eed0eabdSPaul Burton	bool "Generic board-agnostic MIPS kernel"
106eed0eabdSPaul Burton	select BOOT_RAW
107eed0eabdSPaul Burton	select BUILTIN_DTB
108eed0eabdSPaul Burton	select CEVT_R4K
109eed0eabdSPaul Burton	select CLKSRC_MIPS_GIC
110eed0eabdSPaul Burton	select COMMON_CLK
111eed0eabdSPaul Burton	select CPU_MIPSR2_IRQ_EI
11234c01e41SAlexander Lobakin	select CPU_MIPSR2_IRQ_VI
113eed0eabdSPaul Burton	select CSRC_R4K
114eed0eabdSPaul Burton	select DMA_PERDEV_COHERENT
115eb01d42aSChristoph Hellwig	select HAVE_PCI
116eed0eabdSPaul Burton	select IRQ_MIPS_CPU
1170211d49eSPaul Burton	select MIPS_AUTO_PFN_OFFSET
118eed0eabdSPaul Burton	select MIPS_CPU_SCACHE
119eed0eabdSPaul Burton	select MIPS_GIC
120eed0eabdSPaul Burton	select MIPS_L1_CACHE_SHIFT_7
121eed0eabdSPaul Burton	select NO_EXCEPT_FILL
122eed0eabdSPaul Burton	select PCI_DRIVERS_GENERIC
123eed0eabdSPaul Burton	select SMP_UP if SMP
124a3078e59SMatt Redfearn	select SWAP_IO_SPACE
125eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS32_R1
126eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS32_R2
127eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS32_R6
128eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS64_R1
129eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS64_R2
130eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS64_R6
131eed0eabdSPaul Burton	select SYS_SUPPORTS_32BIT_KERNEL
132eed0eabdSPaul Burton	select SYS_SUPPORTS_64BIT_KERNEL
133eed0eabdSPaul Burton	select SYS_SUPPORTS_BIG_ENDIAN
134eed0eabdSPaul Burton	select SYS_SUPPORTS_HIGHMEM
135eed0eabdSPaul Burton	select SYS_SUPPORTS_LITTLE_ENDIAN
136eed0eabdSPaul Burton	select SYS_SUPPORTS_MICROMIPS
137eed0eabdSPaul Burton	select SYS_SUPPORTS_MIPS16
13834c01e41SAlexander Lobakin	select SYS_SUPPORTS_MIPS_CPS
139eed0eabdSPaul Burton	select SYS_SUPPORTS_MULTITHREADING
140eed0eabdSPaul Burton	select SYS_SUPPORTS_RELOCATABLE
141eed0eabdSPaul Burton	select SYS_SUPPORTS_SMARTMIPS
14234c01e41SAlexander Lobakin	select UHI_BOOT
1432e6522c5SCorentin Labbe	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
1442e6522c5SCorentin Labbe	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1452e6522c5SCorentin Labbe	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
1462e6522c5SCorentin Labbe	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1472e6522c5SCorentin Labbe	select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
1482e6522c5SCorentin Labbe	select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
149eed0eabdSPaul Burton	select USE_OF
150eed0eabdSPaul Burton	help
151eed0eabdSPaul Burton	  Select this to build a kernel which aims to support multiple boards,
152eed0eabdSPaul Burton	  generally using a flattened device tree passed from the bootloader
153eed0eabdSPaul Burton	  using the boot protocol defined in the UHI (Unified Hosting
154eed0eabdSPaul Burton	  Interface) specification.
155eed0eabdSPaul Burton
15642a4f17dSManuel Laussconfig MIPS_ALCHEMY
157c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
158d4a451d5SChristoph Hellwig	select PHYS_ADDR_T_64BIT
159f772cdb2SRalf Baechle	select CEVT_R4K
160d7ea335cSSteven J. Hill	select CSRC_R4K
16167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
16288e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
163*d3991572SChristoph Hellwig	select MIPS_FIXUP_BIGPHYS_ADDR if PCI
16442a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
16542a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
16642a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
167d30a2b47SLinus Walleij	select GPIOLIB
1681b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
16947440229SManuel Lauss	select COMMON_CLK
1701da177e4SLinus Torvalds
1717ca5dc14SFlorian Fainelliconfig AR7
1727ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
1737ca5dc14SFlorian Fainelli	select BOOT_ELF32
1747ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
1757ca5dc14SFlorian Fainelli	select CEVT_R4K
1767ca5dc14SFlorian Fainelli	select CSRC_R4K
17767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1787ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
1797ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
1807ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
1817ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
1827ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
1837ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
184377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1851b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
186d30a2b47SLinus Walleij	select GPIOLIB
1877ca5dc14SFlorian Fainelli	select VLYNQ
1888551fb64SYoichi Yuasa	select HAVE_CLK
1897ca5dc14SFlorian Fainelli	help
1907ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
1917ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
1927ca5dc14SFlorian Fainelli
19343cc739fSSergey Ryazanovconfig ATH25
19443cc739fSSergey Ryazanov	bool "Atheros AR231x/AR531x SoC support"
19543cc739fSSergey Ryazanov	select CEVT_R4K
19643cc739fSSergey Ryazanov	select CSRC_R4K
19743cc739fSSergey Ryazanov	select DMA_NONCOHERENT
19867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1991753e74eSSergey Ryazanov	select IRQ_DOMAIN
20043cc739fSSergey Ryazanov	select SYS_HAS_CPU_MIPS32_R1
20143cc739fSSergey Ryazanov	select SYS_SUPPORTS_BIG_ENDIAN
20243cc739fSSergey Ryazanov	select SYS_SUPPORTS_32BIT_KERNEL
2038aaa7278SSergey Ryazanov	select SYS_HAS_EARLY_PRINTK
20443cc739fSSergey Ryazanov	help
20543cc739fSSergey Ryazanov	  Support for Atheros AR231x and Atheros AR531x based boards
20643cc739fSSergey Ryazanov
207d4a67d9dSGabor Juhosconfig ATH79
208d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
209ff591a91SAlban Bedel	select ARCH_HAS_RESET_CONTROLLER
210d4a67d9dSGabor Juhos	select BOOT_RAW
211d4a67d9dSGabor Juhos	select CEVT_R4K
212d4a67d9dSGabor Juhos	select CSRC_R4K
213d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
214d30a2b47SLinus Walleij	select GPIOLIB
215a08227a2SJohn Crispin	select PINCTRL
21694638067SGabor Juhos	select HAVE_CLK
217411520afSAlban Bedel	select COMMON_CLK
2182c4f1ac5SGabor Juhos	select CLKDEV_LOOKUP
21967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
220d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
221d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
222d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
223d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
224377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
225b3f0a250SAlban Bedel	select SYS_SUPPORTS_ZBOOT_UART_PROM
22603c8c407SAlban Bedel	select USE_OF
22753d473fcSAlban Bedel	select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
228d4a67d9dSGabor Juhos	help
229d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
230d4a67d9dSGabor Juhos
2315f2d4459SKevin Cernekeeconfig BMIPS_GENERIC
2325f2d4459SKevin Cernekee	bool "Broadcom Generic BMIPS kernel"
233d59098a0SChristoph Hellwig	select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
234d59098a0SChristoph Hellwig	select ARCH_HAS_PHYS_TO_DMA
235d666cd02SKevin Cernekee	select BOOT_RAW
236d666cd02SKevin Cernekee	select NO_EXCEPT_FILL
237d666cd02SKevin Cernekee	select USE_OF
238d666cd02SKevin Cernekee	select CEVT_R4K
239d666cd02SKevin Cernekee	select CSRC_R4K
240d666cd02SKevin Cernekee	select SYNC_R4K
241d666cd02SKevin Cernekee	select COMMON_CLK
242c7c42ec2SSimon Arlott	select BCM6345_L1_IRQ
24360b858f2SKevin Cernekee	select BCM7038_L1_IRQ
24460b858f2SKevin Cernekee	select BCM7120_L2_IRQ
24560b858f2SKevin Cernekee	select BRCMSTB_L2_IRQ
24667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
24760b858f2SKevin Cernekee	select DMA_NONCOHERENT
248d666cd02SKevin Cernekee	select SYS_SUPPORTS_32BIT_KERNEL
24960b858f2SKevin Cernekee	select SYS_SUPPORTS_LITTLE_ENDIAN
250d666cd02SKevin Cernekee	select SYS_SUPPORTS_BIG_ENDIAN
251d666cd02SKevin Cernekee	select SYS_SUPPORTS_HIGHMEM
25260b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS32_3300
25360b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4350
25460b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4380
255d666cd02SKevin Cernekee	select SYS_HAS_CPU_BMIPS5000
256d666cd02SKevin Cernekee	select SWAP_IO_SPACE
25760b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
25860b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
25960b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
26060b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
2614dc4704cSJustin Chen	select HARDIRQS_SW_RESEND
262d666cd02SKevin Cernekee	help
2635f2d4459SKevin Cernekee	  Build a generic DT-based kernel image that boots on select
2645f2d4459SKevin Cernekee	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
2655f2d4459SKevin Cernekee	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
2665f2d4459SKevin Cernekee	  must be set appropriately for your board.
267d666cd02SKevin Cernekee
2681c0c13ebSAurelien Jarnoconfig BCM47XX
269c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
270fe08f8c2SHauke Mehrtens	select BOOT_RAW
27142f77542SRalf Baechle	select CEVT_R4K
272940f6b48SRalf Baechle	select CSRC_R4K
2731c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
274eb01d42aSChristoph Hellwig	select HAVE_PCI
27567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
276314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
277dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
2781c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
2791c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
280377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
2816507831fSAaro Koskinen	select SYS_SUPPORTS_ZBOOT
28225e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
283e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
284c949c0bcSRafał Miłecki	select GPIOLIB
285c949c0bcSRafał Miłecki	select LEDS_GPIO_REGISTER
286f6e734a8SRafał Miłecki	select BCM47XX_NVRAM
2872ab71a02SRafał Miłecki	select BCM47XX_SPROM
288dfe00495SMatt Redfearn	select BCM47XX_SSB if !BCM47XX_BCMA
2891c0c13ebSAurelien Jarno	help
2901c0c13ebSAurelien Jarno	  Support for BCM47XX based boards
2911c0c13ebSAurelien Jarno
292e7300d04SMaxime Bizonconfig BCM63XX
293e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
294ae8de61cSFlorian Fainelli	select BOOT_RAW
295e7300d04SMaxime Bizon	select CEVT_R4K
296e7300d04SMaxime Bizon	select CSRC_R4K
297fc264022SJonas Gorski	select SYNC_R4K
298e7300d04SMaxime Bizon	select DMA_NONCOHERENT
29967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
300e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
301e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
302e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
303e7300d04SMaxime Bizon	select SWAP_IO_SPACE
304d30a2b47SLinus Walleij	select GPIOLIB
3053e82eeebSYoichi Yuasa	select HAVE_CLK
306af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
307c5af3c2dSJonas Gorski	select CLKDEV_LOOKUP
308e7300d04SMaxime Bizon	help
309e7300d04SMaxime Bizon	  Support for BCM63XX based boards
310e7300d04SMaxime Bizon
3111da177e4SLinus Torvaldsconfig MIPS_COBALT
3123fa986faSMartin Michlmayr	bool "Cobalt Server"
31342f77542SRalf Baechle	select CEVT_R4K
314940f6b48SRalf Baechle	select CSRC_R4K
3151097c6acSYoichi Yuasa	select CEVT_GT641XX
3161da177e4SLinus Torvalds	select DMA_NONCOHERENT
317eb01d42aSChristoph Hellwig	select FORCE_PCI
318d865bea4SRalf Baechle	select I8253
3191da177e4SLinus Torvalds	select I8259
32067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
321d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
322252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
3237cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
3240a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
325ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
3260e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
3275e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
328e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
3291da177e4SLinus Torvalds
3301da177e4SLinus Torvaldsconfig MACH_DECSTATION
3313fa986faSMartin Michlmayr	bool "DECstations"
3321da177e4SLinus Torvalds	select BOOT_ELF32
3336457d9fcSYoichi Yuasa	select CEVT_DS1287
33481d10badSMaciej W. Rozycki	select CEVT_R4K if CPU_R4X00
3354247417dSYoichi Yuasa	select CSRC_IOASIC
33681d10badSMaciej W. Rozycki	select CSRC_R4K if CPU_R4X00
33720d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
33820d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
33920d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
3401da177e4SLinus Torvalds	select DMA_NONCOHERENT
341ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
34267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3437cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
3447cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
345ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
3467d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
3475e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
3481723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
3491723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
3501723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
351930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
3525e83d430SRalf Baechle	help
3531da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
3541da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
3551da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
3561da177e4SLinus Torvalds
3571da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
3581da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
3591da177e4SLinus Torvalds
3601da177e4SLinus Torvalds		DECstation 5000/50
3611da177e4SLinus Torvalds		DECstation 5000/150
3621da177e4SLinus Torvalds		DECstation 5000/260
3631da177e4SLinus Torvalds		DECsystem 5900/260
3641da177e4SLinus Torvalds
3651da177e4SLinus Torvalds	  otherwise choose R3000.
3661da177e4SLinus Torvalds
3675e83d430SRalf Baechleconfig MACH_JAZZ
3683fa986faSMartin Michlmayr	bool "Jazz family of machines"
36939b2d756SThomas Bogendoerfer	select ARC_MEMORY
37039b2d756SThomas Bogendoerfer	select ARC_PROMLIB
371a211a082SRalf Baechle	select ARCH_MIGHT_HAVE_PC_PARPORT
3727a407aa5SRalf Baechle	select ARCH_MIGHT_HAVE_PC_SERIO
3730e2794b0SRalf Baechle	select FW_ARC
3740e2794b0SRalf Baechle	select FW_ARC32
3755e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
37642f77542SRalf Baechle	select CEVT_R4K
377940f6b48SRalf Baechle	select CSRC_R4K
378e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
3795e83d430SRalf Baechle	select GENERIC_ISA_DMA
3808a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
38167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
382d865bea4SRalf Baechle	select I8253
3835e83d430SRalf Baechle	select I8259
3845e83d430SRalf Baechle	select ISA
3857cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
3865e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
3877d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
3881723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
3891da177e4SLinus Torvalds	help
3905e83d430SRalf Baechle	  This a family of machines based on the MIPS R4030 chipset which was
3915e83d430SRalf Baechle	  used by several vendors to build RISC/os and Windows NT workstations.
392692105b8SMatt LaPlante	  Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
3935e83d430SRalf Baechle	  Olivetti M700-10 workstations.
3945e83d430SRalf Baechle
395de361e8bSPaul Burtonconfig MACH_INGENIC
396de361e8bSPaul Burton	bool "Ingenic SoC based machines"
3975ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
3985ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
399f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
400b35d2653SDaniel Silsby	select CPU_SUPPORTS_HUGEPAGES
4015ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
40267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
40337b4c3caSPaul Cercueil	select PINCTRL
404d30a2b47SLinus Walleij	select GPIOLIB
405ff1930c6SPaul Burton	select COMMON_CLK
40683bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
40715205fc0SPaul Cercueil	select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
408ffb1843dSPaul Burton	select USE_OF
4095ebabe59SLars-Peter Clausen
410171bb2f1SJohn Crispinconfig LANTIQ
411171bb2f1SJohn Crispin	bool "Lantiq based platforms"
412171bb2f1SJohn Crispin	select DMA_NONCOHERENT
41367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
414171bb2f1SJohn Crispin	select CEVT_R4K
415171bb2f1SJohn Crispin	select CSRC_R4K
416171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
417171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
418171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
419171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
420377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
421171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
422f35764e7SJames Hogan	select SYS_SUPPORTS_VPE_LOADER
423171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
424d30a2b47SLinus Walleij	select GPIOLIB
425171bb2f1SJohn Crispin	select SWAP_IO_SPACE
426171bb2f1SJohn Crispin	select BOOT_RAW
427287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
428a0392222SJohn Crispin	select USE_OF
4293f8c50c9SJohn Crispin	select PINCTRL
4303f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
431c530781cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
432c530781cSJohn Crispin	select RESET_CONTROLLER
433171bb2f1SJohn Crispin
4341f21d2bdSBrian Murphyconfig LASAT
4351f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
43642f77542SRalf Baechle	select CEVT_R4K
43716f0bbbcSRalf Baechle	select CRC32
438940f6b48SRalf Baechle	select CSRC_R4K
4391f21d2bdSBrian Murphy	select DMA_NONCOHERENT
4401f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
441eb01d42aSChristoph Hellwig	select HAVE_PCI
44267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4431f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
4441f21d2bdSBrian Murphy	select MIPS_NILE4
4451f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
4461f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
4471f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
4481f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
4491f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
4501f21d2bdSBrian Murphy
45130ad29bbSHuacai Chenconfig MACH_LOONGSON32
452caed1d1bSHuacai Chen	bool "Loongson 32-bit family of machines"
453c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
454ade299d8SYoichi Yuasa	help
45530ad29bbSHuacai Chen	  This enables support for the Loongson-1 family of machines.
45685749d24SWu Zhangjin
45730ad29bbSHuacai Chen	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
45830ad29bbSHuacai Chen	  the Institute of Computing Technology (ICT), Chinese Academy of
45930ad29bbSHuacai Chen	  Sciences (CAS).
460ade299d8SYoichi Yuasa
46171e2f4ddSJiaxun Yangconfig MACH_LOONGSON2EF
46271e2f4ddSJiaxun Yang	bool "Loongson-2E/F family of machines"
463ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
464ca585cf9SKelvin Cheung	help
46571e2f4ddSJiaxun Yang	  This enables the support of early Loongson-2E/F family of machines.
466ca585cf9SKelvin Cheung
46771e2f4ddSJiaxun Yangconfig MACH_LOONGSON64
468caed1d1bSHuacai Chen	bool "Loongson 64-bit family of machines"
4696fbde6b4SJiaxun Yang	select ARCH_SPARSEMEM_ENABLE
4706fbde6b4SJiaxun Yang	select ARCH_MIGHT_HAVE_PC_PARPORT
4716fbde6b4SJiaxun Yang	select ARCH_MIGHT_HAVE_PC_SERIO
4726fbde6b4SJiaxun Yang	select GENERIC_ISA_DMA_SUPPORT_BROKEN
4736fbde6b4SJiaxun Yang	select BOOT_ELF32
4746fbde6b4SJiaxun Yang	select BOARD_SCACHE
4756fbde6b4SJiaxun Yang	select CSRC_R4K
4766fbde6b4SJiaxun Yang	select CEVT_R4K
4776fbde6b4SJiaxun Yang	select CPU_HAS_WB
4786fbde6b4SJiaxun Yang	select FORCE_PCI
4796fbde6b4SJiaxun Yang	select ISA
4806fbde6b4SJiaxun Yang	select I8259
4816fbde6b4SJiaxun Yang	select IRQ_MIPS_CPU
4825125bfeeSTiezhu Yang	select NR_CPUS_DEFAULT_64
4836fbde6b4SJiaxun Yang	select USE_GENERIC_EARLY_PRINTK_8250
4846fbde6b4SJiaxun Yang	select SYS_HAS_CPU_LOONGSON64
4856fbde6b4SJiaxun Yang	select SYS_HAS_EARLY_PRINTK
4866fbde6b4SJiaxun Yang	select SYS_SUPPORTS_SMP
4876fbde6b4SJiaxun Yang	select SYS_SUPPORTS_HOTPLUG_CPU
4886fbde6b4SJiaxun Yang	select SYS_SUPPORTS_NUMA
4896fbde6b4SJiaxun Yang	select SYS_SUPPORTS_64BIT_KERNEL
4906fbde6b4SJiaxun Yang	select SYS_SUPPORTS_HIGHMEM
4916fbde6b4SJiaxun Yang	select SYS_SUPPORTS_LITTLE_ENDIAN
49271e2f4ddSJiaxun Yang	select SYS_SUPPORTS_ZBOOT
4936fbde6b4SJiaxun Yang	select ZONE_DMA32
4946fbde6b4SJiaxun Yang	select NUMA
49587fcfa7bSJiaxun Yang	select COMMON_CLK
49687fcfa7bSJiaxun Yang	select USE_OF
49787fcfa7bSJiaxun Yang	select BUILTIN_DTB
49871e2f4ddSJiaxun Yang	help
499caed1d1bSHuacai Chen	  This enables the support of Loongson-2/3 family of machines.
500caed1d1bSHuacai Chen
501caed1d1bSHuacai Chen	  Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
502caed1d1bSHuacai Chen	  GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
503caed1d1bSHuacai Chen	  and Loongson-2F which will be removed), developed by the Institute
504caed1d1bSHuacai Chen	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
505ca585cf9SKelvin Cheung
5066a438309SAndrew Brestickerconfig MACH_PISTACHIO
5076a438309SAndrew Bresticker	bool "IMG Pistachio SoC based boards"
5086a438309SAndrew Bresticker	select BOOT_ELF32
5096a438309SAndrew Bresticker	select BOOT_RAW
5106a438309SAndrew Bresticker	select CEVT_R4K
5116a438309SAndrew Bresticker	select CLKSRC_MIPS_GIC
5126a438309SAndrew Bresticker	select COMMON_CLK
5136a438309SAndrew Bresticker	select CSRC_R4K
514645c7827SZubair Lutfullah Kakakhel	select DMA_NONCOHERENT
515d30a2b47SLinus Walleij	select GPIOLIB
51667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5176a438309SAndrew Bresticker	select MFD_SYSCON
5186a438309SAndrew Bresticker	select MIPS_CPU_SCACHE
5196a438309SAndrew Bresticker	select MIPS_GIC
5206a438309SAndrew Bresticker	select PINCTRL
5216a438309SAndrew Bresticker	select REGULATOR
5226a438309SAndrew Bresticker	select SYS_HAS_CPU_MIPS32_R2
5236a438309SAndrew Bresticker	select SYS_SUPPORTS_32BIT_KERNEL
5246a438309SAndrew Bresticker	select SYS_SUPPORTS_LITTLE_ENDIAN
5256a438309SAndrew Bresticker	select SYS_SUPPORTS_MIPS_CPS
5266a438309SAndrew Bresticker	select SYS_SUPPORTS_MULTITHREADING
52741cc07beSMatt Redfearn	select SYS_SUPPORTS_RELOCATABLE
5286a438309SAndrew Bresticker	select SYS_SUPPORTS_ZBOOT
529018f62eeSEzequiel Garcia	select SYS_HAS_EARLY_PRINTK
530018f62eeSEzequiel Garcia	select USE_GENERIC_EARLY_PRINTK_8250
5316a438309SAndrew Bresticker	select USE_OF
5326a438309SAndrew Bresticker	help
5336a438309SAndrew Bresticker	  This enables support for the IMG Pistachio SoC platform.
5346a438309SAndrew Bresticker
5351da177e4SLinus Torvaldsconfig MIPS_MALTA
5363fa986faSMartin Michlmayr	bool "MIPS Malta board"
53761ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
538a211a082SRalf Baechle	select ARCH_MIGHT_HAVE_PC_PARPORT
5397a407aa5SRalf Baechle	select ARCH_MIGHT_HAVE_PC_SERIO
5401da177e4SLinus Torvalds	select BOOT_ELF32
541fa71c960SRalf Baechle	select BOOT_RAW
542e8823d26SPaul Burton	select BUILTIN_DTB
54342f77542SRalf Baechle	select CEVT_R4K
544fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
54542b002abSGuenter Roeck	select COMMON_CLK
54647bf2b03SMaksym Kokhan	select CSRC_R4K
547885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
5481da177e4SLinus Torvalds	select GENERIC_ISA_DMA
5498a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
550eb01d42aSChristoph Hellwig	select HAVE_PCI
551d865bea4SRalf Baechle	select I8253
5521da177e4SLinus Torvalds	select I8259
55347bf2b03SMaksym Kokhan	select IRQ_MIPS_CPU
5545e83d430SRalf Baechle	select MIPS_BONITO64
5559318c51aSChris Dearman	select MIPS_CPU_SCACHE
55647bf2b03SMaksym Kokhan	select MIPS_GIC
557a7ef1eadSKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
5585e83d430SRalf Baechle	select MIPS_MSC
55947bf2b03SMaksym Kokhan	select PCI_GT64XXX_PCI0
560ecafe3e9SPaul Burton	select SMP_UP if SMP
5611da177e4SLinus Torvalds	select SWAP_IO_SPACE
5627cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
5637cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
564bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
565c5b36783SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R5
566575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R6
5677cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
5685d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
569575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS64_R6
5707cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
5717cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
572ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
573ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
5745e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
575c5b36783SSteven J. Hill	select SYS_SUPPORTS_HIGHMEM
5765e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
577424ebcdfSMaciej W. Rozycki	select SYS_SUPPORTS_MICROMIPS
57847bf2b03SMaksym Kokhan	select SYS_SUPPORTS_MIPS16
5790365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
580e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
581f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
58247bf2b03SMaksym Kokhan	select SYS_SUPPORTS_RELOCATABLE
5839693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
584f35764e7SJames Hogan	select SYS_SUPPORTS_VPE_LOADER
5851b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
586e8823d26SPaul Burton	select USE_OF
587abcc82b1SJames Hogan	select ZONE_DMA32 if 64BIT
5881da177e4SLinus Torvalds	help
589f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
5901da177e4SLinus Torvalds	  board.
5911da177e4SLinus Torvalds
5922572f00dSJoshua Hendersonconfig MACH_PIC32
5932572f00dSJoshua Henderson	bool "Microchip PIC32 Family"
5942572f00dSJoshua Henderson	help
5952572f00dSJoshua Henderson	  This enables support for the Microchip PIC32 family of platforms.
5962572f00dSJoshua Henderson
5972572f00dSJoshua Henderson	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
5982572f00dSJoshua Henderson	  microcontrollers.
5992572f00dSJoshua Henderson
600a83860c2SRalf Baechleconfig NEC_MARKEINS
601a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
602a83860c2SRalf Baechle	select SOC_EMMA2RH
603eb01d42aSChristoph Hellwig	select HAVE_PCI
604a83860c2SRalf Baechle	help
605a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
606ade299d8SYoichi Yuasa
6075e83d430SRalf Baechleconfig MACH_VR41XX
60874142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
60942f77542SRalf Baechle	select CEVT_R4K
610940f6b48SRalf Baechle	select CSRC_R4K
6117cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
612377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
613d30a2b47SLinus Walleij	select GPIOLIB
6145e83d430SRalf Baechle
615edb6310aSDaniel Lairdconfig NXP_STB220
616edb6310aSDaniel Laird	bool "NXP STB220 board"
617edb6310aSDaniel Laird	select SOC_PNX833X
618edb6310aSDaniel Laird	help
619edb6310aSDaniel Laird	  Support for NXP Semiconductors STB220 Development Board.
620edb6310aSDaniel Laird
621edb6310aSDaniel Lairdconfig NXP_STB225
622edb6310aSDaniel Laird	bool "NXP 225 board"
623edb6310aSDaniel Laird	select SOC_PNX833X
624edb6310aSDaniel Laird	select SOC_PNX8335
625edb6310aSDaniel Laird	help
626edb6310aSDaniel Laird	  Support for NXP Semiconductors STB225 Development Board.
627edb6310aSDaniel Laird
6289267a30dSMarc St-Jeanconfig PMC_MSP
6299267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
63039d30c13SAnoop P A	select CEVT_R4K
63139d30c13SAnoop P A	select CSRC_R4K
6329267a30dSMarc St-Jean	select DMA_NONCOHERENT
6339267a30dSMarc St-Jean	select SWAP_IO_SPACE
6349267a30dSMarc St-Jean	select NO_EXCEPT_FILL
6359267a30dSMarc St-Jean	select BOOT_RAW
6369267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
6379267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
6389267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
6399267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
640377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
64167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
6429267a30dSMarc St-Jean	select SERIAL_8250
6439267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
6449296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
6459296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
6469267a30dSMarc St-Jean	help
6479267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
6489267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
6499267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
6509267a30dSMarc St-Jean	  a variety of MIPS cores.
6519267a30dSMarc St-Jean
652ae2b5bb6SJohn Crispinconfig RALINK
653ae2b5bb6SJohn Crispin	bool "Ralink based machines"
654ae2b5bb6SJohn Crispin	select CEVT_R4K
655ae2b5bb6SJohn Crispin	select CSRC_R4K
656ae2b5bb6SJohn Crispin	select BOOT_RAW
657ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
65867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
659ae2b5bb6SJohn Crispin	select USE_OF
660ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
661ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
662ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
663ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
664377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
665ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
666ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
6672a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
6682a153f1cSJohn Crispin	select RESET_CONTROLLER
669ae2b5bb6SJohn Crispin
6701da177e4SLinus Torvaldsconfig SGI_IP22
6713fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
672c0de00b2SThomas Bogendoerfer	select ARC_MEMORY
67339b2d756SThomas Bogendoerfer	select ARC_PROMLIB
6740e2794b0SRalf Baechle	select FW_ARC
6750e2794b0SRalf Baechle	select FW_ARC32
6767a407aa5SRalf Baechle	select ARCH_MIGHT_HAVE_PC_SERIO
6771da177e4SLinus Torvalds	select BOOT_ELF32
67842f77542SRalf Baechle	select CEVT_R4K
679940f6b48SRalf Baechle	select CSRC_R4K
680e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
6811da177e4SLinus Torvalds	select DMA_NONCOHERENT
6826630a8e5SChristoph Hellwig	select HAVE_EISA
683d865bea4SRalf Baechle	select I8253
68468de4803SThomas Bogendoerfer	select I8259
6851da177e4SLinus Torvalds	select IP22_CPU_SCACHE
68667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
687aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
688e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
689e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
69036e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
691e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
692e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
693e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
6941da177e4SLinus Torvalds	select SWAP_IO_SPACE
6957cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
6967cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
697c0de00b2SThomas Bogendoerfer	select SYS_HAS_EARLY_PRINTK
698ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
699ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
7005e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
701930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
7021da177e4SLinus Torvalds	help
7031da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
7041da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
7051da177e4SLinus Torvalds	  that runs on these, say Y here.
7061da177e4SLinus Torvalds
7071da177e4SLinus Torvaldsconfig SGI_IP27
7083fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
70954aed4ddSChristoph Hellwig	select ARCH_HAS_PHYS_TO_DMA
710397dc00eSMike Rapoport	select ARCH_SPARSEMEM_ENABLE
7110e2794b0SRalf Baechle	select FW_ARC
7120e2794b0SRalf Baechle	select FW_ARC64
713e9422427SThomas Bogendoerfer	select ARC_CMDLINE_ONLY
7145e83d430SRalf Baechle	select BOOT_ELF64
715e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
71636a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
717eb01d42aSChristoph Hellwig	select HAVE_PCI
71869a07a41SThomas Bogendoerfer	select IRQ_MIPS_CPU
719e6308b6dSThomas Bogendoerfer	select IRQ_DOMAIN_HIERARCHY
720130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
721a57140e9SThomas Bogendoerfer	select PCI_DRIVERS_GENERIC
722a57140e9SThomas Bogendoerfer	select PCI_XTALK_BRIDGE
7237cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
724ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
7255e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
726d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
7271a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
728930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
7291da177e4SLinus Torvalds	help
7301da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
7311da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
7321da177e4SLinus Torvalds	  here.
7331da177e4SLinus Torvalds
734e2defae5SThomas Bogendoerferconfig SGI_IP28
7357d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
736c0de00b2SThomas Bogendoerfer	select ARC_MEMORY
73739b2d756SThomas Bogendoerfer	select ARC_PROMLIB
7380e2794b0SRalf Baechle	select FW_ARC
7390e2794b0SRalf Baechle	select FW_ARC64
7407a407aa5SRalf Baechle	select ARCH_MIGHT_HAVE_PC_SERIO
741e2defae5SThomas Bogendoerfer	select BOOT_ELF64
742e2defae5SThomas Bogendoerfer	select CEVT_R4K
743e2defae5SThomas Bogendoerfer	select CSRC_R4K
744e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
745e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
746e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
74767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7486630a8e5SChristoph Hellwig	select HAVE_EISA
749e2defae5SThomas Bogendoerfer	select I8253
750e2defae5SThomas Bogendoerfer	select I8259
751e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
752e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
7535b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
754e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
755e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
756e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
757e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
758e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
759c0de00b2SThomas Bogendoerfer	select SYS_HAS_EARLY_PRINTK
760e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
761e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
762dc24d68dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
763e2defae5SThomas Bogendoerfer	help
764e2defae5SThomas Bogendoerfer	  This is the SGI Indigo2 with R10000 processor.  To compile a Linux
765e2defae5SThomas Bogendoerfer	  kernel that runs on these, say Y here.
766e2defae5SThomas Bogendoerfer
7677505576dSThomas Bogendoerferconfig SGI_IP30
7687505576dSThomas Bogendoerfer	bool "SGI IP30 (Octane/Octane2)"
7697505576dSThomas Bogendoerfer	select ARCH_HAS_PHYS_TO_DMA
7707505576dSThomas Bogendoerfer	select FW_ARC
7717505576dSThomas Bogendoerfer	select FW_ARC64
7727505576dSThomas Bogendoerfer	select BOOT_ELF64
7737505576dSThomas Bogendoerfer	select CEVT_R4K
7747505576dSThomas Bogendoerfer	select CSRC_R4K
7757505576dSThomas Bogendoerfer	select SYNC_R4K if SMP
7767505576dSThomas Bogendoerfer	select ZONE_DMA32
7777505576dSThomas Bogendoerfer	select HAVE_PCI
7787505576dSThomas Bogendoerfer	select IRQ_MIPS_CPU
7797505576dSThomas Bogendoerfer	select IRQ_DOMAIN_HIERARCHY
7807505576dSThomas Bogendoerfer	select NR_CPUS_DEFAULT_2
7817505576dSThomas Bogendoerfer	select PCI_DRIVERS_GENERIC
7827505576dSThomas Bogendoerfer	select PCI_XTALK_BRIDGE
7837505576dSThomas Bogendoerfer	select SYS_HAS_EARLY_PRINTK
7847505576dSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
7857505576dSThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
7867505576dSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
7877505576dSThomas Bogendoerfer	select SYS_SUPPORTS_SMP
7887505576dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
7897505576dSThomas Bogendoerfer	select ARC_MEMORY
7907505576dSThomas Bogendoerfer	help
7917505576dSThomas Bogendoerfer	  These are the SGI Octane and Octane2 graphics workstations.  To
7927505576dSThomas Bogendoerfer	  compile a Linux kernel that runs on these, say Y here.
7937505576dSThomas Bogendoerfer
7941da177e4SLinus Torvaldsconfig SGI_IP32
795cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
79639b2d756SThomas Bogendoerfer	select ARC_MEMORY
79739b2d756SThomas Bogendoerfer	select ARC_PROMLIB
79803df8229SChristoph Hellwig	select ARCH_HAS_PHYS_TO_DMA
7990e2794b0SRalf Baechle	select FW_ARC
8000e2794b0SRalf Baechle	select FW_ARC32
8011da177e4SLinus Torvalds	select BOOT_ELF32
80242f77542SRalf Baechle	select CEVT_R4K
803940f6b48SRalf Baechle	select CSRC_R4K
8041da177e4SLinus Torvalds	select DMA_NONCOHERENT
805eb01d42aSChristoph Hellwig	select HAVE_PCI
80667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
8071da177e4SLinus Torvalds	select R5000_CPU_SCACHE
8081da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
8097cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
8107cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
8117cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
812dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
813ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
8145e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
8151da177e4SLinus Torvalds	help
8161da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
8171da177e4SLinus Torvalds
818ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
819ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
8205e83d430SRalf Baechle	select BOOT_ELF32
8215e83d430SRalf Baechle	select SIBYTE_BCM1120
8225e83d430SRalf Baechle	select SWAP_IO_SPACE
8237cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
8245e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
8255e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
8265e83d430SRalf Baechle
827ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
828ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
8295e83d430SRalf Baechle	select BOOT_ELF32
8305e83d430SRalf Baechle	select SIBYTE_BCM1120
8315e83d430SRalf Baechle	select SWAP_IO_SPACE
8327cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
8335e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
8345e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
8355e83d430SRalf Baechle
8365e83d430SRalf Baechleconfig SIBYTE_CRHONE
8373fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
8385e83d430SRalf Baechle	select BOOT_ELF32
8395e83d430SRalf Baechle	select SIBYTE_BCM1125
8405e83d430SRalf Baechle	select SWAP_IO_SPACE
8417cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
8425e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
8435e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
8445e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
8455e83d430SRalf Baechle
846ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
847ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
848ade299d8SYoichi Yuasa	select BOOT_ELF32
849ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
850ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
851ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
852ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
853ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
854ade299d8SYoichi Yuasa
855ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
856ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
857ade299d8SYoichi Yuasa	select BOOT_ELF32
858fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
859ade299d8SYoichi Yuasa	select SIBYTE_SB1250
860ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
861ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
862ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
863ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
864ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
865cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
866e4849affSMaciej W. Rozycki	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
867ade299d8SYoichi Yuasa
868ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
869ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
870ade299d8SYoichi Yuasa	select BOOT_ELF32
871fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
872ade299d8SYoichi Yuasa	select SIBYTE_SB1250
873ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
874ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
875ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
876ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
877ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
878756d6d83SMaciej W. Rozycki	select ZONE_DMA32 if 64BIT
879ade299d8SYoichi Yuasa
880ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
881ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
882ade299d8SYoichi Yuasa	select BOOT_ELF32
883ade299d8SYoichi Yuasa	select SIBYTE_SB1250
884ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
885ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
886ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
887ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
888e4849affSMaciej W. Rozycki	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
889ade299d8SYoichi Yuasa
890ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
891ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
892ade299d8SYoichi Yuasa	select BOOT_ELF32
893ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
894ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
895ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
896ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
897ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
898651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
899ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
900cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
901e4849affSMaciej W. Rozycki	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
902ade299d8SYoichi Yuasa
90314b36af4SThomas Bogendoerferconfig SNI_RM
90414b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
90539b2d756SThomas Bogendoerfer	select ARC_MEMORY
90639b2d756SThomas Bogendoerfer	select ARC_PROMLIB
9070e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
9080e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
909aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
9105e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
911a211a082SRalf Baechle	select ARCH_MIGHT_HAVE_PC_PARPORT
9127a407aa5SRalf Baechle	select ARCH_MIGHT_HAVE_PC_SERIO
9135e83d430SRalf Baechle	select BOOT_ELF32
91442f77542SRalf Baechle	select CEVT_R4K
915940f6b48SRalf Baechle	select CSRC_R4K
916e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
9175e83d430SRalf Baechle	select DMA_NONCOHERENT
9185e83d430SRalf Baechle	select GENERIC_ISA_DMA
9196630a8e5SChristoph Hellwig	select HAVE_EISA
9208a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
921eb01d42aSChristoph Hellwig	select HAVE_PCI
92267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
923d865bea4SRalf Baechle	select I8253
9245e83d430SRalf Baechle	select I8259
9255e83d430SRalf Baechle	select ISA
9264a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
9277cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
9284a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
929c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
9304a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
93136a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
932ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
9337d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
9344a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
9355e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
9365e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
9371da177e4SLinus Torvalds	help
93814b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
93914b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
9405e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
9415e83d430SRalf Baechle	  support this machine type.
9421da177e4SLinus Torvalds
943edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
944edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
9455e83d430SRalf Baechle
946edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
947edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
94823fbee9dSRalf Baechle
94973b4390fSRalf Baechleconfig MIKROTIK_RB532
95073b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
95173b4390fSRalf Baechle	select CEVT_R4K
95273b4390fSRalf Baechle	select CSRC_R4K
95373b4390fSRalf Baechle	select DMA_NONCOHERENT
954eb01d42aSChristoph Hellwig	select HAVE_PCI
95567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
95673b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
95773b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
95873b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
95973b4390fSRalf Baechle	select SWAP_IO_SPACE
96073b4390fSRalf Baechle	select BOOT_RAW
961d30a2b47SLinus Walleij	select GPIOLIB
962930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
96373b4390fSRalf Baechle	help
96473b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
96573b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
96673b4390fSRalf Baechle
9679ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
9689ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
969a86c7f72SDavid Daney	select CEVT_R4K
970ea8c64acSChristoph Hellwig	select ARCH_HAS_PHYS_TO_DMA
9711753d50cSChristoph Hellwig	select HAVE_RAPIDIO
972d4a451d5SChristoph Hellwig	select PHYS_ADDR_T_64BIT
973a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
974a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
975f65aad41SRalf Baechle	select EDAC_SUPPORT
976b01aec9bSBorislav Petkov	select EDAC_ATOMIC_SCRUB
97773569d87SDavid Daney	select SYS_SUPPORTS_LITTLE_ENDIAN
97873569d87SDavid Daney	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
979a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
9805e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
981eb01d42aSChristoph Hellwig	select HAVE_PCI
98278bdbbacSMasahiro Yamada	select HAVE_PLAT_DELAY
98378bdbbacSMasahiro Yamada	select HAVE_PLAT_FW_INIT_CMDLINE
98478bdbbacSMasahiro Yamada	select HAVE_PLAT_MEMCPY
985f00e001eSDavid Daney	select ZONE_DMA32
986465aaed0SDavid Daney	select HOLES_IN_ZONE
987d30a2b47SLinus Walleij	select GPIOLIB
9886e511163SDavid Daney	select USE_OF
9896e511163SDavid Daney	select ARCH_SPARSEMEM_ENABLE
9906e511163SDavid Daney	select SYS_SUPPORTS_SMP
9917820b84bSDavid Daney	select NR_CPUS_DEFAULT_64
9927820b84bSDavid Daney	select MIPS_NR_CPU_NR_MAP_1024
993e326479fSAndrew Bresticker	select BUILTIN_DTB
9948c1e6b14SDavid Daney	select MTD_COMPLEX_MAPPINGS
99509230cbcSChristoph Hellwig	select SWIOTLB
9963ff72be4SSteven J. Hill	select SYS_SUPPORTS_RELOCATABLE
997a86c7f72SDavid Daney	help
998a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
999a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
1000a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
1001a86c7f72SDavid Daney	  Some of the supported boards are:
1002a86c7f72SDavid Daney		EBT3000
1003a86c7f72SDavid Daney		EBH3000
1004a86c7f72SDavid Daney		EBH3100
1005a86c7f72SDavid Daney		Thunder
1006a86c7f72SDavid Daney		Kodama
1007a86c7f72SDavid Daney		Hikari
1008a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
1009a86c7f72SDavid Daney
10107f058e85SJayachandran Cconfig NLM_XLR_BOARD
10117f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
10127f058e85SJayachandran C	select BOOT_ELF32
10137f058e85SJayachandran C	select NLM_COMMON
10147f058e85SJayachandran C	select SYS_HAS_CPU_XLR
10157f058e85SJayachandran C	select SYS_SUPPORTS_SMP
1016eb01d42aSChristoph Hellwig	select HAVE_PCI
10177f058e85SJayachandran C	select SWAP_IO_SPACE
10187f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
10197f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
1020d4a451d5SChristoph Hellwig	select PHYS_ADDR_T_64BIT
10217f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
10227f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
10237f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
10247f058e85SJayachandran C	select CEVT_R4K
10257f058e85SJayachandran C	select CSRC_R4K
102667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1027b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
10287f058e85SJayachandran C	select SYNC_R4K
10297f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
10308f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
10318f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
10327f058e85SJayachandran C	help
10337f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
10347f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
10357f058e85SJayachandran C
10361c773ea4SJayachandran Cconfig NLM_XLP_BOARD
10371c773ea4SJayachandran C	bool "Netlogic XLP based systems"
10381c773ea4SJayachandran C	select BOOT_ELF32
10391c773ea4SJayachandran C	select NLM_COMMON
10401c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
10411c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
1042eb01d42aSChristoph Hellwig	select HAVE_PCI
10431c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
10441c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
1045d4a451d5SChristoph Hellwig	select PHYS_ADDR_T_64BIT
1046d30a2b47SLinus Walleij	select GPIOLIB
10471c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
10481c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
10491c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
10501c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
10511c773ea4SJayachandran C	select CEVT_R4K
10521c773ea4SJayachandran C	select CSRC_R4K
105367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1054b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
10551c773ea4SJayachandran C	select SYNC_R4K
10561c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
10572f6528e1SJayachandran C	select USE_OF
10588f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
10598f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
10601c773ea4SJayachandran C	help
10611c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
10621c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
10631c773ea4SJayachandran C
10649bc463beSDavid Daneyconfig MIPS_PARAVIRT
10659bc463beSDavid Daney	bool "Para-Virtualized guest system"
10669bc463beSDavid Daney	select CEVT_R4K
10679bc463beSDavid Daney	select CSRC_R4K
10689bc463beSDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
10699bc463beSDavid Daney	select SYS_SUPPORTS_32BIT_KERNEL
10709bc463beSDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
10719bc463beSDavid Daney	select SYS_SUPPORTS_SMP
10729bc463beSDavid Daney	select NR_CPUS_DEFAULT_4
10739bc463beSDavid Daney	select SYS_HAS_EARLY_PRINTK
10749bc463beSDavid Daney	select SYS_HAS_CPU_MIPS32_R2
10759bc463beSDavid Daney	select SYS_HAS_CPU_MIPS64_R2
10769bc463beSDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
1077eb01d42aSChristoph Hellwig	select HAVE_PCI
10789bc463beSDavid Daney	select SWAP_IO_SPACE
10799bc463beSDavid Daney	help
10809bc463beSDavid Daney	  This option supports guest running under ????
10819bc463beSDavid Daney
10821da177e4SLinus Torvaldsendchoice
10831da177e4SLinus Torvalds
1084e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
10853b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig"
1086d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
1087a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
1088e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
10898945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig"
1090eed0eabdSPaul Burtonsource "arch/mips/generic/Kconfig"
10915e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
10925ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
10938ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
10941f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
10952572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig"
1096af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig"
10970f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
1098ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
109929c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
110038b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
110122b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
11025e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
1103a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
110471e2f4ddSJiaxun Yangsource "arch/mips/loongson2ef/Kconfig"
110530ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig"
110630ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig"
11077f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
1108ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig"
110938b18f72SRalf Baechle
11105e83d430SRalf Baechleendmenu
11115e83d430SRalf Baechle
11123c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
11133c9ee7efSAkinobu Mita	bool
11143c9ee7efSAkinobu Mita	default y
11153c9ee7efSAkinobu Mita
11161da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
11171da177e4SLinus Torvalds	bool
11181da177e4SLinus Torvalds	default y
11191da177e4SLinus Torvalds
1120ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
11211cc89038SAtsushi Nemoto	bool
11221cc89038SAtsushi Nemoto	default y
11231cc89038SAtsushi Nemoto
11241da177e4SLinus Torvalds#
11251da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
11261da177e4SLinus Torvalds#
11270e2794b0SRalf Baechleconfig FW_ARC
11281da177e4SLinus Torvalds	bool
11291da177e4SLinus Torvalds
113061ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
113161ed242dSRalf Baechle	bool
113261ed242dSRalf Baechle
11339267a30dSMarc St-Jeanconfig BOOT_RAW
11349267a30dSMarc St-Jean	bool
11359267a30dSMarc St-Jean
1136217dd11eSRalf Baechleconfig CEVT_BCM1480
1137217dd11eSRalf Baechle	bool
1138217dd11eSRalf Baechle
11396457d9fcSYoichi Yuasaconfig CEVT_DS1287
11406457d9fcSYoichi Yuasa	bool
11416457d9fcSYoichi Yuasa
11421097c6acSYoichi Yuasaconfig CEVT_GT641XX
11431097c6acSYoichi Yuasa	bool
11441097c6acSYoichi Yuasa
114542f77542SRalf Baechleconfig CEVT_R4K
114642f77542SRalf Baechle	bool
114742f77542SRalf Baechle
1148217dd11eSRalf Baechleconfig CEVT_SB1250
1149217dd11eSRalf Baechle	bool
1150217dd11eSRalf Baechle
1151229f773eSAtsushi Nemotoconfig CEVT_TXX9
1152229f773eSAtsushi Nemoto	bool
1153229f773eSAtsushi Nemoto
1154217dd11eSRalf Baechleconfig CSRC_BCM1480
1155217dd11eSRalf Baechle	bool
1156217dd11eSRalf Baechle
11574247417dSYoichi Yuasaconfig CSRC_IOASIC
11584247417dSYoichi Yuasa	bool
11594247417dSYoichi Yuasa
1160940f6b48SRalf Baechleconfig CSRC_R4K
1161940f6b48SRalf Baechle	bool
1162940f6b48SRalf Baechle
1163217dd11eSRalf Baechleconfig CSRC_SB1250
1164217dd11eSRalf Baechle	bool
1165217dd11eSRalf Baechle
1166a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL
1167a7f4df4eSAlex Smith	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1168a7f4df4eSAlex Smith
1169a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
1170d30a2b47SLinus Walleij	select GPIOLIB
1171a9aec7feSAtsushi Nemoto	bool
1172a9aec7feSAtsushi Nemoto
11730e2794b0SRalf Baechleconfig FW_CFE
1174df78b5c8SAurelien Jarno	bool
1175df78b5c8SAurelien Jarno
117640e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES
117740e084a5SRalf Baechle	bool
117840e084a5SRalf Baechle
1179885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
1180f3ecc0ffSChristoph Hellwig	select ARCH_HAS_DMA_COHERENCE_H
1181885014bcSFelix Fietkau	select DMA_NONCOHERENT
1182885014bcSFelix Fietkau	bool
1183885014bcSFelix Fietkau
118420d33064SPaul Burtonconfig DMA_PERDEV_COHERENT
118520d33064SPaul Burton	bool
1186347cb6afSChristoph Hellwig	select ARCH_HAS_SETUP_DMA_OPS
11875748e1b3SChristoph Hellwig	select DMA_NONCOHERENT
118820d33064SPaul Burton
11891da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
11901da177e4SLinus Torvalds	bool
1191db91427bSChristoph Hellwig	#
1192db91427bSChristoph Hellwig	# MIPS allows mixing "slightly different" Cacheability and Coherency
1193db91427bSChristoph Hellwig	# Attribute bits.  It is believed that the uncached access through
1194db91427bSChristoph Hellwig	# KSEG1 and the implementation specific "uncached accelerated" used
1195db91427bSChristoph Hellwig	# by pgprot_writcombine can be mixed, and the latter sometimes provides
1196db91427bSChristoph Hellwig	# significant advantages.
1197db91427bSChristoph Hellwig	#
1198419e2f18SChristoph Hellwig	select ARCH_HAS_DMA_WRITE_COMBINE
1199fa7e2247SChristoph Hellwig	select ARCH_HAS_DMA_PREP_COHERENT
1200f8c55dc6SChristoph Hellwig	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1201fa7e2247SChristoph Hellwig	select ARCH_HAS_DMA_SET_UNCACHED
120234dc0ea6SChristoph Hellwig	select DMA_NONCOHERENT_MMAP
1203f8c55dc6SChristoph Hellwig	select DMA_NONCOHERENT_CACHE_SYNC
120434dc0ea6SChristoph Hellwig	select NEED_DMA_MAP_STATE
12054ce588cdSRalf Baechle
120636a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
12071da177e4SLinus Torvalds	bool
12081da177e4SLinus Torvalds
12091b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
1210dbb74540SRalf Baechle	bool
1211dbb74540SRalf Baechle
12121da177e4SLinus Torvaldsconfig MIPS_BONITO64
12131da177e4SLinus Torvalds	bool
12141da177e4SLinus Torvalds
12151da177e4SLinus Torvaldsconfig MIPS_MSC
12161da177e4SLinus Torvalds	bool
12171da177e4SLinus Torvalds
12181f21d2bdSBrian Murphyconfig MIPS_NILE4
12191f21d2bdSBrian Murphy	bool
12201f21d2bdSBrian Murphy
122139b8d525SRalf Baechleconfig SYNC_R4K
122239b8d525SRalf Baechle	bool
122339b8d525SRalf Baechle
1224487d70d0SGabor Juhosconfig MIPS_MACHINE
1225487d70d0SGabor Juhos	def_bool n
1226487d70d0SGabor Juhos
1227ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1228d388d685SMaciej W. Rozycki	def_bool n
1229d388d685SMaciej W. Rozycki
12304e0748f5SMarkos Chandrasconfig GENERIC_CSUM
123118d84e2eSAlexander Lobakin	def_bool CPU_NO_LOAD_STORE_LR
12324e0748f5SMarkos Chandras
12338313da30SRalf Baechleconfig GENERIC_ISA_DMA
12348313da30SRalf Baechle	bool
12358313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1236a35bee8aSNamhyung Kim	select ISA_DMA_API
12378313da30SRalf Baechle
1238aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1239aa414dffSRalf Baechle	bool
12408313da30SRalf Baechle	select GENERIC_ISA_DMA
1241aa414dffSRalf Baechle
124278bdbbacSMasahiro Yamadaconfig HAVE_PLAT_DELAY
124378bdbbacSMasahiro Yamada	bool
124478bdbbacSMasahiro Yamada
124578bdbbacSMasahiro Yamadaconfig HAVE_PLAT_FW_INIT_CMDLINE
124678bdbbacSMasahiro Yamada	bool
124778bdbbacSMasahiro Yamada
124878bdbbacSMasahiro Yamadaconfig HAVE_PLAT_MEMCPY
124978bdbbacSMasahiro Yamada	bool
125078bdbbacSMasahiro Yamada
1251a35bee8aSNamhyung Kimconfig ISA_DMA_API
1252a35bee8aSNamhyung Kim	bool
1253a35bee8aSNamhyung Kim
1254465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1255465aaed0SDavid Daney	bool
1256465aaed0SDavid Daney
12578c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE
12588c530ea3SMatt Redfearn	bool
12598c530ea3SMatt Redfearn	help
12608c530ea3SMatt Redfearn	  Selected if the platform supports relocating the kernel.
12618c530ea3SMatt Redfearn	  The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
12628c530ea3SMatt Redfearn	  to allow access to command line and entropy sources.
12638c530ea3SMatt Redfearn
1264f381bf6dSDavid Daneyconfig MIPS_CBPF_JIT
1265f381bf6dSDavid Daney	def_bool y
1266f381bf6dSDavid Daney	depends on BPF_JIT && HAVE_CBPF_JIT
1267f381bf6dSDavid Daney
1268f381bf6dSDavid Daneyconfig MIPS_EBPF_JIT
1269f381bf6dSDavid Daney	def_bool y
1270f381bf6dSDavid Daney	depends on BPF_JIT && HAVE_EBPF_JIT
1271f381bf6dSDavid Daney
1272f381bf6dSDavid Daney
12735e83d430SRalf Baechle#
12746b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
12755e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
12765e83d430SRalf Baechle# choice statement should be more obvious to the user.
12775e83d430SRalf Baechle#
12785e83d430SRalf Baechlechoice
12796b2aac42SMasanari Iida	prompt "Endianness selection"
12801da177e4SLinus Torvalds	help
12811da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
12825e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
12833cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
12845e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
12853dde6ad8SDavid Sterba	  one or the other endianness.
12865e83d430SRalf Baechle
12875e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
12885e83d430SRalf Baechle	bool "Big endian"
12895e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
12905e83d430SRalf Baechle
12915e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
12925e83d430SRalf Baechle	bool "Little endian"
12935e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
12945e83d430SRalf Baechle
12955e83d430SRalf Baechleendchoice
12965e83d430SRalf Baechle
129722b0763aSDavid Daneyconfig EXPORT_UASM
129822b0763aSDavid Daney	bool
129922b0763aSDavid Daney
13002116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
13012116245eSRalf Baechle	bool
13022116245eSRalf Baechle
13035e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
13045e83d430SRalf Baechle	bool
13055e83d430SRalf Baechle
13065e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
13075e83d430SRalf Baechle	bool
13081da177e4SLinus Torvalds
13099cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
13109cffd154SDavid Daney	bool
131145e03e62SDaniel Silsby	depends on CPU_SUPPORTS_HUGEPAGES
13129cffd154SDavid Daney	default y
13139cffd154SDavid Daney
1314aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1315aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1316aa1762f4SDavid Daney
13171da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
13181da177e4SLinus Torvalds	bool
13191da177e4SLinus Torvalds
13209267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
13219267a30dSMarc St-Jean	bool
13229267a30dSMarc St-Jean
13239267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
13249267a30dSMarc St-Jean	bool
13259267a30dSMarc St-Jean
13268420fd00SAtsushi Nemotoconfig IRQ_TXX9
13278420fd00SAtsushi Nemoto	bool
13288420fd00SAtsushi Nemoto
1329d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1330d5ab1a69SYoichi Yuasa	bool
1331d5ab1a69SYoichi Yuasa
1332252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
13331da177e4SLinus Torvalds	bool
13341da177e4SLinus Torvalds
1335a57140e9SThomas Bogendoerferconfig PCI_XTALK_BRIDGE
1336a57140e9SThomas Bogendoerfer	bool
1337a57140e9SThomas Bogendoerfer
13389267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
13399267a30dSMarc St-Jean	bool
13409267a30dSMarc St-Jean
1341a83860c2SRalf Baechleconfig SOC_EMMA2RH
1342a83860c2SRalf Baechle	bool
1343a83860c2SRalf Baechle	select CEVT_R4K
1344a83860c2SRalf Baechle	select CSRC_R4K
1345a83860c2SRalf Baechle	select DMA_NONCOHERENT
134667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1347a83860c2SRalf Baechle	select SWAP_IO_SPACE
1348a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1349a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1350a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1351a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1352a83860c2SRalf Baechle
1353edb6310aSDaniel Lairdconfig SOC_PNX833X
1354edb6310aSDaniel Laird	bool
1355edb6310aSDaniel Laird	select CEVT_R4K
1356edb6310aSDaniel Laird	select CSRC_R4K
135767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1358edb6310aSDaniel Laird	select DMA_NONCOHERENT
1359edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1360edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1361edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1362edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1363377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1364edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1365edb6310aSDaniel Laird
1366edb6310aSDaniel Lairdconfig SOC_PNX8335
1367edb6310aSDaniel Laird	bool
1368edb6310aSDaniel Laird	select SOC_PNX833X
1369edb6310aSDaniel Laird
1370a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM
1371a7e07b1aSMarkos Chandras	bool
1372a7e07b1aSMarkos Chandras
13731da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
13741da177e4SLinus Torvalds	bool
13751da177e4SLinus Torvalds
1376e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1377e2defae5SThomas Bogendoerfer	bool
1378e2defae5SThomas Bogendoerfer
13795b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
13805b438c44SThomas Bogendoerfer	bool
13815b438c44SThomas Bogendoerfer
1382e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1383e2defae5SThomas Bogendoerfer	bool
1384e2defae5SThomas Bogendoerfer
1385e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1386e2defae5SThomas Bogendoerfer	bool
1387e2defae5SThomas Bogendoerfer
1388e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1389e2defae5SThomas Bogendoerfer	bool
1390e2defae5SThomas Bogendoerfer
1391e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1392e2defae5SThomas Bogendoerfer	bool
1393e2defae5SThomas Bogendoerfer
1394e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1395e2defae5SThomas Bogendoerfer	bool
1396e2defae5SThomas Bogendoerfer
13970e2794b0SRalf Baechleconfig FW_ARC32
13985e83d430SRalf Baechle	bool
13995e83d430SRalf Baechle
1400aaa9fad3SPaul Bolleconfig FW_SNIPROM
1401231a35d3SThomas Bogendoerfer	bool
1402231a35d3SThomas Bogendoerfer
14031da177e4SLinus Torvaldsconfig BOOT_ELF32
14041da177e4SLinus Torvalds	bool
14051da177e4SLinus Torvalds
1406930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1407930beb5aSFlorian Fainelli	bool
1408930beb5aSFlorian Fainelli
1409930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1410930beb5aSFlorian Fainelli	bool
1411930beb5aSFlorian Fainelli
1412930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1413930beb5aSFlorian Fainelli	bool
1414930beb5aSFlorian Fainelli
1415930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1416930beb5aSFlorian Fainelli	bool
1417930beb5aSFlorian Fainelli
14181da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
14191da177e4SLinus Torvalds	int
1420a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
14215432eeb6SKevin Cernekee	default "6" if MIPS_L1_CACHE_SHIFT_6
14225432eeb6SKevin Cernekee	default "5" if MIPS_L1_CACHE_SHIFT_5
14235432eeb6SKevin Cernekee	default "4" if MIPS_L1_CACHE_SHIFT_4
14241da177e4SLinus Torvalds	default "5"
14251da177e4SLinus Torvalds
14261da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
14271da177e4SLinus Torvalds	bool
14281da177e4SLinus Torvalds
1429e9422427SThomas Bogendoerferconfig ARC_CMDLINE_ONLY
1430e9422427SThomas Bogendoerfer	bool
1431e9422427SThomas Bogendoerfer
14321da177e4SLinus Torvaldsconfig ARC_CONSOLE
14331da177e4SLinus Torvalds	bool "ARC console support"
1434e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
14351da177e4SLinus Torvalds
14361da177e4SLinus Torvaldsconfig ARC_MEMORY
14371da177e4SLinus Torvalds	bool
14381da177e4SLinus Torvalds
14391da177e4SLinus Torvaldsconfig ARC_PROMLIB
14401da177e4SLinus Torvalds	bool
14411da177e4SLinus Torvalds
14420e2794b0SRalf Baechleconfig FW_ARC64
14431da177e4SLinus Torvalds	bool
14441da177e4SLinus Torvalds
14451da177e4SLinus Torvaldsconfig BOOT_ELF64
14461da177e4SLinus Torvalds	bool
14471da177e4SLinus Torvalds
14481da177e4SLinus Torvaldsmenu "CPU selection"
14491da177e4SLinus Torvalds
14501da177e4SLinus Torvaldschoice
14511da177e4SLinus Torvalds	prompt "CPU type"
14521da177e4SLinus Torvalds	default CPU_R4X00
14531da177e4SLinus Torvalds
1454268a2d60SJiaxun Yangconfig CPU_LOONGSON64
1455caed1d1bSHuacai Chen	bool "Loongson 64-bit CPU"
1456268a2d60SJiaxun Yang	depends on SYS_HAS_CPU_LOONGSON64
1457d3bc81beSChristoph Hellwig	select ARCH_HAS_PHYS_TO_DMA
145851522217SJiaxun Yang	select CPU_MIPSR2
145951522217SJiaxun Yang	select CPU_HAS_PREFETCH
14600e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
14610e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
14620e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
14637507445bSHuacai Chen	select CPU_SUPPORTS_MSA
146451522217SJiaxun Yang	select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
146551522217SJiaxun Yang	select CPU_MIPSR2_IRQ_VI
14660e476d91SHuacai Chen	select WEAK_ORDERING
14670e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
14687507445bSHuacai Chen	select MIPS_ASID_BITS_VARIABLE
1469b2edcfc8SHuacai Chen	select MIPS_PGD_C0_CONTEXT
147017c99d94SHuacai Chen	select MIPS_L1_CACHE_SHIFT_6
1471d30a2b47SLinus Walleij	select GPIOLIB
147209230cbcSChristoph Hellwig	select SWIOTLB
14730e476d91SHuacai Chen	help
1474caed1d1bSHuacai Chen		The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1475caed1d1bSHuacai Chen		cores implements the MIPS64R2 instruction set with many extensions,
1476caed1d1bSHuacai Chen		including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1477caed1d1bSHuacai Chen		3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1478caed1d1bSHuacai Chen		Loongson-2E/2F is not covered here and will be removed in future.
14790e476d91SHuacai Chen
1480caed1d1bSHuacai Chenconfig LOONGSON3_ENHANCEMENT
1481caed1d1bSHuacai Chen	bool "New Loongson-3 CPU Enhancements"
14821e820da3SHuacai Chen	default n
1483268a2d60SJiaxun Yang	depends on CPU_LOONGSON64
14841e820da3SHuacai Chen	help
1485caed1d1bSHuacai Chen	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
14861e820da3SHuacai Chen	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1487268a2d60SJiaxun Yang	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
14881e820da3SHuacai Chen	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
14891e820da3SHuacai Chen	  Fast TLB refill support, etc.
14901e820da3SHuacai Chen
14911e820da3SHuacai Chen	  This option enable those enhancements which are not probed at run
14921e820da3SHuacai Chen	  time. If you want a generic kernel to run on all Loongson 3 machines,
14931e820da3SHuacai Chen	  please say 'N' here. If you want a high-performance kernel to run on
1494caed1d1bSHuacai Chen	  new Loongson-3 machines only, please say 'Y' here.
14951e820da3SHuacai Chen
1496e02e07e3SHuacai Chenconfig CPU_LOONGSON3_WORKAROUNDS
1497caed1d1bSHuacai Chen	bool "Old Loongson-3 LLSC Workarounds"
1498e02e07e3SHuacai Chen	default y if SMP
1499268a2d60SJiaxun Yang	depends on CPU_LOONGSON64
1500e02e07e3SHuacai Chen	help
1501caed1d1bSHuacai Chen	  Loongson-3 processors have the llsc issues which require workarounds.
1502e02e07e3SHuacai Chen	  Without workarounds the system may hang unexpectedly.
1503e02e07e3SHuacai Chen
1504caed1d1bSHuacai Chen	  Newer Loongson-3 will fix these issues and no workarounds are needed.
1505e02e07e3SHuacai Chen	  The workarounds have no significant side effect on them but may
1506e02e07e3SHuacai Chen	  decrease the performance of the system so this option should be
1507e02e07e3SHuacai Chen	  disabled unless the kernel is intended to be run on old systems.
1508e02e07e3SHuacai Chen
1509e02e07e3SHuacai Chen	  If unsure, please say Y.
1510e02e07e3SHuacai Chen
15113702bba5SWu Zhangjinconfig CPU_LOONGSON2E
15123702bba5SWu Zhangjin	bool "Loongson 2E"
15133702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
1514268a2d60SJiaxun Yang	select CPU_LOONGSON2EF
15152a21c730SFuxin Zhang	help
15162a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
15172a21c730SFuxin Zhang	  with many extensions.
15182a21c730SFuxin Zhang
151925985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
15206f7a251aSWu Zhangjin	  bonito64.
15216f7a251aSWu Zhangjin
15226f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
15236f7a251aSWu Zhangjin	bool "Loongson 2F"
15246f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
1525268a2d60SJiaxun Yang	select CPU_LOONGSON2EF
1526d30a2b47SLinus Walleij	select GPIOLIB
15276f7a251aSWu Zhangjin	help
15286f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
15296f7a251aSWu Zhangjin	  with many extensions.
15306f7a251aSWu Zhangjin
15316f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
15326f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
15336f7a251aSWu Zhangjin	  Loongson2E.
15346f7a251aSWu Zhangjin
1535ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1536ca585cf9SKelvin Cheung	bool "Loongson 1B"
1537ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1538b2afb64cSHuacai Chen	select CPU_LOONGSON32
15399ec88b60SKelvin Cheung	select LEDS_GPIO_REGISTER
1540ca585cf9SKelvin Cheung	help
1541ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1542968dc5a0S谢致邦 (XIE Zhibang)	  Release 1 instruction set and part of the MIPS32 Release 2
1543968dc5a0S谢致邦 (XIE Zhibang)	  instruction set.
1544ca585cf9SKelvin Cheung
154512e3280bSYang Lingconfig CPU_LOONGSON1C
154612e3280bSYang Ling	bool "Loongson 1C"
154712e3280bSYang Ling	depends on SYS_HAS_CPU_LOONGSON1C
1548b2afb64cSHuacai Chen	select CPU_LOONGSON32
154912e3280bSYang Ling	select LEDS_GPIO_REGISTER
155012e3280bSYang Ling	help
155112e3280bSYang Ling	  The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1552968dc5a0S谢致邦 (XIE Zhibang)	  Release 1 instruction set and part of the MIPS32 Release 2
1553968dc5a0S谢致邦 (XIE Zhibang)	  instruction set.
155412e3280bSYang Ling
15556e760c8dSRalf Baechleconfig CPU_MIPS32_R1
15566e760c8dSRalf Baechle	bool "MIPS32 Release 1"
15577cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
15586e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1559797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1560ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
15616e760c8dSRalf Baechle	help
15625e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
15631e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
15641e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
15651e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
15661e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
15671e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
15681e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
15691e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
15701e5f1caaSRalf Baechle	  performance.
15711e5f1caaSRalf Baechle
15721e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
15731e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
15747cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
15751e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1576797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1577ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1578a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
15792235a54dSSanjay Lal	select HAVE_KVM
15801e5f1caaSRalf Baechle	help
15815e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
15826e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
15836e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
15846e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
15856e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
15861da177e4SLinus Torvalds
15877fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6
1588674d10e2SMarkos Chandras	bool "MIPS32 Release 6"
15897fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R6
15907fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
159118d84e2eSAlexander Lobakin	select CPU_NO_LOAD_STORE_LR
15927fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
15937fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
15947fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
15957fd08ca5SLeonid Yegoshin	select HAVE_KVM
15967fd08ca5SLeonid Yegoshin	select MIPS_O32_FP64_SUPPORT
15977fd08ca5SLeonid Yegoshin	help
15987fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
15997fd08ca5SLeonid Yegoshin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
16007fd08ca5SLeonid Yegoshin	  family, are based on a MIPS32r6 processor. If you own an older
16017fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
16027fd08ca5SLeonid Yegoshin
16036e760c8dSRalf Baechleconfig CPU_MIPS64_R1
16046e760c8dSRalf Baechle	bool "MIPS64 Release 1"
16057cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1606797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1607ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1608ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1609ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
16109cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
16116e760c8dSRalf Baechle	help
16126e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
16136e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
16146e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
16156e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
16166e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
16171e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
16181e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
16191e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
16201e5f1caaSRalf Baechle	  performance.
16211e5f1caaSRalf Baechle
16221e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
16231e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
16247cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1625797798c1SRalf Baechle	select CPU_HAS_PREFETCH
16261e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
16271e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1628ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
16299cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1630a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
163140a2df49SJames Hogan	select HAVE_KVM
16321e5f1caaSRalf Baechle	help
16331e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
16341e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
16351e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
16361e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
16371e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
16381da177e4SLinus Torvalds
16397fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6
1640674d10e2SMarkos Chandras	bool "MIPS64 Release 6"
16417fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS64_R6
16427fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
164318d84e2eSAlexander Lobakin	select CPU_NO_LOAD_STORE_LR
16447fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
16457fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_64BIT_KERNEL
16467fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
1647afd375dcSPaul Burton	select CPU_SUPPORTS_HUGEPAGES
16487fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
16492e6c7747SJames Hogan	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
165040a2df49SJames Hogan	select HAVE_KVM
16517fd08ca5SLeonid Yegoshin	help
16527fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
16537fd08ca5SLeonid Yegoshin	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
16547fd08ca5SLeonid Yegoshin	  family, are based on a MIPS64r6 processor. If you own an older
16557fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
16567fd08ca5SLeonid Yegoshin
16571da177e4SLinus Torvaldsconfig CPU_R3000
16581da177e4SLinus Torvalds	bool "R3000"
16597cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1660f7062ddbSRalf Baechle	select CPU_HAS_WB
166154746829SPaul Burton	select CPU_R3K_TLB
1662ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1663797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
16641da177e4SLinus Torvalds	help
16651da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
16661da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
16671da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
16681da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
16691da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
16701da177e4SLinus Torvalds	  try to recompile with R3000.
16711da177e4SLinus Torvalds
16721da177e4SLinus Torvaldsconfig CPU_TX39XX
16731da177e4SLinus Torvalds	bool "R39XX"
16747cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1675ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
167654746829SPaul Burton	select CPU_R3K_TLB
16771da177e4SLinus Torvalds
16781da177e4SLinus Torvaldsconfig CPU_VR41XX
16791da177e4SLinus Torvalds	bool "R41xx"
16807cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1681ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1682ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
16831da177e4SLinus Torvalds	help
16845e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
16851da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
16861da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
16871da177e4SLinus Torvalds	  processor or vice versa.
16881da177e4SLinus Torvalds
16891da177e4SLinus Torvaldsconfig CPU_R4X00
16901da177e4SLinus Torvalds	bool "R4x00"
16917cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1692ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1693ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1694970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16951da177e4SLinus Torvalds	help
16961da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
16971da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
16981da177e4SLinus Torvalds
16991da177e4SLinus Torvaldsconfig CPU_TX49XX
17001da177e4SLinus Torvalds	bool "R49XX"
17017cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1702de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1703ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1704ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1705970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17061da177e4SLinus Torvalds
17071da177e4SLinus Torvaldsconfig CPU_R5000
17081da177e4SLinus Torvalds	bool "R5000"
17097cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1710ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1711ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1712970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17131da177e4SLinus Torvalds	help
17141da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
17151da177e4SLinus Torvalds
1716542c1020SShinya Kuribayashiconfig CPU_R5500
1717542c1020SShinya Kuribayashi	bool "R5500"
1718542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1719542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1720542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
17219cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1722542c1020SShinya Kuribayashi	help
1723542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1724542c1020SShinya Kuribayashi	  instruction set.
1725542c1020SShinya Kuribayashi
17261da177e4SLinus Torvaldsconfig CPU_NEVADA
17271da177e4SLinus Torvalds	bool "RM52xx"
17287cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1729ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1730ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1731970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17321da177e4SLinus Torvalds	help
17331da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
17341da177e4SLinus Torvalds
17351da177e4SLinus Torvaldsconfig CPU_R10000
17361da177e4SLinus Torvalds	bool "R10000"
17377cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
17385e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1739ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1740ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1741797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1742970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17431da177e4SLinus Torvalds	help
17441da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
17451da177e4SLinus Torvalds
17461da177e4SLinus Torvaldsconfig CPU_RM7000
17471da177e4SLinus Torvalds	bool "RM7000"
17487cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
17495e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1750ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1751ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1752797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1753970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17541da177e4SLinus Torvalds
17551da177e4SLinus Torvaldsconfig CPU_SB1
17561da177e4SLinus Torvalds	bool "SB1"
17577cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1758ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1759ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1760797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1761970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17620004a9dfSRalf Baechle	select WEAK_ORDERING
17631da177e4SLinus Torvalds
1764a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1765a86c7f72SDavid Daney	bool "Cavium Octeon processor"
17665e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1767a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1768a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1769a86c7f72SDavid Daney	select WEAK_ORDERING
1770a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
17719cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1772df115f3eSBen Hutchings	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1773df115f3eSBen Hutchings	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1774930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
17750ae3abcdSJames Hogan	select HAVE_KVM
1776a86c7f72SDavid Daney	help
1777a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1778a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1779a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1780a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1781a86c7f72SDavid Daney
1782cd746249SJonas Gorskiconfig CPU_BMIPS
1783cd746249SJonas Gorski	bool "Broadcom BMIPS"
1784cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1785cd746249SJonas Gorski	select CPU_MIPS32
1786fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1787cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1788cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1789cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1790cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1791cd746249SJonas Gorski	select DMA_NONCOHERENT
179267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1793cd746249SJonas Gorski	select SWAP_IO_SPACE
1794cd746249SJonas Gorski	select WEAK_ORDERING
1795c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
179669aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1797a8d709b0SMarkus Mayer	select CPU_SUPPORTS_CPUFREQ
1798a8d709b0SMarkus Mayer	select MIPS_EXTERNAL_TIMER
1799c1c0c461SKevin Cernekee	help
1800fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1801c1c0c461SKevin Cernekee
18027f058e85SJayachandran Cconfig CPU_XLR
18037f058e85SJayachandran C	bool "Netlogic XLR SoC"
18047f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
18057f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
18067f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
18077f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1808970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
18097f058e85SJayachandran C	select WEAK_ORDERING
18107f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
18117f058e85SJayachandran C	help
18127f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
18131c773ea4SJayachandran C
18141c773ea4SJayachandran Cconfig CPU_XLP
18151c773ea4SJayachandran C	bool "Netlogic XLP SoC"
18161c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
18171c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
18181c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
18191c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
18201c773ea4SJayachandran C	select WEAK_ORDERING
18211c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
18221c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1823d6504846SJayachandran C	select CPU_MIPSR2
1824ddba6833SPrem Mallappa	select CPU_SUPPORTS_HUGEPAGES
18252db003a5SPaul Burton	select MIPS_ASID_BITS_VARIABLE
18261c773ea4SJayachandran C	help
18271c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
18281da177e4SLinus Torvaldsendchoice
18291da177e4SLinus Torvalds
1830a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1831a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1832a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
18337fd08ca5SLeonid Yegoshin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1834a6e18781SLeonid Yegoshin	help
1835a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1836a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1837a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1838a6e18781SLeonid Yegoshin
1839a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1840a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1841a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1842a6e18781SLeonid Yegoshin	select EVA
1843a6e18781SLeonid Yegoshin	default y
1844a6e18781SLeonid Yegoshin	help
1845a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1846a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1847a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1848a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1849a6e18781SLeonid Yegoshin
1850c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES
1851c5b36783SSteven J. Hill	bool "MIPS32 Release 5 Features"
1852c5b36783SSteven J. Hill	depends on SYS_HAS_CPU_MIPS32_R5
1853c5b36783SSteven J. Hill	depends on CPU_MIPS32_R2
1854c5b36783SSteven J. Hill	help
1855c5b36783SSteven J. Hill	  Choose this option to build a kernel for release 2 or later of the
1856c5b36783SSteven J. Hill	  MIPS32 architecture including features from release 5 such as
1857c5b36783SSteven J. Hill	  support for Extended Physical Addressing (XPA).
1858c5b36783SSteven J. Hill
1859c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA
1860c5b36783SSteven J. Hill	bool "Extended Physical Addressing (XPA)"
1861c5b36783SSteven J. Hill	depends on CPU_MIPS32_R5_FEATURES
1862c5b36783SSteven J. Hill	depends on !EVA
1863c5b36783SSteven J. Hill	depends on !PAGE_SIZE_4KB
1864c5b36783SSteven J. Hill	depends on SYS_SUPPORTS_HIGHMEM
1865c5b36783SSteven J. Hill	select XPA
1866c5b36783SSteven J. Hill	select HIGHMEM
1867d4a451d5SChristoph Hellwig	select PHYS_ADDR_T_64BIT
1868c5b36783SSteven J. Hill	default n
1869c5b36783SSteven J. Hill	help
1870c5b36783SSteven J. Hill	  Choose this option if you want to enable the Extended Physical
1871c5b36783SSteven J. Hill	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1872c5b36783SSteven J. Hill	  benefit is to increase physical addressing equal to or greater
1873c5b36783SSteven J. Hill	  than 40 bits. Note that this has the side effect of turning on
1874c5b36783SSteven J. Hill	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1875c5b36783SSteven J. Hill	  If unsure, say 'N' here.
1876c5b36783SSteven J. Hill
1877622844bfSWu Zhangjinif CPU_LOONGSON2F
1878622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1879622844bfSWu Zhangjin	bool
1880622844bfSWu Zhangjin
1881622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1882622844bfSWu Zhangjin	bool
1883622844bfSWu Zhangjin
1884622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1885622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1886622844bfSWu Zhangjin	default y
1887622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1888622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1889622844bfSWu Zhangjin	help
1890622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1891622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1892622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1893622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1894622844bfSWu Zhangjin
1895622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1896622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1897622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1898622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1899622844bfSWu Zhangjin	  systems.
1900622844bfSWu Zhangjin
1901622844bfSWu Zhangjin	  If unsure, please say Y.
1902622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1903622844bfSWu Zhangjin
19041b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
19051b93b3c3SWu Zhangjin	bool
19061b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
19071b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
190831c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
19091b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1910fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
19114e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
19121b93b3c3SWu Zhangjin
19131b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
19141b93b3c3SWu Zhangjin	bool
19151b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
19161b93b3c3SWu Zhangjin
1917dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM
1918dbb98314SAlban Bedel	bool
1919dbb98314SAlban Bedel	select SYS_SUPPORTS_ZBOOT
1920dbb98314SAlban Bedel
1921268a2d60SJiaxun Yangconfig CPU_LOONGSON2EF
19223702bba5SWu Zhangjin	bool
19233702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
19243702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
19253702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1926970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
1927e905086eSChristoph Hellwig	select ARCH_HAS_PHYS_TO_DMA
19283702bba5SWu Zhangjin
1929b2afb64cSHuacai Chenconfig CPU_LOONGSON32
1930ca585cf9SKelvin Cheung	bool
1931ca585cf9SKelvin Cheung	select CPU_MIPS32
19327e280f6bSJiaxun Yang	select CPU_MIPSR2
1933ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1934ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1935ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1936f29ad10dSKelvin Cheung	select CPU_SUPPORTS_CPUFREQ
1937ca585cf9SKelvin Cheung
1938fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
193904fa8bf7SJonas Gorski	select SMP_UP if SMP
19401bbb6c1bSKevin Cernekee	bool
1941cd746249SJonas Gorski
1942cd746249SJonas Gorskiconfig CPU_BMIPS4350
1943cd746249SJonas Gorski	bool
1944cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1945cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1946cd746249SJonas Gorski
1947cd746249SJonas Gorskiconfig CPU_BMIPS4380
1948cd746249SJonas Gorski	bool
1949bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
1950cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1951cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1952b4720809SFlorian Fainelli	select CPU_HAS_RIXI
1953cd746249SJonas Gorski
1954cd746249SJonas Gorskiconfig CPU_BMIPS5000
1955cd746249SJonas Gorski	bool
1956cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1957bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_7
1958cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1959cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1960b4720809SFlorian Fainelli	select CPU_HAS_RIXI
19611bbb6c1bSKevin Cernekee
1962268a2d60SJiaxun Yangconfig SYS_HAS_CPU_LOONGSON64
19630e476d91SHuacai Chen	bool
19640e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
1965b2edcfc8SHuacai Chen	select CPU_HAS_RIXI
19660e476d91SHuacai Chen
19673702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
19682a21c730SFuxin Zhang	bool
19692a21c730SFuxin Zhang
19706f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
19716f7a251aSWu Zhangjin	bool
197255045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
197355045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
19746f7a251aSWu Zhangjin
1975ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1976ca585cf9SKelvin Cheung	bool
1977ca585cf9SKelvin Cheung
197812e3280bSYang Lingconfig SYS_HAS_CPU_LOONGSON1C
197912e3280bSYang Ling	bool
198012e3280bSYang Ling
19817cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
19827cf8053bSRalf Baechle	bool
19837cf8053bSRalf Baechle
19847cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
19857cf8053bSRalf Baechle	bool
19867cf8053bSRalf Baechle
1987a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1988a6e18781SLeonid Yegoshin	bool
1989a6e18781SLeonid Yegoshin
1990c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5
1991c5b36783SSteven J. Hill	bool
19929ae1f262SPaul Burton	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1993c5b36783SSteven J. Hill
19947fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6
19957fd08ca5SLeonid Yegoshin	bool
19969ae1f262SPaul Burton	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
19977fd08ca5SLeonid Yegoshin
19987cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
19997cf8053bSRalf Baechle	bool
20007cf8053bSRalf Baechle
20017cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
20027cf8053bSRalf Baechle	bool
20037cf8053bSRalf Baechle
20047fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6
20057fd08ca5SLeonid Yegoshin	bool
20069ae1f262SPaul Burton	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
20077fd08ca5SLeonid Yegoshin
20087cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
20097cf8053bSRalf Baechle	bool
20107cf8053bSRalf Baechle
20117cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
20127cf8053bSRalf Baechle	bool
20137cf8053bSRalf Baechle
20147cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
20157cf8053bSRalf Baechle	bool
20167cf8053bSRalf Baechle
20177cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
20187cf8053bSRalf Baechle	bool
20197cf8053bSRalf Baechle
20207cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
20217cf8053bSRalf Baechle	bool
20227cf8053bSRalf Baechle
20237cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
20247cf8053bSRalf Baechle	bool
20257cf8053bSRalf Baechle
2026542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
2027542c1020SShinya Kuribayashi	bool
2028542c1020SShinya Kuribayashi
20297cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
20307cf8053bSRalf Baechle	bool
20317cf8053bSRalf Baechle
20327cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
20337cf8053bSRalf Baechle	bool
20349ae1f262SPaul Burton	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
20357cf8053bSRalf Baechle
20367cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
20377cf8053bSRalf Baechle	bool
20387cf8053bSRalf Baechle
20397cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
20407cf8053bSRalf Baechle	bool
20417cf8053bSRalf Baechle
20425e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
20435e683389SDavid Daney	bool
20445e683389SDavid Daney
2045cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
2046c1c0c461SKevin Cernekee	bool
2047c1c0c461SKevin Cernekee
2048fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
2049c1c0c461SKevin Cernekee	bool
2050cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
2051c1c0c461SKevin Cernekee
2052c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
2053c1c0c461SKevin Cernekee	bool
2054cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
2055c1c0c461SKevin Cernekee
2056c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
2057c1c0c461SKevin Cernekee	bool
2058cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
2059c1c0c461SKevin Cernekee
2060c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
2061c1c0c461SKevin Cernekee	bool
2062cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
2063f263f2a2SHauke Mehrtens	select ARCH_HAS_SYNC_DMA_FOR_CPU
2064c1c0c461SKevin Cernekee
20657f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
20667f058e85SJayachandran C	bool
20677f058e85SJayachandran C
20681c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
20691c773ea4SJayachandran C	bool
20701c773ea4SJayachandran C
207117099b11SRalf Baechle#
207217099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
207317099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
207417099b11SRalf Baechle#
20750004a9dfSRalf Baechleconfig WEAK_ORDERING
20760004a9dfSRalf Baechle	bool
207717099b11SRalf Baechle
207817099b11SRalf Baechle#
207917099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
208017099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
208117099b11SRalf Baechle#
208217099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
208317099b11SRalf Baechle	bool
20845e83d430SRalf Baechleendmenu
20855e83d430SRalf Baechle
20865e83d430SRalf Baechle#
20875e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
20885e83d430SRalf Baechle#
20895e83d430SRalf Baechleconfig CPU_MIPS32
20905e83d430SRalf Baechle	bool
20917fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
20925e83d430SRalf Baechle
20935e83d430SRalf Baechleconfig CPU_MIPS64
20945e83d430SRalf Baechle	bool
20957fd08ca5SLeonid Yegoshin	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
20965e83d430SRalf Baechle
20975e83d430SRalf Baechle#
209857eeacedSPaul Burton# These indicate the revision of the architecture
20995e83d430SRalf Baechle#
21005e83d430SRalf Baechleconfig CPU_MIPSR1
21015e83d430SRalf Baechle	bool
21025e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
21035e83d430SRalf Baechle
21045e83d430SRalf Baechleconfig CPU_MIPSR2
21055e83d430SRalf Baechle	bool
2106a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
21078256b17eSFlorian Fainelli	select CPU_HAS_RIXI
2108ba9196d2SJiaxun Yang	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2109a7e07b1aSMarkos Chandras	select MIPS_SPRAM
21105e83d430SRalf Baechle
21117fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6
21127fd08ca5SLeonid Yegoshin	bool
21137fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
21148256b17eSFlorian Fainelli	select CPU_HAS_RIXI
2115ba9196d2SJiaxun Yang	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
211687321fddSPaul Burton	select HAVE_ARCH_BITREVERSE
21172db003a5SPaul Burton	select MIPS_ASID_BITS_VARIABLE
21184a5dc51eSMarcin Nowakowski	select MIPS_CRC_SUPPORT
2119a7e07b1aSMarkos Chandras	select MIPS_SPRAM
21205e83d430SRalf Baechle
212157eeacedSPaul Burtonconfig TARGET_ISA_REV
212257eeacedSPaul Burton	int
212357eeacedSPaul Burton	default 1 if CPU_MIPSR1
212457eeacedSPaul Burton	default 2 if CPU_MIPSR2
212557eeacedSPaul Burton	default 6 if CPU_MIPSR6
212657eeacedSPaul Burton	default 0
212757eeacedSPaul Burton	help
212857eeacedSPaul Burton	  Reflects the ISA revision being targeted by the kernel build. This
212957eeacedSPaul Burton	  is effectively the Kconfig equivalent of MIPS_ISA_REV.
213057eeacedSPaul Burton
2131a6e18781SLeonid Yegoshinconfig EVA
2132a6e18781SLeonid Yegoshin	bool
2133a6e18781SLeonid Yegoshin
2134c5b36783SSteven J. Hillconfig XPA
2135c5b36783SSteven J. Hill	bool
2136c5b36783SSteven J. Hill
21375e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
21385e83d430SRalf Baechle	bool
21395e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
21405e83d430SRalf Baechle	bool
21415e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
21425e83d430SRalf Baechle	bool
21435e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
21445e83d430SRalf Baechle	bool
214555045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
214655045ff5SWu Zhangjin	bool
214755045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
214855045ff5SWu Zhangjin	bool
21499cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
21509cffd154SDavid Daney	bool
2151171543e7SDaniel Silsby	depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
215282622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
215382622284SDavid Daney	bool
2154cebf8c0fSPaul Burton	default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
21555e83d430SRalf Baechle
21568192c9eaSDavid Daney#
21578192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
21588192c9eaSDavid Daney#
21598192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
21608192c9eaSDavid Daney	bool
2161679eb637SJames Hogan	default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
21628192c9eaSDavid Daney
21635e83d430SRalf Baechlemenu "Kernel type"
21645e83d430SRalf Baechle
21655e83d430SRalf Baechlechoice
21665e83d430SRalf Baechle	prompt "Kernel code model"
21675e83d430SRalf Baechle	help
21685e83d430SRalf Baechle	  You should only select this option if you have a workload that
21695e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
21705e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
21715e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
21725e83d430SRalf Baechle
21735e83d430SRalf Baechleconfig 32BIT
21745e83d430SRalf Baechle	bool "32-bit kernel"
21755e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
21765e83d430SRalf Baechle	select TRAD_SIGNALS
21775e83d430SRalf Baechle	help
21785e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
2179f17c4ca3SRalf Baechle
21805e83d430SRalf Baechleconfig 64BIT
21815e83d430SRalf Baechle	bool "64-bit kernel"
21825e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
21835e83d430SRalf Baechle	help
21845e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
21855e83d430SRalf Baechle
21865e83d430SRalf Baechleendchoice
21875e83d430SRalf Baechle
21882235a54dSSanjay Lalconfig KVM_GUEST
21892235a54dSSanjay Lal	bool "KVM Guest Kernel"
2190f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
21912235a54dSSanjay Lal	help
2192caa1faa7SJames Hogan	  Select this option if building a guest kernel for KVM (Trap & Emulate)
2193caa1faa7SJames Hogan	  mode.
21942235a54dSSanjay Lal
2195eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ
2196eda3d33cSJames Hogan	int "Count/Compare Timer Frequency (MHz)"
21972235a54dSSanjay Lal	depends on KVM_GUEST
2198eda3d33cSJames Hogan	default 100
21992235a54dSSanjay Lal	help
2200eda3d33cSJames Hogan	  Set this to non-zero if building a guest kernel for KVM to skip RTC
2201eda3d33cSJames Hogan	  emulation when determining guest CPU Frequency. Instead, the guest's
2202eda3d33cSJames Hogan	  timer frequency is specified directly.
22032235a54dSSanjay Lal
22041e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48
22051e321fa9SLeonid Yegoshin	bool "48 bits virtual memory"
22061e321fa9SLeonid Yegoshin	depends on 64BIT
22071e321fa9SLeonid Yegoshin	help
22083377e227SAlex Belits	  Support a maximum at least 48 bits of application virtual
22093377e227SAlex Belits	  memory.  Default is 40 bits or less, depending on the CPU.
22103377e227SAlex Belits	  For page sizes 16k and above, this option results in a small
22113377e227SAlex Belits	  memory overhead for page tables.  For 4k page size, a fourth
22123377e227SAlex Belits	  level of page tables is added which imposes both a memory
22133377e227SAlex Belits	  overhead as well as slower TLB fault handling.
22143377e227SAlex Belits
22151e321fa9SLeonid Yegoshin	  If unsure, say N.
22161e321fa9SLeonid Yegoshin
22171da177e4SLinus Torvaldschoice
22181da177e4SLinus Torvalds	prompt "Kernel page size"
22191da177e4SLinus Torvalds	default PAGE_SIZE_4KB
22201da177e4SLinus Torvalds
22211da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
22221da177e4SLinus Torvalds	bool "4kB"
2223268a2d60SJiaxun Yang	depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
22241da177e4SLinus Torvalds	help
22251da177e4SLinus Torvalds	  This option select the standard 4kB Linux page size.  On some
22261da177e4SLinus Torvalds	  R3000-family processors this is the only available page size.  Using
22271da177e4SLinus Torvalds	  4kB page size will minimize memory consumption and is therefore
22281da177e4SLinus Torvalds	  recommended for low memory systems.
22291da177e4SLinus Torvalds
22301da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
22311da177e4SLinus Torvalds	bool "8kB"
2232c2aeaaeaSPaul Burton	depends on CPU_CAVIUM_OCTEON
22331e321fa9SLeonid Yegoshin	depends on !MIPS_VA_BITS_48
22341da177e4SLinus Torvalds	help
22351da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
22361da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
2237c2aeaaeaSPaul Burton	  only on cnMIPS processors.  Note that you will need a suitable Linux
2238c2aeaaeaSPaul Burton	  distribution to support this.
22391da177e4SLinus Torvalds
22401da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
22411da177e4SLinus Torvalds	bool "16kB"
2242714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
22431da177e4SLinus Torvalds	help
22441da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
22451da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
2246714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
2247714bfad6SRalf Baechle	  Linux distribution to support this.
22481da177e4SLinus Torvalds
2249c52399beSRalf Baechleconfig PAGE_SIZE_32KB
2250c52399beSRalf Baechle	bool "32kB"
2251c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
22521e321fa9SLeonid Yegoshin	depends on !MIPS_VA_BITS_48
2253c52399beSRalf Baechle	help
2254c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
2255c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
2256c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
2257c52399beSRalf Baechle	  distribution to support this.
2258c52399beSRalf Baechle
22591da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
22601da177e4SLinus Torvalds	bool "64kB"
22613b2db173SPaul Burton	depends on !CPU_R3000 && !CPU_TX39XX
22621da177e4SLinus Torvalds	help
22631da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
22641da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
22651da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
2266714bfad6SRalf Baechle	  writing this option is still high experimental.
22671da177e4SLinus Torvalds
22681da177e4SLinus Torvaldsendchoice
22691da177e4SLinus Torvalds
2270c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
2271c9bace7cSDavid Daney	int "Maximum zone order"
2272e4362d1eSAlex Smith	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2273e4362d1eSAlex Smith	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2274e4362d1eSAlex Smith	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2275e4362d1eSAlex Smith	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2276e4362d1eSAlex Smith	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2277e4362d1eSAlex Smith	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2278c9bace7cSDavid Daney	range 11 64
2279c9bace7cSDavid Daney	default "11"
2280c9bace7cSDavid Daney	help
2281c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
2282c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
2283c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
2284c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
2285c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
2286c9bace7cSDavid Daney	  increase this value.
2287c9bace7cSDavid Daney
2288c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
2289c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
2290c9bace7cSDavid Daney
2291c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
2292c9bace7cSDavid Daney	  when choosing a value for this option.
2293c9bace7cSDavid Daney
22941da177e4SLinus Torvaldsconfig BOARD_SCACHE
22951da177e4SLinus Torvalds	bool
22961da177e4SLinus Torvalds
22971da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
22981da177e4SLinus Torvalds	bool
22991da177e4SLinus Torvalds	select BOARD_SCACHE
23001da177e4SLinus Torvalds
23019318c51aSChris Dearman#
23029318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
23039318c51aSChris Dearman#
23049318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
23059318c51aSChris Dearman	bool
23069318c51aSChris Dearman	select BOARD_SCACHE
23079318c51aSChris Dearman
23081da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
23091da177e4SLinus Torvalds	bool
23101da177e4SLinus Torvalds	select BOARD_SCACHE
23111da177e4SLinus Torvalds
23121da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
23131da177e4SLinus Torvalds	bool
23141da177e4SLinus Torvalds	select BOARD_SCACHE
23151da177e4SLinus Torvalds
23161da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
23171da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
23181da177e4SLinus Torvalds	depends on CPU_SB1
23191da177e4SLinus Torvalds	help
23201da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
23211da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
23221da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
23231da177e4SLinus Torvalds
23241da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
2325c8094b53SRalf Baechle	bool
23261da177e4SLinus Torvalds
23273165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
23283165c846SFlorian Fainelli	bool
2329c2aeaaeaSPaul Burton	default y if !(CPU_R3000 || CPU_TX39XX)
23303165c846SFlorian Fainelli
2331c92e47e5SPaul Burtonconfig MIPS_FP_SUPPORT
2332183b40f9SPaul Burton	bool "Floating Point support" if EXPERT
2333183b40f9SPaul Burton	default y
2334183b40f9SPaul Burton	help
2335183b40f9SPaul Burton	  Select y to include support for floating point in the kernel
2336183b40f9SPaul Burton	  including initialization of FPU hardware, FP context save & restore
2337183b40f9SPaul Burton	  and emulation of an FPU where necessary. Without this support any
2338183b40f9SPaul Burton	  userland program attempting to use floating point instructions will
2339183b40f9SPaul Burton	  receive a SIGILL.
2340183b40f9SPaul Burton
2341183b40f9SPaul Burton	  If you know that your userland will not attempt to use floating point
2342183b40f9SPaul Burton	  instructions then you can say n here to shrink the kernel a little.
2343183b40f9SPaul Burton
2344183b40f9SPaul Burton	  If unsure, say y.
2345c92e47e5SPaul Burton
234697f7dcbfSPaul Burtonconfig CPU_R2300_FPU
234797f7dcbfSPaul Burton	bool
2348c92e47e5SPaul Burton	depends on MIPS_FP_SUPPORT
234997f7dcbfSPaul Burton	default y if CPU_R3000 || CPU_TX39XX
235097f7dcbfSPaul Burton
235154746829SPaul Burtonconfig CPU_R3K_TLB
235254746829SPaul Burton	bool
235354746829SPaul Burton
235491405eb6SFlorian Fainelliconfig CPU_R4K_FPU
235591405eb6SFlorian Fainelli	bool
2356c92e47e5SPaul Burton	depends on MIPS_FP_SUPPORT
235797f7dcbfSPaul Burton	default y if !CPU_R2300_FPU
235891405eb6SFlorian Fainelli
235962cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
236062cedc4fSFlorian Fainelli	bool
236154746829SPaul Burton	default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
236262cedc4fSFlorian Fainelli
236359d6ab86SRalf Baechleconfig MIPS_MT_SMP
2364a92b7f87SMarkos Chandras	bool "MIPS MT SMP support (1 TC on each available VPE)"
23655cbf9688SPaul Burton	default y
2366527f1028SPaul Burton	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
236759d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
2368d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
2369c080faa5SSteven J. Hill	select SYNC_R4K
237059d6ab86SRalf Baechle	select MIPS_MT
237159d6ab86SRalf Baechle	select SMP
237287353d8aSRalf Baechle	select SMP_UP
2373c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
2374c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
2375399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
237659d6ab86SRalf Baechle	help
2377c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
2378c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
2379c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
2380c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
2381c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
238259d6ab86SRalf Baechle
2383f41ae0b2SRalf Baechleconfig MIPS_MT
2384f41ae0b2SRalf Baechle	bool
2385f41ae0b2SRalf Baechle
23860ab7aefcSRalf Baechleconfig SCHED_SMT
23870ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
23880ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
23890ab7aefcSRalf Baechle	default n
23900ab7aefcSRalf Baechle	help
23910ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
23920ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
23930ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
23940ab7aefcSRalf Baechle
23950ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
23960ab7aefcSRalf Baechle	bool
23970ab7aefcSRalf Baechle
2398f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
2399f41ae0b2SRalf Baechle	bool
2400f41ae0b2SRalf Baechle
2401f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
2402f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
2403f088fc84SRalf Baechle	default y
2404b633648cSRalf Baechle	depends on MIPS_MT_SMP
240507cc0c9eSRalf Baechle
2406b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR
2407b0a668fbSLeonid Yegoshin	bool "MIPS R2-to-R6 emulator"
24089eaa9a82SPaul Burton	depends on CPU_MIPSR6
2409c92e47e5SPaul Burton	depends on MIPS_FP_SUPPORT
2410b0a668fbSLeonid Yegoshin	default y
2411b0a668fbSLeonid Yegoshin	help
2412b0a668fbSLeonid Yegoshin	  Choose this option if you want to run non-R6 MIPS userland code.
2413b0a668fbSLeonid Yegoshin	  Even if you say 'Y' here, the emulator will still be disabled by
241407edf0d4SMarkos Chandras	  default. You can enable it using the 'mipsr2emu' kernel option.
2415b0a668fbSLeonid Yegoshin	  The only reason this is a build-time option is to save ~14K from the
2416b0a668fbSLeonid Yegoshin	  final kernel image.
2417b0a668fbSLeonid Yegoshin
2418f35764e7SJames Hoganconfig SYS_SUPPORTS_VPE_LOADER
2419f35764e7SJames Hogan	bool
2420f35764e7SJames Hogan	depends on SYS_SUPPORTS_MULTITHREADING
2421f35764e7SJames Hogan	help
2422f35764e7SJames Hogan	  Indicates that the platform supports the VPE loader, and provides
2423f35764e7SJames Hogan	  physical_memsize.
2424f35764e7SJames Hogan
242507cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
242607cc0c9eSRalf Baechle	bool "VPE loader support."
2427f35764e7SJames Hogan	depends on SYS_SUPPORTS_VPE_LOADER && MODULES
242807cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
242907cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
243007cc0c9eSRalf Baechle	select MIPS_MT
243107cc0c9eSRalf Baechle	help
243207cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
243307cc0c9eSRalf Baechle	  onto another VPE and running it.
2434f088fc84SRalf Baechle
243517a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
243617a1d523SDeng-Cheng Zhu	bool
243717a1d523SDeng-Cheng Zhu	default "y"
243817a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
243917a1d523SDeng-Cheng Zhu
24401a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
24411a2a6d7eSDeng-Cheng Zhu	bool
24421a2a6d7eSDeng-Cheng Zhu	default "y"
24431a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
24441a2a6d7eSDeng-Cheng Zhu
2445e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2446e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2447e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2448e01402b1SRalf Baechle	default y
2449e01402b1SRalf Baechle	help
2450e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2451e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2452e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2453e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2454e01402b1SRalf Baechle
2455e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2456e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2457e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2458e01402b1SRalf Baechle
2459da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2460da615cf6SDeng-Cheng Zhu	bool
2461da615cf6SDeng-Cheng Zhu	default "y"
2462da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2463da615cf6SDeng-Cheng Zhu
24642c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
24652c973ef0SDeng-Cheng Zhu	bool
24662c973ef0SDeng-Cheng Zhu	default "y"
24672c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
24682c973ef0SDeng-Cheng Zhu
24694a16ff4cSRalf Baechleconfig MIPS_CMP
24705cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
24715676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2472b10b43baSMarkos Chandras	select SMP
2473eb9b5141STim Anderson	select SYNC_R4K
2474b10b43baSMarkos Chandras	select SYS_SUPPORTS_SMP
24754a16ff4cSRalf Baechle	select WEAK_ORDERING
24764a16ff4cSRalf Baechle	default n
24774a16ff4cSRalf Baechle	help
2478044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2479044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2480044505c7SPaul Burton	  its ability to start secondary CPUs.
24814a16ff4cSRalf Baechle
24825cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
24835cac93b3SPaul Burton	  instead of this.
24845cac93b3SPaul Burton
24850ee958e1SPaul Burtonconfig MIPS_CPS
24860ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
24875a3e7c02SPaul Burton	depends on SYS_SUPPORTS_MIPS_CPS
24880ee958e1SPaul Burton	select MIPS_CM
24891d8f1f5aSPaul Burton	select MIPS_CPS_PM if HOTPLUG_CPU
24900ee958e1SPaul Burton	select SMP
24910ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
24921d8f1f5aSPaul Burton	select SYS_SUPPORTS_HOTPLUG_CPU
2493c8b7712cSPaul Burton	select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
24940ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
24950ee958e1SPaul Burton	select WEAK_ORDERING
24960ee958e1SPaul Burton	help
24970ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
24980ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
24990ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
25000ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
25010ee958e1SPaul Burton	  support is unavailable.
25020ee958e1SPaul Burton
25033179d37eSPaul Burtonconfig MIPS_CPS_PM
250439a59593SMarkos Chandras	depends on MIPS_CPS
25053179d37eSPaul Burton	bool
25063179d37eSPaul Burton
25079f98f3ddSPaul Burtonconfig MIPS_CM
25089f98f3ddSPaul Burton	bool
25093c9b4166SPaul Burton	select MIPS_CPC
25109f98f3ddSPaul Burton
25119c38cf44SPaul Burtonconfig MIPS_CPC
25129c38cf44SPaul Burton	bool
25132600990eSRalf Baechle
25141da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
25151da177e4SLinus Torvalds	bool
25161da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
25171da177e4SLinus Torvalds	default y
25181da177e4SLinus Torvalds
25191da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
25201da177e4SLinus Torvalds	bool
25211da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
25221da177e4SLinus Torvalds	default y
25231da177e4SLinus Torvalds
25249e2b5372SMarkos Chandraschoice
25259e2b5372SMarkos Chandras	prompt "SmartMIPS or microMIPS ASE support"
25269e2b5372SMarkos Chandras
25279e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
25289e2b5372SMarkos Chandras	bool "None"
25299e2b5372SMarkos Chandras	help
25309e2b5372SMarkos Chandras	  Select this if you want neither microMIPS nor SmartMIPS support
25319e2b5372SMarkos Chandras
25329693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
25339693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
25349e2b5372SMarkos Chandras	bool "SmartMIPS"
25359693a853SFranck Bui-Huu	help
25369693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
25379693a853SFranck Bui-Huu	  increased security at both hardware and software level for
25389693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
25399693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
25409693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
25419693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
25429693a853SFranck Bui-Huu	  here.
25439693a853SFranck Bui-Huu
2544bce86083SSteven J. Hillconfig CPU_MICROMIPS
25457fd08ca5SLeonid Yegoshin	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
25469e2b5372SMarkos Chandras	bool "microMIPS"
2547bce86083SSteven J. Hill	help
2548bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2549bce86083SSteven J. Hill	  microMIPS ISA
2550bce86083SSteven J. Hill
25519e2b5372SMarkos Chandrasendchoice
25529e2b5372SMarkos Chandras
2553a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
25540ce3417eSPaul Burton	bool "Support for the MIPS SIMD Architecture"
2555a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
2556c92e47e5SPaul Burton	depends on MIPS_FP_SUPPORT
25572a6cb669SPaul Burton	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2558a5e9a69eSPaul Burton	help
2559a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2560a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
25611db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
25621db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
25631db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
25641db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
25651db1af84SPaul Burton	  the size & complexity of your kernel.
2566a5e9a69eSPaul Burton
2567a5e9a69eSPaul Burton	  If unsure, say Y.
2568a5e9a69eSPaul Burton
25691da177e4SLinus Torvaldsconfig CPU_HAS_WB
2570f7062ddbSRalf Baechle	bool
2571e01402b1SRalf Baechle
2572df0ac8a4SKevin Cernekeeconfig XKS01
2573df0ac8a4SKevin Cernekee	bool
2574df0ac8a4SKevin Cernekee
2575ba9196d2SJiaxun Yangconfig CPU_HAS_DIEI
2576ba9196d2SJiaxun Yang	depends on !CPU_DIEI_BROKEN
2577ba9196d2SJiaxun Yang	bool
2578ba9196d2SJiaxun Yang
2579ba9196d2SJiaxun Yangconfig CPU_DIEI_BROKEN
2580ba9196d2SJiaxun Yang	bool
2581ba9196d2SJiaxun Yang
25828256b17eSFlorian Fainelliconfig CPU_HAS_RIXI
25838256b17eSFlorian Fainelli	bool
25848256b17eSFlorian Fainelli
258518d84e2eSAlexander Lobakinconfig CPU_NO_LOAD_STORE_LR
2586932afdeeSYasha Cherikovsky	bool
2587932afdeeSYasha Cherikovsky	help
258818d84e2eSAlexander Lobakin	  CPU lacks support for unaligned load and store instructions:
2589932afdeeSYasha Cherikovsky	  LWL, LWR, SWL, SWR (Load/store word left/right).
259018d84e2eSAlexander Lobakin	  LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
259118d84e2eSAlexander Lobakin	  systems).
2592932afdeeSYasha Cherikovsky
2593f41ae0b2SRalf Baechle#
2594f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2595f41ae0b2SRalf Baechle#
2596e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2597f41ae0b2SRalf Baechle	bool
2598e01402b1SRalf Baechle
2599f41ae0b2SRalf Baechle#
2600f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2601f41ae0b2SRalf Baechle#
2602e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2603f41ae0b2SRalf Baechle	bool
2604e01402b1SRalf Baechle
26051da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
26061da177e4SLinus Torvalds	bool
26071da177e4SLinus Torvalds	depends on !CPU_R3000
26081da177e4SLinus Torvalds	default y
26091da177e4SLinus Torvalds
26101da177e4SLinus Torvalds#
261120d60d99SMaciej W. Rozycki# CPU non-features
261220d60d99SMaciej W. Rozycki#
261320d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
261420d60d99SMaciej W. Rozycki	bool
261520d60d99SMaciej W. Rozycki
261620d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
261720d60d99SMaciej W. Rozycki	bool
261820d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
261920d60d99SMaciej W. Rozycki
262020d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
262120d60d99SMaciej W. Rozycki	bool
262220d60d99SMaciej W. Rozycki
2623071d2f0bSPaul Burtonconfig CPU_R4X00_BUGS64
2624071d2f0bSPaul Burton	bool
2625071d2f0bSPaul Burton	default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2626071d2f0bSPaul Burton
26274edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT
26284edf00a4SPaul Burton	int
26294edf00a4SPaul Burton	default 6 if CPU_R3000 || CPU_TX39XX
26304edf00a4SPaul Burton	default 0
26314edf00a4SPaul Burton
26324edf00a4SPaul Burtonconfig MIPS_ASID_BITS
26334edf00a4SPaul Burton	int
26342db003a5SPaul Burton	default 0 if MIPS_ASID_BITS_VARIABLE
26354edf00a4SPaul Burton	default 6 if CPU_R3000 || CPU_TX39XX
26364edf00a4SPaul Burton	default 8
26374edf00a4SPaul Burton
26382db003a5SPaul Burtonconfig MIPS_ASID_BITS_VARIABLE
26392db003a5SPaul Burton	bool
26402db003a5SPaul Burton
26414a5dc51eSMarcin Nowakowskiconfig MIPS_CRC_SUPPORT
26424a5dc51eSMarcin Nowakowski	bool
26434a5dc51eSMarcin Nowakowski
264420d60d99SMaciej W. Rozycki#
26451da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
26461da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
26471da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
26481da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
26491da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
26501da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
26511da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
26521da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2653797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2654797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2655797798c1SRalf Baechle#   support.
26561da177e4SLinus Torvalds#
26571da177e4SLinus Torvaldsconfig HIGHMEM
26581da177e4SLinus Torvalds	bool "High Memory Support"
2659a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2660797798c1SRalf Baechle
2661797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2662797798c1SRalf Baechle	bool
2663797798c1SRalf Baechle
2664797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2665797798c1SRalf Baechle	bool
26661da177e4SLinus Torvalds
26679693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
26689693a853SFranck Bui-Huu	bool
26699693a853SFranck Bui-Huu
2670a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2671a6a4834cSSteven J. Hill	bool
2672a6a4834cSSteven J. Hill
2673377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16
2674377cb1b6SRalf Baechle	bool
2675377cb1b6SRalf Baechle	help
2676377cb1b6SRalf Baechle	  This option must be set if a kernel might be executed on a MIPS16-
2677377cb1b6SRalf Baechle	  enabled CPU even if MIPS16 is not actually being used.  In other
2678377cb1b6SRalf Baechle	  words, it makes the kernel MIPS16-tolerant.
2679377cb1b6SRalf Baechle
2680a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2681a5e9a69eSPaul Burton	bool
2682a5e9a69eSPaul Burton
2683b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2684b4819b59SYoichi Yuasa	def_bool y
2685268a2d60SJiaxun Yang	depends on !NUMA && !CPU_LOONGSON2EF
2686b4819b59SYoichi Yuasa
2687b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2688b1c6cd42SAtsushi Nemoto	bool
2689397dc00eSMike Rapoport	select SPARSEMEM_STATIC if !SGI_IP27
269031473747SAtsushi Nemoto
2691d8cb4e11SRalf Baechleconfig NUMA
2692d8cb4e11SRalf Baechle	bool "NUMA Support"
2693d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2694d8cb4e11SRalf Baechle	help
2695d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2696d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2697d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2698172a37e9SRandy Dunlap	  leave it disabled; on single node systems leave this option
2699d8cb4e11SRalf Baechle	  disabled.
2700d8cb4e11SRalf Baechle
2701d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2702d8cb4e11SRalf Baechle	bool
2703d8cb4e11SRalf Baechle
2704f3c560a6SThomas Bogendoerferconfig HAVE_SETUP_PER_CPU_AREA
2705f3c560a6SThomas Bogendoerfer	def_bool y
2706f3c560a6SThomas Bogendoerfer	depends on NUMA
2707f3c560a6SThomas Bogendoerfer
2708f3c560a6SThomas Bogendoerferconfig NEED_PER_CPU_EMBED_FIRST_CHUNK
2709f3c560a6SThomas Bogendoerfer	def_bool y
2710f3c560a6SThomas Bogendoerfer	depends on NUMA
2711f3c560a6SThomas Bogendoerfer
27128c530ea3SMatt Redfearnconfig RELOCATABLE
27138c530ea3SMatt Redfearn	bool "Relocatable kernel"
27143ff72be4SSteven J. Hill	depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
27158c530ea3SMatt Redfearn	help
27168c530ea3SMatt Redfearn	  This builds a kernel image that retains relocation information
27178c530ea3SMatt Redfearn	  so it can be loaded someplace besides the default 1MB.
27188c530ea3SMatt Redfearn	  The relocations make the kernel binary about 15% larger,
27198c530ea3SMatt Redfearn	  but are discarded at runtime
27208c530ea3SMatt Redfearn
2721069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE
2722069fd766SMatt Redfearn	hex "Relocation table size"
2723069fd766SMatt Redfearn	depends on RELOCATABLE
2724069fd766SMatt Redfearn	range 0x0 0x01000000
2725069fd766SMatt Redfearn	default "0x00100000"
2726069fd766SMatt Redfearn	---help---
2727069fd766SMatt Redfearn	  A table of relocation data will be appended to the kernel binary
2728069fd766SMatt Redfearn	  and parsed at boot to fix up the relocated kernel.
2729069fd766SMatt Redfearn
2730069fd766SMatt Redfearn	  This option allows the amount of space reserved for the table to be
2731069fd766SMatt Redfearn	  adjusted, although the default of 1Mb should be ok in most cases.
2732069fd766SMatt Redfearn
2733069fd766SMatt Redfearn	  The build will fail and a valid size suggested if this is too small.
2734069fd766SMatt Redfearn
2735069fd766SMatt Redfearn	  If unsure, leave at the default value.
2736069fd766SMatt Redfearn
2737405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE
2738405bc8fdSMatt Redfearn	bool "Randomize the address of the kernel image"
2739405bc8fdSMatt Redfearn	depends on RELOCATABLE
2740405bc8fdSMatt Redfearn	---help---
2741405bc8fdSMatt Redfearn	  Randomizes the physical and virtual address at which the
2742405bc8fdSMatt Redfearn	  kernel image is loaded, as a security feature that
2743405bc8fdSMatt Redfearn	  deters exploit attempts relying on knowledge of the location
2744405bc8fdSMatt Redfearn	  of kernel internals.
2745405bc8fdSMatt Redfearn
2746405bc8fdSMatt Redfearn	  Entropy is generated using any coprocessor 0 registers available.
2747405bc8fdSMatt Redfearn
2748405bc8fdSMatt Redfearn	  The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2749405bc8fdSMatt Redfearn
2750405bc8fdSMatt Redfearn	  If unsure, say N.
2751405bc8fdSMatt Redfearn
2752405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET
2753405bc8fdSMatt Redfearn	hex "Maximum kASLR offset" if EXPERT
2754405bc8fdSMatt Redfearn	depends on RANDOMIZE_BASE
2755405bc8fdSMatt Redfearn	range 0x0 0x40000000 if EVA || 64BIT
2756405bc8fdSMatt Redfearn	range 0x0 0x08000000
2757405bc8fdSMatt Redfearn	default "0x01000000"
2758405bc8fdSMatt Redfearn	---help---
2759405bc8fdSMatt Redfearn	  When kASLR is active, this provides the maximum offset that will
2760405bc8fdSMatt Redfearn	  be applied to the kernel image. It should be set according to the
2761405bc8fdSMatt Redfearn	  amount of physical RAM available in the target system minus
2762405bc8fdSMatt Redfearn	  PHYSICAL_START and must be a power of 2.
2763405bc8fdSMatt Redfearn
2764405bc8fdSMatt Redfearn	  This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2765405bc8fdSMatt Redfearn	  EVA or 64-bit. The default is 16Mb.
2766405bc8fdSMatt Redfearn
2767c80d79d7SYasunori Gotoconfig NODES_SHIFT
2768c80d79d7SYasunori Goto	int
2769c80d79d7SYasunori Goto	default "6"
2770c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2771c80d79d7SYasunori Goto
277214f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
277314f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
2774268a2d60SJiaxun Yang	depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
277514f70012SDeng-Cheng Zhu	default y
277614f70012SDeng-Cheng Zhu	help
277714f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
277814f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
277914f70012SDeng-Cheng Zhu
2780be8fa1cbSTiezhu Yangconfig DMI
2781be8fa1cbSTiezhu Yang	bool "Enable DMI scanning"
2782be8fa1cbSTiezhu Yang	depends on MACH_LOONGSON64
2783be8fa1cbSTiezhu Yang	select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2784be8fa1cbSTiezhu Yang	default y
2785be8fa1cbSTiezhu Yang	help
2786be8fa1cbSTiezhu Yang	  Enabled scanning of DMI to identify machine quirks. Say Y
2787be8fa1cbSTiezhu Yang	  here unless you have verified that your setup is not
2788be8fa1cbSTiezhu Yang	  affected by entries in the DMI blacklist. Required by PNP
2789be8fa1cbSTiezhu Yang	  BIOS code.
2790be8fa1cbSTiezhu Yang
27911da177e4SLinus Torvaldsconfig SMP
27921da177e4SLinus Torvalds	bool "Multi-Processing support"
2793e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2794e73ea273SRalf Baechle	help
27951da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
27964a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
27974a474157SRobert Graffham	  than one CPU, say Y.
27981da177e4SLinus Torvalds
27994a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
28001da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
28011da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
28024a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
28031da177e4SLinus Torvalds	  will run faster if you say N here.
28041da177e4SLinus Torvalds
28051da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
28061da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
28071da177e4SLinus Torvalds
280803502faaSAdrian Bunk	  See also the SMP-HOWTO available at
280903502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
28101da177e4SLinus Torvalds
28111da177e4SLinus Torvalds	  If you don't know what to do here, say N.
28121da177e4SLinus Torvalds
28137840d618SMatt Redfearnconfig HOTPLUG_CPU
28147840d618SMatt Redfearn	bool "Support for hot-pluggable CPUs"
28157840d618SMatt Redfearn	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
28167840d618SMatt Redfearn	help
28177840d618SMatt Redfearn	  Say Y here to allow turning CPUs off and on. CPUs can be
28187840d618SMatt Redfearn	  controlled through /sys/devices/system/cpu.
28197840d618SMatt Redfearn	  (Note: power management support will enable this option
28207840d618SMatt Redfearn	    automatically on SMP systems. )
28217840d618SMatt Redfearn	  Say N if you want to disable CPU hotplug.
28227840d618SMatt Redfearn
282387353d8aSRalf Baechleconfig SMP_UP
282487353d8aSRalf Baechle	bool
282587353d8aSRalf Baechle
28264a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
28274a16ff4cSRalf Baechle	bool
28284a16ff4cSRalf Baechle
28290ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
28300ee958e1SPaul Burton	bool
28310ee958e1SPaul Burton
2832e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2833e73ea273SRalf Baechle	bool
2834e73ea273SRalf Baechle
2835130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2836130e2fb7SRalf Baechle	bool
2837130e2fb7SRalf Baechle
2838130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2839130e2fb7SRalf Baechle	bool
2840130e2fb7SRalf Baechle
2841130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2842130e2fb7SRalf Baechle	bool
2843130e2fb7SRalf Baechle
2844130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2845130e2fb7SRalf Baechle	bool
2846130e2fb7SRalf Baechle
2847130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2848130e2fb7SRalf Baechle	bool
2849130e2fb7SRalf Baechle
28501da177e4SLinus Torvaldsconfig NR_CPUS
2851a91796a9SJayachandran C	int "Maximum number of CPUs (2-256)"
2852a91796a9SJayachandran C	range 2 256
28531da177e4SLinus Torvalds	depends on SMP
2854130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2855130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2856130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2857130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2858130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
28591da177e4SLinus Torvalds	help
28601da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
28611da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
28621da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
286372ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
286472ede9b1SAtsushi Nemoto	  and 2 for all others.
28651da177e4SLinus Torvalds
28661da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
286772ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
286872ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
286972ede9b1SAtsushi Nemoto	  power of two.
28701da177e4SLinus Torvalds
2871399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2872399aaa25SAl Cooper	bool
2873399aaa25SAl Cooper
28747820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP_1024
28757820b84bSDavid Daney	bool
28767820b84bSDavid Daney
28777820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP
28787820b84bSDavid Daney	int
28797820b84bSDavid Daney	depends on SMP
28807820b84bSDavid Daney	default 1024 if MIPS_NR_CPU_NR_MAP_1024
28817820b84bSDavid Daney	default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
28827820b84bSDavid Daney
28831723b4a3SAtsushi Nemoto#
28841723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
28851723b4a3SAtsushi Nemoto#
28861723b4a3SAtsushi Nemoto
28871723b4a3SAtsushi Nemotochoice
28881723b4a3SAtsushi Nemoto	prompt "Timer frequency"
28891723b4a3SAtsushi Nemoto	default HZ_250
28901723b4a3SAtsushi Nemoto	help
28911723b4a3SAtsushi Nemoto	  Allows the configuration of the timer frequency.
28921723b4a3SAtsushi Nemoto
289367596573SPaul Burton	config HZ_24
289467596573SPaul Burton		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
289567596573SPaul Burton
28961723b4a3SAtsushi Nemoto	config HZ_48
28970f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
28981723b4a3SAtsushi Nemoto
28991723b4a3SAtsushi Nemoto	config HZ_100
29001723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
29011723b4a3SAtsushi Nemoto
29021723b4a3SAtsushi Nemoto	config HZ_128
29031723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
29041723b4a3SAtsushi Nemoto
29051723b4a3SAtsushi Nemoto	config HZ_250
29061723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
29071723b4a3SAtsushi Nemoto
29081723b4a3SAtsushi Nemoto	config HZ_256
29091723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
29101723b4a3SAtsushi Nemoto
29111723b4a3SAtsushi Nemoto	config HZ_1000
29121723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
29131723b4a3SAtsushi Nemoto
29141723b4a3SAtsushi Nemoto	config HZ_1024
29151723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
29161723b4a3SAtsushi Nemoto
29171723b4a3SAtsushi Nemotoendchoice
29181723b4a3SAtsushi Nemoto
291967596573SPaul Burtonconfig SYS_SUPPORTS_24HZ
292067596573SPaul Burton	bool
292167596573SPaul Burton
29221723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
29231723b4a3SAtsushi Nemoto	bool
29241723b4a3SAtsushi Nemoto
29251723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
29261723b4a3SAtsushi Nemoto	bool
29271723b4a3SAtsushi Nemoto
29281723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
29291723b4a3SAtsushi Nemoto	bool
29301723b4a3SAtsushi Nemoto
29311723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
29321723b4a3SAtsushi Nemoto	bool
29331723b4a3SAtsushi Nemoto
29341723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
29351723b4a3SAtsushi Nemoto	bool
29361723b4a3SAtsushi Nemoto
29371723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
29381723b4a3SAtsushi Nemoto	bool
29391723b4a3SAtsushi Nemoto
29401723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
29411723b4a3SAtsushi Nemoto	bool
29421723b4a3SAtsushi Nemoto
29431723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
29441723b4a3SAtsushi Nemoto	bool
294567596573SPaul Burton	default y if !SYS_SUPPORTS_24HZ && \
294667596573SPaul Burton		     !SYS_SUPPORTS_48HZ && \
294767596573SPaul Burton		     !SYS_SUPPORTS_100HZ && \
294867596573SPaul Burton		     !SYS_SUPPORTS_128HZ && \
294967596573SPaul Burton		     !SYS_SUPPORTS_250HZ && \
295067596573SPaul Burton		     !SYS_SUPPORTS_256HZ && \
295167596573SPaul Burton		     !SYS_SUPPORTS_1000HZ && \
29521723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
29531723b4a3SAtsushi Nemoto
29541723b4a3SAtsushi Nemotoconfig HZ
29551723b4a3SAtsushi Nemoto	int
295667596573SPaul Burton	default 24 if HZ_24
29571723b4a3SAtsushi Nemoto	default 48 if HZ_48
29581723b4a3SAtsushi Nemoto	default 100 if HZ_100
29591723b4a3SAtsushi Nemoto	default 128 if HZ_128
29601723b4a3SAtsushi Nemoto	default 250 if HZ_250
29611723b4a3SAtsushi Nemoto	default 256 if HZ_256
29621723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
29631723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
29641723b4a3SAtsushi Nemoto
296596685b17SDeng-Cheng Zhuconfig SCHED_HRTICK
296696685b17SDeng-Cheng Zhu	def_bool HIGH_RES_TIMERS
296796685b17SDeng-Cheng Zhu
2968ea6e942bSAtsushi Nemotoconfig KEXEC
29697d60717eSKees Cook	bool "Kexec system call"
29702965faa5SDave Young	select KEXEC_CORE
2971ea6e942bSAtsushi Nemoto	help
2972ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2973ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
29743dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2975ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2976ea6e942bSAtsushi Nemoto
297701dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2978ea6e942bSAtsushi Nemoto
2979ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2980ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2981bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2982bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2983bf220695SGeert Uytterhoeven	  made.
2984ea6e942bSAtsushi Nemoto
29857aa1c8f4SRalf Baechleconfig CRASH_DUMP
29867aa1c8f4SRalf Baechle	bool "Kernel crash dumps"
29877aa1c8f4SRalf Baechle	help
29887aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
29897aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
29907aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
29917aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
29927aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
29937aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
29947aa1c8f4SRalf Baechle	  PHYSICAL_START.
29957aa1c8f4SRalf Baechle
29967aa1c8f4SRalf Baechleconfig PHYSICAL_START
29977aa1c8f4SRalf Baechle	hex "Physical address where the kernel is loaded"
29988bda3e26SMaciej W. Rozycki	default "0xffffffff84000000"
29997aa1c8f4SRalf Baechle	depends on CRASH_DUMP
30007aa1c8f4SRalf Baechle	help
30017aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
30027aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
30037aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
30047aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
30057aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
30067aa1c8f4SRalf Baechle
3007ea6e942bSAtsushi Nemotoconfig SECCOMP
3008ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
3009293c5bd1SRalf Baechle	depends on PROC_FS
3010ea6e942bSAtsushi Nemoto	default y
3011ea6e942bSAtsushi Nemoto	help
3012ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
3013ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
3014ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
3015ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
3016ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
3017ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
3018ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
3019ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
3020ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
3021ea6e942bSAtsushi Nemoto
3022ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
3023ea6e942bSAtsushi Nemoto
3024597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
3025b7f1e273SPaul Burton	bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3026597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
3027597ce172SPaul Burton	help
3028597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
3029597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
3030597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3031597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
3032597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
3033597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
3034597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
3035597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
3036597ce172SPaul Burton	  saying N here.
3037597ce172SPaul Burton
303806e2e882SPaul Burton	  Although binutils currently supports use of this flag the details
303906e2e882SPaul Burton	  concerning its effect upon the O32 ABI in userland are still being
304006e2e882SPaul Burton	  worked on. In order to avoid userland becoming dependant upon current
304106e2e882SPaul Burton	  behaviour before the details have been finalised, this option should
304206e2e882SPaul Burton	  be considered experimental and only enabled by those working upon
304306e2e882SPaul Burton	  said details.
304406e2e882SPaul Burton
304506e2e882SPaul Burton	  If unsure, say N.
3046597ce172SPaul Burton
3047f2ffa5abSDezhong Diaoconfig USE_OF
30480b3e06fdSJonas Gorski	bool
3049f2ffa5abSDezhong Diao	select OF
3050e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
3051abd2363fSGrant Likely	select IRQ_DOMAIN
3052f2ffa5abSDezhong Diao
30532fe8ea39SDengcheng Zhuconfig UHI_BOOT
30542fe8ea39SDengcheng Zhu	bool
30552fe8ea39SDengcheng Zhu
30567fafb068SAndrew Brestickerconfig BUILTIN_DTB
30577fafb068SAndrew Bresticker	bool
30587fafb068SAndrew Bresticker
30591da8f179SJonas Gorskichoice
30605b24d52cSJonas Gorski	prompt "Kernel appended dtb support" if USE_OF
30611da8f179SJonas Gorski	default MIPS_NO_APPENDED_DTB
30621da8f179SJonas Gorski
30631da8f179SJonas Gorski	config MIPS_NO_APPENDED_DTB
30641da8f179SJonas Gorski		bool "None"
30651da8f179SJonas Gorski		help
30661da8f179SJonas Gorski		  Do not enable appended dtb support.
30671da8f179SJonas Gorski
306887db537dSAaro Koskinen	config MIPS_ELF_APPENDED_DTB
306987db537dSAaro Koskinen		bool "vmlinux"
307087db537dSAaro Koskinen		help
307187db537dSAaro Koskinen		  With this option, the boot code will look for a device tree binary
307287db537dSAaro Koskinen		  DTB) included in the vmlinux ELF section .appended_dtb. By default
307387db537dSAaro Koskinen		  it is empty and the DTB can be appended using binutils command
307487db537dSAaro Koskinen		  objcopy:
307587db537dSAaro Koskinen
307687db537dSAaro Koskinen		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
307787db537dSAaro Koskinen
307887db537dSAaro Koskinen		  This is meant as a backward compatiblity convenience for those
307987db537dSAaro Koskinen		  systems with a bootloader that can't be upgraded to accommodate
308087db537dSAaro Koskinen		  the documented boot protocol using a device tree.
308187db537dSAaro Koskinen
30821da8f179SJonas Gorski	config MIPS_RAW_APPENDED_DTB
3083b8f54f2cSJonas Gorski		bool "vmlinux.bin or vmlinuz.bin"
30841da8f179SJonas Gorski		help
30851da8f179SJonas Gorski		  With this option, the boot code will look for a device tree binary
3086b8f54f2cSJonas Gorski		  DTB) appended to raw vmlinux.bin or vmlinuz.bin.
30871da8f179SJonas Gorski		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
30881da8f179SJonas Gorski
30891da8f179SJonas Gorski		  This is meant as a backward compatibility convenience for those
30901da8f179SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
30911da8f179SJonas Gorski		  the documented boot protocol using a device tree.
30921da8f179SJonas Gorski
30931da8f179SJonas Gorski		  Beware that there is very little in terms of protection against
30941da8f179SJonas Gorski		  this option being confused by leftover garbage in memory that might
30951da8f179SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
30961da8f179SJonas Gorski		  to vmlinux.bin.  Do not leave this option active in a production kernel
30971da8f179SJonas Gorski		  if you don't intend to always append a DTB.
30981da8f179SJonas Gorskiendchoice
30991da8f179SJonas Gorski
31002024972eSJonas Gorskichoice
31012024972eSJonas Gorski	prompt "Kernel command line type" if !CMDLINE_OVERRIDE
31022bcef9b4SJonas Gorski	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
310387fcfa7bSJiaxun Yang					 !MACH_LOONGSON64 && !MIPS_MALTA && \
31042bcef9b4SJonas Gorski					 !CAVIUM_OCTEON_SOC
31052024972eSJonas Gorski	default MIPS_CMDLINE_FROM_BOOTLOADER
31062024972eSJonas Gorski
31072024972eSJonas Gorski	config MIPS_CMDLINE_FROM_DTB
31082024972eSJonas Gorski		depends on USE_OF
31092024972eSJonas Gorski		bool "Dtb kernel arguments if available"
31102024972eSJonas Gorski
31112024972eSJonas Gorski	config MIPS_CMDLINE_DTB_EXTEND
31122024972eSJonas Gorski		depends on USE_OF
31132024972eSJonas Gorski		bool "Extend dtb kernel arguments with bootloader arguments"
31142024972eSJonas Gorski
31152024972eSJonas Gorski	config MIPS_CMDLINE_FROM_BOOTLOADER
31162024972eSJonas Gorski		bool "Bootloader kernel arguments if available"
3117ed47e153SRabin Vincent
3118ed47e153SRabin Vincent	config MIPS_CMDLINE_BUILTIN_EXTEND
3119ed47e153SRabin Vincent		depends on CMDLINE_BOOL
3120ed47e153SRabin Vincent		bool "Extend builtin kernel arguments with bootloader arguments"
31212024972eSJonas Gorskiendchoice
31222024972eSJonas Gorski
31235e83d430SRalf Baechleendmenu
31245e83d430SRalf Baechle
31251df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
31261df0f0ffSAtsushi Nemoto	bool
31271df0f0ffSAtsushi Nemoto	default y
31281df0f0ffSAtsushi Nemoto
31291df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
31301df0f0ffSAtsushi Nemoto	bool
31311df0f0ffSAtsushi Nemoto	default y
31321df0f0ffSAtsushi Nemoto
3133a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS
3134a728ab52SKirill A. Shutemov	int
31353377e227SAlex Belits	default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3136a728ab52SKirill A. Shutemov	default 3 if 64BIT && !PAGE_SIZE_64KB
3137a728ab52SKirill A. Shutemov	default 2
3138a728ab52SKirill A. Shutemov
31396c359eb1SPaul Burtonconfig MIPS_AUTO_PFN_OFFSET
31406c359eb1SPaul Burton	bool
31416c359eb1SPaul Burton
31421da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
31431da177e4SLinus Torvalds
3144c5611df9SPaul Burtonconfig PCI_DRIVERS_GENERIC
31452eac9c2dSChristoph Hellwig	select PCI_DOMAINS_GENERIC if PCI
3146c5611df9SPaul Burton	bool
3147c5611df9SPaul Burton
3148c5611df9SPaul Burtonconfig PCI_DRIVERS_LEGACY
3149c5611df9SPaul Burton	def_bool !PCI_DRIVERS_GENERIC
3150c5611df9SPaul Burton	select NO_GENERIC_PCI_IOPORT_MAP
31512eac9c2dSChristoph Hellwig	select PCI_DOMAINS if PCI
31521da177e4SLinus Torvalds
31531da177e4SLinus Torvalds#
31541da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
31551da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
31561da177e4SLinus Torvalds# users to choose the right thing ...
31571da177e4SLinus Torvalds#
31581da177e4SLinus Torvaldsconfig ISA
31591da177e4SLinus Torvalds	bool
31601da177e4SLinus Torvalds
31611da177e4SLinus Torvaldsconfig TC
31621da177e4SLinus Torvalds	bool "TURBOchannel support"
31631da177e4SLinus Torvalds	depends on MACH_DECSTATION
31641da177e4SLinus Torvalds	help
316550a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
316650a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
316750a23e6eSJustin P. Mattock	  at:
316850a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
316950a23e6eSJustin P. Mattock	  and:
317050a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
317150a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
317250a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
31731da177e4SLinus Torvalds
31741da177e4SLinus Torvaldsconfig MMU
31751da177e4SLinus Torvalds	bool
31761da177e4SLinus Torvalds	default y
31771da177e4SLinus Torvalds
3178109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MIN
3179109c32ffSMatt Redfearn	default 12 if 64BIT
3180109c32ffSMatt Redfearn	default 8
3181109c32ffSMatt Redfearn
3182109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MAX
3183109c32ffSMatt Redfearn	default 18 if 64BIT
3184109c32ffSMatt Redfearn	default 15
3185109c32ffSMatt Redfearn
3186109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MIN
3187109c32ffSMatt Redfearn	default 8
3188109c32ffSMatt Redfearn
3189109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MAX
3190109c32ffSMatt Redfearn	default 15
3191109c32ffSMatt Redfearn
3192d865bea4SRalf Baechleconfig I8253
3193d865bea4SRalf Baechle	bool
3194798778b8SRussell King	select CLKSRC_I8253
31952d02612fSThomas Gleixner	select CLKEVT_I8253
31969726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
3197d865bea4SRalf Baechle
3198e05eb3f8SRalf Baechleconfig ZONE_DMA
3199e05eb3f8SRalf Baechle	bool
3200e05eb3f8SRalf Baechle
3201cce335aeSRalf Baechleconfig ZONE_DMA32
3202cce335aeSRalf Baechle	bool
3203cce335aeSRalf Baechle
32041da177e4SLinus Torvaldsendmenu
32051da177e4SLinus Torvalds
32061da177e4SLinus Torvaldsconfig TRAD_SIGNALS
32071da177e4SLinus Torvalds	bool
32081da177e4SLinus Torvalds
32091da177e4SLinus Torvaldsconfig MIPS32_COMPAT
321078aaf956SRalf Baechle	bool
32111da177e4SLinus Torvalds
32121da177e4SLinus Torvaldsconfig COMPAT
32131da177e4SLinus Torvalds	bool
32141da177e4SLinus Torvalds
321505e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
321605e43966SAtsushi Nemoto	bool
321705e43966SAtsushi Nemoto
32181da177e4SLinus Torvaldsconfig MIPS32_O32
32191da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
322078aaf956SRalf Baechle	depends on 64BIT
322178aaf956SRalf Baechle	select ARCH_WANT_OLD_COMPAT_IPC
322278aaf956SRalf Baechle	select COMPAT
322378aaf956SRalf Baechle	select MIPS32_COMPAT
322478aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
32251da177e4SLinus Torvalds	help
32261da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
32271da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
32281da177e4SLinus Torvalds	  existing binaries are in this format.
32291da177e4SLinus Torvalds
32301da177e4SLinus Torvalds	  If unsure, say Y.
32311da177e4SLinus Torvalds
32321da177e4SLinus Torvaldsconfig MIPS32_N32
32331da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
3234c22eacfeSRalf Baechle	depends on 64BIT
32355a9372f7SArnd Bergmann	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
323678aaf956SRalf Baechle	select COMPAT
323778aaf956SRalf Baechle	select MIPS32_COMPAT
323878aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
32391da177e4SLinus Torvalds	help
32401da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
32411da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
32421da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
32431da177e4SLinus Torvalds	  cases.
32441da177e4SLinus Torvalds
32451da177e4SLinus Torvalds	  If unsure, say N.
32461da177e4SLinus Torvalds
32471da177e4SLinus Torvaldsconfig BINFMT_ELF32
32481da177e4SLinus Torvalds	bool
32491da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
3250f43edca7SRalf Baechle	select ELFCORE
32511da177e4SLinus Torvalds
32522116245eSRalf Baechlemenu "Power management options"
3253952fa954SRodolfo Giometti
3254363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
3255363c55caSWu Zhangjin	def_bool y
32563f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3257363c55caSWu Zhangjin
3258f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
3259f4cb5700SJohannes Berg	def_bool y
32603f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3261f4cb5700SJohannes Berg
32622116245eSRalf Baechlesource "kernel/power/Kconfig"
3263952fa954SRodolfo Giometti
32641da177e4SLinus Torvaldsendmenu
32651da177e4SLinus Torvalds
32667a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
32677a998935SViresh Kumar	bool
32687a998935SViresh Kumar
32697a998935SViresh Kumarmenu "CPU Power Management"
3270c095ebafSPaul Burton
3271c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
32727a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
32737a998935SViresh Kumarendif
32749726b43aSWu Zhangjin
3275c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig"
3276c095ebafSPaul Burton
3277c095ebafSPaul Burtonendmenu
3278c095ebafSPaul Burton
327998cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
328098cdee0eSRalf Baechle
32812235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
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