xref: /linux/arch/mips/Kconfig (revision d30a2b47d4c2b75573d93f60655d48ba8e3ed2b3)
11da177e4SLinus Torvaldsconfig MIPS
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
440e084a5SRalf Baechle	select ARCH_SUPPORTS_UPROBES
5a862a426SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
6393c1262SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
75fac4f7aSPaul Burton	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
81ee3630aSRalf Baechle	select ARCH_USE_BUILTIN_BSWAP
9c3fc5cd5SRalf Baechle	select HAVE_CONTEXT_TRACKING
10f8ac0425SYoichi Yuasa	select HAVE_GENERIC_DMA_COHERENT
11ec7748b5SSam Ravnborg	select HAVE_IDE
1242d4b839SMathieu Desnoyers	select HAVE_OPROFILE
137f788d2dSDeng-Cheng Zhu	select HAVE_PERF_EVENTS
147f788d2dSDeng-Cheng Zhu	select PERF_USE_VMALLOC
1588547001SJason Wessel	select HAVE_ARCH_KGDB
16490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
17c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
183f5fdb4bSMarkos Chandras	select HAVE_BPF_JIT if !CPU_MICROMIPS
19d2bb0762SWu Zhangjin	select HAVE_FUNCTION_TRACER
20538f1952SWu Zhangjin	select HAVE_DYNAMIC_FTRACE
21538f1952SWu Zhangjin	select HAVE_FTRACE_MCOUNT_RECORD
2264575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
2329c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
24c1bf207dSDavid Daney	select HAVE_KPROBES
25c1bf207dSDavid Daney	select HAVE_KRETPROBES
26fb59e394SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
27b69ec42bSCatalin Marinas	select HAVE_DEBUG_KMEMLEAK
281d7bf993SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
292b68f6caSKees Cook	select ARCH_HAS_ELF_RANDOMIZE
30383c97b4SBen Hutchings	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
3130ad29bbSHuacai Chen	select RTC_LIB if !MACH_LOONGSON64
322b78920dSDeng-Cheng Zhu	select GENERIC_ATOMIC64 if !64BIT
337463449bSCatalin Marinas	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
34f4649382SZubair Lutfullah Kakakhel	select HAVE_DMA_CONTIGUOUS
3548e1fd5aSDavid Daney	select HAVE_DMA_API_DEBUG
363bd27e32SDavid Daney	select GENERIC_IRQ_PROBE
37f8396c17SThomas Gleixner	select GENERIC_IRQ_SHOW
3878857614SMarkos Chandras	select GENERIC_PCI_IOMAP
3994bb0c1aSDavid Daney	select HAVE_ARCH_JUMP_LABEL
40c1d7e01dSWill Deacon	select ARCH_WANT_IPC_PARSE_VERSION
410f462e3cSThomas Gleixner	select IRQ_FORCED_THREADING
429d15ffc8STejun Heo	select HAVE_MEMBLOCK
439d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
449d15ffc8STejun Heo	select ARCH_DISCARD_MEMBLOCK
45360014a3SThomas Gleixner	select GENERIC_SMP_IDLE_THREAD
464b054495SDavid Daney	select BUILDTIME_EXTABLE_SORT
47cde1794bSAnna-Maria Gleixner	select GENERIC_CLOCKEVENTS
48929de4ccSDeng-Cheng Zhu	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
49cde1794bSAnna-Maria Gleixner	select GENERIC_CMOS_UPDATE
50786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
514febd95aSStephen Rothwell	select VIRT_TO_BUS
522f12fb20SJoshua Kinard	select MODULES_USE_ELF_REL if MODULES
532f12fb20SJoshua Kinard	select MODULES_USE_ELF_RELA if MODULES && 64BIT
5450150d2bSAl Viro	select CLONE_BACKWARDS
55d1a1dc0bSDave Hansen	select HAVE_DEBUG_STACKOVERFLOW
5619952a92SKees Cook	select HAVE_CC_STACKPROTECTOR
57b1d4c6caSJames Hogan	select CPU_PM if CPU_IDLE
58cc7964afSPaul Burton	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
5990cee759SPaul Burton	select ARCH_BINFMT_ELF_STATE
60d79d853dSMarkos Chandras	select SYSCTL_EXCEPTION_TRACE
61bb877e96SDeng-Cheng Zhu	select HAVE_VIRT_CPU_ACCOUNTING_GEN
62ec9ddad3SDeng-Cheng Zhu	select HAVE_IRQ_TIME_ACCOUNTING
63a7f4df4eSAlex Smith	select GENERIC_TIME_VSYSCALL
64a7f4df4eSAlex Smith	select ARCH_CLOCKSOURCE_DATA
651da177e4SLinus Torvalds
661da177e4SLinus Torvaldsmenu "Machine selection"
671da177e4SLinus Torvalds
685e83d430SRalf Baechlechoice
695e83d430SRalf Baechle	prompt "System type"
705e83d430SRalf Baechle	default SGI_IP22
711da177e4SLinus Torvalds
7242a4f17dSManuel Laussconfig MIPS_ALCHEMY
73c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
7434adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
75f772cdb2SRalf Baechle	select CEVT_R4K
76d7ea335cSSteven J. Hill	select CSRC_R4K
7767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7888e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
7942a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
8042a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
8142a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
82*d30a2b47SLinus Walleij	select GPIOLIB
831b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
8447440229SManuel Lauss	select COMMON_CLK
851da177e4SLinus Torvalds
867ca5dc14SFlorian Fainelliconfig AR7
877ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
887ca5dc14SFlorian Fainelli	select BOOT_ELF32
897ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
907ca5dc14SFlorian Fainelli	select CEVT_R4K
917ca5dc14SFlorian Fainelli	select CSRC_R4K
9267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
937ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
947ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
957ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
967ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
977ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
987ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
99377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1001b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
101*d30a2b47SLinus Walleij	select GPIOLIB
1027ca5dc14SFlorian Fainelli	select VLYNQ
1038551fb64SYoichi Yuasa	select HAVE_CLK
1047ca5dc14SFlorian Fainelli	help
1057ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
1067ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
1077ca5dc14SFlorian Fainelli
10843cc739fSSergey Ryazanovconfig ATH25
10943cc739fSSergey Ryazanov	bool "Atheros AR231x/AR531x SoC support"
11043cc739fSSergey Ryazanov	select CEVT_R4K
11143cc739fSSergey Ryazanov	select CSRC_R4K
11243cc739fSSergey Ryazanov	select DMA_NONCOHERENT
11367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1141753e74eSSergey Ryazanov	select IRQ_DOMAIN
11543cc739fSSergey Ryazanov	select SYS_HAS_CPU_MIPS32_R1
11643cc739fSSergey Ryazanov	select SYS_SUPPORTS_BIG_ENDIAN
11743cc739fSSergey Ryazanov	select SYS_SUPPORTS_32BIT_KERNEL
1188aaa7278SSergey Ryazanov	select SYS_HAS_EARLY_PRINTK
11943cc739fSSergey Ryazanov	help
12043cc739fSSergey Ryazanov	  Support for Atheros AR231x and Atheros AR531x based boards
12143cc739fSSergey Ryazanov
122d4a67d9dSGabor Juhosconfig ATH79
123d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
124ff591a91SAlban Bedel	select ARCH_HAS_RESET_CONTROLLER
125d4a67d9dSGabor Juhos	select BOOT_RAW
126d4a67d9dSGabor Juhos	select CEVT_R4K
127d4a67d9dSGabor Juhos	select CSRC_R4K
128d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
129*d30a2b47SLinus Walleij	select GPIOLIB
13094638067SGabor Juhos	select HAVE_CLK
131411520afSAlban Bedel	select COMMON_CLK
1322c4f1ac5SGabor Juhos	select CLKDEV_LOOKUP
13367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1340aabf1a4SGabor Juhos	select MIPS_MACHINE
135d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
136d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
137d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
138d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
139377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
140da628e8bSAlban Bedel	select SYS_SUPPORTS_ZBOOT
14103c8c407SAlban Bedel	select USE_OF
142d4a67d9dSGabor Juhos	help
143d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
144d4a67d9dSGabor Juhos
1455f2d4459SKevin Cernekeeconfig BMIPS_GENERIC
1465f2d4459SKevin Cernekee	bool "Broadcom Generic BMIPS kernel"
147d666cd02SKevin Cernekee	select BOOT_RAW
148d666cd02SKevin Cernekee	select NO_EXCEPT_FILL
149d666cd02SKevin Cernekee	select USE_OF
150d666cd02SKevin Cernekee	select CEVT_R4K
151d666cd02SKevin Cernekee	select CSRC_R4K
152d666cd02SKevin Cernekee	select SYNC_R4K
153d666cd02SKevin Cernekee	select COMMON_CLK
154c7c42ec2SSimon Arlott	select BCM6345_L1_IRQ
15560b858f2SKevin Cernekee	select BCM7038_L1_IRQ
15660b858f2SKevin Cernekee	select BCM7120_L2_IRQ
15760b858f2SKevin Cernekee	select BRCMSTB_L2_IRQ
15867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
15960b858f2SKevin Cernekee	select DMA_NONCOHERENT
160d666cd02SKevin Cernekee	select SYS_SUPPORTS_32BIT_KERNEL
16160b858f2SKevin Cernekee	select SYS_SUPPORTS_LITTLE_ENDIAN
162d666cd02SKevin Cernekee	select SYS_SUPPORTS_BIG_ENDIAN
163d666cd02SKevin Cernekee	select SYS_SUPPORTS_HIGHMEM
16460b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS32_3300
16560b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4350
16660b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4380
167d666cd02SKevin Cernekee	select SYS_HAS_CPU_BMIPS5000
168d666cd02SKevin Cernekee	select SWAP_IO_SPACE
16960b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
17060b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
17160b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
17260b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
173d666cd02SKevin Cernekee	help
1745f2d4459SKevin Cernekee	  Build a generic DT-based kernel image that boots on select
1755f2d4459SKevin Cernekee	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
1765f2d4459SKevin Cernekee	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
1775f2d4459SKevin Cernekee	  must be set appropriately for your board.
178d666cd02SKevin Cernekee
1791c0c13ebSAurelien Jarnoconfig BCM47XX
180c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
181fe08f8c2SHauke Mehrtens	select BOOT_RAW
18242f77542SRalf Baechle	select CEVT_R4K
183940f6b48SRalf Baechle	select CSRC_R4K
1841c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
1851c0c13ebSAurelien Jarno	select HW_HAS_PCI
18667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
187314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
188dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
1891c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
1901c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
191377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
19225e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
193e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
194c949c0bcSRafał Miłecki	select GPIOLIB
195c949c0bcSRafał Miłecki	select LEDS_GPIO_REGISTER
196f6e734a8SRafał Miłecki	select BCM47XX_NVRAM
1971c0c13ebSAurelien Jarno	help
1981c0c13ebSAurelien Jarno	 Support for BCM47XX based boards
1991c0c13ebSAurelien Jarno
200e7300d04SMaxime Bizonconfig BCM63XX
201e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
202ae8de61cSFlorian Fainelli	select BOOT_RAW
203e7300d04SMaxime Bizon	select CEVT_R4K
204e7300d04SMaxime Bizon	select CSRC_R4K
205fc264022SJonas Gorski	select SYNC_R4K
206e7300d04SMaxime Bizon	select DMA_NONCOHERENT
20767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
208e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
209e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
210e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
211e7300d04SMaxime Bizon	select SWAP_IO_SPACE
212*d30a2b47SLinus Walleij	select GPIOLIB
2133e82eeebSYoichi Yuasa	select HAVE_CLK
214af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
215e7300d04SMaxime Bizon	help
216e7300d04SMaxime Bizon	 Support for BCM63XX based boards
217e7300d04SMaxime Bizon
2181da177e4SLinus Torvaldsconfig MIPS_COBALT
2193fa986faSMartin Michlmayr	bool "Cobalt Server"
22042f77542SRalf Baechle	select CEVT_R4K
221940f6b48SRalf Baechle	select CSRC_R4K
2221097c6acSYoichi Yuasa	select CEVT_GT641XX
2231da177e4SLinus Torvalds	select DMA_NONCOHERENT
2241da177e4SLinus Torvalds	select HW_HAS_PCI
225d865bea4SRalf Baechle	select I8253
2261da177e4SLinus Torvalds	select I8259
22767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
228d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
229252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
230e25bfc92SYoichi Yuasa	select PCI
2317cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
2320a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
233ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2340e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
2355e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
236e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
2371da177e4SLinus Torvalds
2381da177e4SLinus Torvaldsconfig MACH_DECSTATION
2393fa986faSMartin Michlmayr	bool "DECstations"
2401da177e4SLinus Torvalds	select BOOT_ELF32
2416457d9fcSYoichi Yuasa	select CEVT_DS1287
24281d10badSMaciej W. Rozycki	select CEVT_R4K if CPU_R4X00
2434247417dSYoichi Yuasa	select CSRC_IOASIC
24481d10badSMaciej W. Rozycki	select CSRC_R4K if CPU_R4X00
24520d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
24620d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
24720d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
2481da177e4SLinus Torvalds	select DMA_NONCOHERENT
249ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
25067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
2517cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
2527cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
253ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2547d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2555e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
2561723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
2571723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
2581723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
259930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
2605e83d430SRalf Baechle	help
2611da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
2621da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
2631da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
2641da177e4SLinus Torvalds
2651da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
2661da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
2671da177e4SLinus Torvalds
2681da177e4SLinus Torvalds		DECstation 5000/50
2691da177e4SLinus Torvalds		DECstation 5000/150
2701da177e4SLinus Torvalds		DECstation 5000/260
2711da177e4SLinus Torvalds		DECsystem 5900/260
2721da177e4SLinus Torvalds
2731da177e4SLinus Torvalds	  otherwise choose R3000.
2741da177e4SLinus Torvalds
2755e83d430SRalf Baechleconfig MACH_JAZZ
2763fa986faSMartin Michlmayr	bool "Jazz family of machines"
2770e2794b0SRalf Baechle	select FW_ARC
2780e2794b0SRalf Baechle	select FW_ARC32
2795e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
28042f77542SRalf Baechle	select CEVT_R4K
281940f6b48SRalf Baechle	select CSRC_R4K
282e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
2835e83d430SRalf Baechle	select GENERIC_ISA_DMA
2848a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
28567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
286d865bea4SRalf Baechle	select I8253
2875e83d430SRalf Baechle	select I8259
2885e83d430SRalf Baechle	select ISA
2897cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
2905e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
2917d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2921723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
2931da177e4SLinus Torvalds	help
2945e83d430SRalf Baechle	 This a family of machines based on the MIPS R4030 chipset which was
2955e83d430SRalf Baechle	 used by several vendors to build RISC/os and Windows NT workstations.
296692105b8SMatt LaPlante	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
2975e83d430SRalf Baechle	 Olivetti M700-10 workstations.
2985e83d430SRalf Baechle
299de361e8bSPaul Burtonconfig MACH_INGENIC
300de361e8bSPaul Burton	bool "Ingenic SoC based machines"
3015ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
3025ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
303f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
3045ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
30567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
306*d30a2b47SLinus Walleij	select GPIOLIB
307ff1930c6SPaul Burton	select COMMON_CLK
30883bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
309ffb1843dSPaul Burton	select BUILTIN_DTB
310ffb1843dSPaul Burton	select USE_OF
3116ec127fbSPaul Burton	select LIBFDT
3125ebabe59SLars-Peter Clausen
313171bb2f1SJohn Crispinconfig LANTIQ
314171bb2f1SJohn Crispin	bool "Lantiq based platforms"
315171bb2f1SJohn Crispin	select DMA_NONCOHERENT
31667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
317171bb2f1SJohn Crispin	select CEVT_R4K
318171bb2f1SJohn Crispin	select CSRC_R4K
319171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
320171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
321171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
322171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
323377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
324171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
325171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
326*d30a2b47SLinus Walleij	select GPIOLIB
327171bb2f1SJohn Crispin	select SWAP_IO_SPACE
328171bb2f1SJohn Crispin	select BOOT_RAW
329287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
330a0392222SJohn Crispin	select USE_OF
3313f8c50c9SJohn Crispin	select PINCTRL
3323f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
333c530781cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
334c530781cSJohn Crispin	select RESET_CONTROLLER
335171bb2f1SJohn Crispin
3361f21d2bdSBrian Murphyconfig LASAT
3371f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
33842f77542SRalf Baechle	select CEVT_R4K
33916f0bbbcSRalf Baechle	select CRC32
340940f6b48SRalf Baechle	select CSRC_R4K
3411f21d2bdSBrian Murphy	select DMA_NONCOHERENT
3421f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
3431f21d2bdSBrian Murphy	select HW_HAS_PCI
34467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3451f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
3461f21d2bdSBrian Murphy	select MIPS_NILE4
3471f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
3481f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
3491f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
3501f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
3511f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
3521f21d2bdSBrian Murphy
35330ad29bbSHuacai Chenconfig MACH_LOONGSON32
35430ad29bbSHuacai Chen	bool "Loongson-1 family of machines"
355c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
356ade299d8SYoichi Yuasa	help
35730ad29bbSHuacai Chen	  This enables support for the Loongson-1 family of machines.
35885749d24SWu Zhangjin
35930ad29bbSHuacai Chen	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
36030ad29bbSHuacai Chen	  the Institute of Computing Technology (ICT), Chinese Academy of
36130ad29bbSHuacai Chen	  Sciences (CAS).
362ade299d8SYoichi Yuasa
36330ad29bbSHuacai Chenconfig MACH_LOONGSON64
36430ad29bbSHuacai Chen	bool "Loongson-2/3 family of machines"
365ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
366ca585cf9SKelvin Cheung	help
36730ad29bbSHuacai Chen	  This enables the support of Loongson-2/3 family of machines.
368ca585cf9SKelvin Cheung
36930ad29bbSHuacai Chen	  Loongson-2 is a family of single-core CPUs and Loongson-3 is a
37030ad29bbSHuacai Chen	  family of multi-core CPUs. They are both 64-bit general-purpose
37130ad29bbSHuacai Chen	  MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
37230ad29bbSHuacai Chen	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
37330ad29bbSHuacai Chen	  in the People's Republic of China. The chief architect is Professor
37430ad29bbSHuacai Chen	  Weiwu Hu.
375ca585cf9SKelvin Cheung
3766a438309SAndrew Brestickerconfig MACH_PISTACHIO
3776a438309SAndrew Bresticker	bool "IMG Pistachio SoC based boards"
3786a438309SAndrew Bresticker	select BOOT_ELF32
3796a438309SAndrew Bresticker	select BOOT_RAW
3806a438309SAndrew Bresticker	select CEVT_R4K
3816a438309SAndrew Bresticker	select CLKSRC_MIPS_GIC
3826a438309SAndrew Bresticker	select COMMON_CLK
3836a438309SAndrew Bresticker	select CSRC_R4K
3846a438309SAndrew Bresticker	select DMA_MAYBE_COHERENT
385*d30a2b47SLinus Walleij	select GPIOLIB
38667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3876a438309SAndrew Bresticker	select LIBFDT
3886a438309SAndrew Bresticker	select MFD_SYSCON
3896a438309SAndrew Bresticker	select MIPS_CPU_SCACHE
3906a438309SAndrew Bresticker	select MIPS_GIC
3916a438309SAndrew Bresticker	select PINCTRL
3926a438309SAndrew Bresticker	select REGULATOR
3936a438309SAndrew Bresticker	select SYS_HAS_CPU_MIPS32_R2
3946a438309SAndrew Bresticker	select SYS_SUPPORTS_32BIT_KERNEL
3956a438309SAndrew Bresticker	select SYS_SUPPORTS_LITTLE_ENDIAN
3966a438309SAndrew Bresticker	select SYS_SUPPORTS_MIPS_CPS
3976a438309SAndrew Bresticker	select SYS_SUPPORTS_MULTITHREADING
3986a438309SAndrew Bresticker	select SYS_SUPPORTS_ZBOOT
399018f62eeSEzequiel Garcia	select SYS_HAS_EARLY_PRINTK
400018f62eeSEzequiel Garcia	select USE_GENERIC_EARLY_PRINTK_8250
4016a438309SAndrew Bresticker	select USE_OF
4026a438309SAndrew Bresticker	help
4036a438309SAndrew Bresticker	  This enables support for the IMG Pistachio SoC platform.
4046a438309SAndrew Bresticker
4059937f5ffSZubair Lutfullah Kakakhelconfig MACH_XILFPGA
4069937f5ffSZubair Lutfullah Kakakhel	bool "MIPSfpga Xilinx based boards"
4079937f5ffSZubair Lutfullah Kakakhel	select BOOT_ELF32
4089937f5ffSZubair Lutfullah Kakakhel	select BOOT_RAW
4099937f5ffSZubair Lutfullah Kakakhel	select BUILTIN_DTB
4109937f5ffSZubair Lutfullah Kakakhel	select CEVT_R4K
4119937f5ffSZubair Lutfullah Kakakhel	select COMMON_CLK
4129937f5ffSZubair Lutfullah Kakakhel	select CSRC_R4K
413*d30a2b47SLinus Walleij	select GPIOLIB
4149937f5ffSZubair Lutfullah Kakakhel	select IRQ_MIPS_CPU
4159937f5ffSZubair Lutfullah Kakakhel	select LIBFDT
4169937f5ffSZubair Lutfullah Kakakhel	select MIPS_CPU_SCACHE
4179937f5ffSZubair Lutfullah Kakakhel	select SYS_HAS_EARLY_PRINTK
4189937f5ffSZubair Lutfullah Kakakhel	select SYS_HAS_CPU_MIPS32_R2
4199937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_32BIT_KERNEL
4209937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_LITTLE_ENDIAN
4219937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_ZBOOT_UART16550
4229937f5ffSZubair Lutfullah Kakakhel	select USE_OF
4239937f5ffSZubair Lutfullah Kakakhel	select USE_GENERIC_EARLY_PRINTK_8250
4249937f5ffSZubair Lutfullah Kakakhel	help
4259937f5ffSZubair Lutfullah Kakakhel	  This enables support for the IMG University Program MIPSfpga platform.
4269937f5ffSZubair Lutfullah Kakakhel
4271da177e4SLinus Torvaldsconfig MIPS_MALTA
4283fa986faSMartin Michlmayr	bool "MIPS Malta board"
42961ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
4301da177e4SLinus Torvalds	select BOOT_ELF32
431fa71c960SRalf Baechle	select BOOT_RAW
432e8823d26SPaul Burton	select BUILTIN_DTB
43342f77542SRalf Baechle	select CEVT_R4K
434940f6b48SRalf Baechle	select CSRC_R4K
435fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
43642b002abSGuenter Roeck	select COMMON_CLK
437885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
4381da177e4SLinus Torvalds	select GENERIC_ISA_DMA
4398a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
44067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4418a19b8f1SAndrew Bresticker	select MIPS_GIC
4421da177e4SLinus Torvalds	select HW_HAS_PCI
443d865bea4SRalf Baechle	select I8253
4441da177e4SLinus Torvalds	select I8259
4455e83d430SRalf Baechle	select MIPS_BONITO64
4469318c51aSChris Dearman	select MIPS_CPU_SCACHE
447a7ef1eadSKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
448252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
4495e83d430SRalf Baechle	select MIPS_MSC
450ecafe3e9SPaul Burton	select SMP_UP if SMP
4511da177e4SLinus Torvalds	select SWAP_IO_SPACE
4527cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
4537cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
454bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
455c5b36783SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R5
456575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R6
4577cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
4585d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
459575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS64_R6
4607cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
4617cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
462ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
463ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
4645e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
465c5b36783SSteven J. Hill	select SYS_SUPPORTS_HIGHMEM
4665e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
467424ebcdfSMaciej W. Rozycki	select SYS_SUPPORTS_MICROMIPS
4680365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
469e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
470377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
471f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
4729693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
4731b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
474e8823d26SPaul Burton	select USE_OF
475abcc82b1SJames Hogan	select ZONE_DMA32 if 64BIT
476e81a8c7dSPaul Burton	select BUILTIN_DTB
477e81a8c7dSPaul Burton	select LIBFDT
4781da177e4SLinus Torvalds	help
479f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
4801da177e4SLinus Torvalds	  board.
4811da177e4SLinus Torvalds
4822572f00dSJoshua Hendersonconfig MACH_PIC32
4832572f00dSJoshua Henderson	bool "Microchip PIC32 Family"
4842572f00dSJoshua Henderson	help
4852572f00dSJoshua Henderson	  This enables support for the Microchip PIC32 family of platforms.
4862572f00dSJoshua Henderson
4872572f00dSJoshua Henderson	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
4882572f00dSJoshua Henderson	  microcontrollers.
4892572f00dSJoshua Henderson
490ec47b274SSteven J. Hillconfig MIPS_SEAD3
491ec47b274SSteven J. Hill	bool "MIPS SEAD3 board"
492ec47b274SSteven J. Hill	select BOOT_ELF32
493ec47b274SSteven J. Hill	select BOOT_RAW
494f262b5f2SAndrew Bresticker	select BUILTIN_DTB
495ec47b274SSteven J. Hill	select CEVT_R4K
496ec47b274SSteven J. Hill	select CSRC_R4K
497fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
49842b002abSGuenter Roeck	select COMMON_CLK
499ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_VI
500ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_EI
501ec47b274SSteven J. Hill	select DMA_NONCOHERENT
50267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5038a19b8f1SAndrew Bresticker	select MIPS_GIC
50444327236SQais Yousef	select LIBFDT
505ec47b274SSteven J. Hill	select MIPS_MSC
506ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R1
507ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R2
508ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS64_R1
509ec47b274SSteven J. Hill	select SYS_HAS_EARLY_PRINTK
510ec47b274SSteven J. Hill	select SYS_SUPPORTS_32BIT_KERNEL
511ec47b274SSteven J. Hill	select SYS_SUPPORTS_64BIT_KERNEL
512ec47b274SSteven J. Hill	select SYS_SUPPORTS_BIG_ENDIAN
513ec47b274SSteven J. Hill	select SYS_SUPPORTS_LITTLE_ENDIAN
514ec47b274SSteven J. Hill	select SYS_SUPPORTS_SMARTMIPS
515a6a4834cSSteven J. Hill	select SYS_SUPPORTS_MICROMIPS
516377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
517ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_DESC
518ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_MMIO
5199b731009SSteven J. Hill	select USE_OF
520ec47b274SSteven J. Hill	help
521ec47b274SSteven J. Hill	  This enables support for the MIPS Technologies SEAD3 evaluation
522ec47b274SSteven J. Hill	  board.
523ec47b274SSteven J. Hill
524a83860c2SRalf Baechleconfig NEC_MARKEINS
525a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
526a83860c2SRalf Baechle	select SOC_EMMA2RH
527a83860c2SRalf Baechle	select HW_HAS_PCI
528a83860c2SRalf Baechle	help
529a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
530ade299d8SYoichi Yuasa
5315e83d430SRalf Baechleconfig MACH_VR41XX
53274142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
53342f77542SRalf Baechle	select CEVT_R4K
534940f6b48SRalf Baechle	select CSRC_R4K
5357cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
536377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
537*d30a2b47SLinus Walleij	select GPIOLIB
5385e83d430SRalf Baechle
539edb6310aSDaniel Lairdconfig NXP_STB220
540edb6310aSDaniel Laird	bool "NXP STB220 board"
541edb6310aSDaniel Laird	select SOC_PNX833X
542edb6310aSDaniel Laird	help
543edb6310aSDaniel Laird	 Support for NXP Semiconductors STB220 Development Board.
544edb6310aSDaniel Laird
545edb6310aSDaniel Lairdconfig NXP_STB225
546edb6310aSDaniel Laird	bool "NXP 225 board"
547edb6310aSDaniel Laird	select SOC_PNX833X
548edb6310aSDaniel Laird	select SOC_PNX8335
549edb6310aSDaniel Laird	help
550edb6310aSDaniel Laird	 Support for NXP Semiconductors STB225 Development Board.
551edb6310aSDaniel Laird
5529267a30dSMarc St-Jeanconfig PMC_MSP
5539267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
55439d30c13SAnoop P A	select CEVT_R4K
55539d30c13SAnoop P A	select CSRC_R4K
5569267a30dSMarc St-Jean	select DMA_NONCOHERENT
5579267a30dSMarc St-Jean	select SWAP_IO_SPACE
5589267a30dSMarc St-Jean	select NO_EXCEPT_FILL
5599267a30dSMarc St-Jean	select BOOT_RAW
5609267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
5619267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
5629267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
5639267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
564377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
56567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5669267a30dSMarc St-Jean	select SERIAL_8250
5679267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
5689296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
5699296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
5709267a30dSMarc St-Jean	help
5719267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
5729267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
5739267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
5749267a30dSMarc St-Jean	  a variety of MIPS cores.
5759267a30dSMarc St-Jean
576ae2b5bb6SJohn Crispinconfig RALINK
577ae2b5bb6SJohn Crispin	bool "Ralink based machines"
578ae2b5bb6SJohn Crispin	select CEVT_R4K
579ae2b5bb6SJohn Crispin	select CSRC_R4K
580ae2b5bb6SJohn Crispin	select BOOT_RAW
581ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
58267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
583ae2b5bb6SJohn Crispin	select USE_OF
584ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
585ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
586ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
587ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
588377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
589ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
590ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
5912a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
5922a153f1cSJohn Crispin	select RESET_CONTROLLER
593ae2b5bb6SJohn Crispin
5941da177e4SLinus Torvaldsconfig SGI_IP22
5953fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
5960e2794b0SRalf Baechle	select FW_ARC
5970e2794b0SRalf Baechle	select FW_ARC32
5981da177e4SLinus Torvalds	select BOOT_ELF32
59942f77542SRalf Baechle	select CEVT_R4K
600940f6b48SRalf Baechle	select CSRC_R4K
601e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
6021da177e4SLinus Torvalds	select DMA_NONCOHERENT
6035e83d430SRalf Baechle	select HW_HAS_EISA
604d865bea4SRalf Baechle	select I8253
60568de4803SThomas Bogendoerfer	select I8259
6061da177e4SLinus Torvalds	select IP22_CPU_SCACHE
60767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
608aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
609e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
610e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
61136e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
612e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
613e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
614e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
6151da177e4SLinus Torvalds	select SWAP_IO_SPACE
6167cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
6177cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
6182b5e63f6SMartin Michlmayr	#
6192b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6202b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6212b5e63f6SMartin Michlmayr	#
6222b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6232b5e63f6SMartin Michlmayr	# for a more details discussion
6242b5e63f6SMartin Michlmayr	#
6252b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
626ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
627ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6285e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
629930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6301da177e4SLinus Torvalds	help
6311da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
6321da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
6331da177e4SLinus Torvalds	  that runs on these, say Y here.
6341da177e4SLinus Torvalds
6351da177e4SLinus Torvaldsconfig SGI_IP27
6363fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
6370e2794b0SRalf Baechle	select FW_ARC
6380e2794b0SRalf Baechle	select FW_ARC64
6395e83d430SRalf Baechle	select BOOT_ELF64
640e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
641634286f1SRalf Baechle	select DMA_COHERENT
64236a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
6431da177e4SLinus Torvalds	select HW_HAS_PCI
644130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
6457cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
646ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6475e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
648d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
6491a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
650930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6511da177e4SLinus Torvalds	help
6521da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
6531da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
6541da177e4SLinus Torvalds	  here.
6551da177e4SLinus Torvalds
656e2defae5SThomas Bogendoerferconfig SGI_IP28
6577d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
6580e2794b0SRalf Baechle	select FW_ARC
6590e2794b0SRalf Baechle	select FW_ARC64
660e2defae5SThomas Bogendoerfer	select BOOT_ELF64
661e2defae5SThomas Bogendoerfer	select CEVT_R4K
662e2defae5SThomas Bogendoerfer	select CSRC_R4K
663e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
664e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
665e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
66667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
667e2defae5SThomas Bogendoerfer	select HW_HAS_EISA
668e2defae5SThomas Bogendoerfer	select I8253
669e2defae5SThomas Bogendoerfer	select I8259
670e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
671e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
6725b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
673e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
674e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
675e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
676e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
677e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
6782b5e63f6SMartin Michlmayr	#
6792b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6802b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6812b5e63f6SMartin Michlmayr	#
6822b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6832b5e63f6SMartin Michlmayr	# for a more details discussion
6842b5e63f6SMartin Michlmayr	#
6852b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
686e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
687e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
688dc24d68dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
689e2defae5SThomas Bogendoerfer      help
690e2defae5SThomas Bogendoerfer        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
691e2defae5SThomas Bogendoerfer        kernel that runs on these, say Y here.
692e2defae5SThomas Bogendoerfer
6931da177e4SLinus Torvaldsconfig SGI_IP32
694cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
6950e2794b0SRalf Baechle	select FW_ARC
6960e2794b0SRalf Baechle	select FW_ARC32
6971da177e4SLinus Torvalds	select BOOT_ELF32
69842f77542SRalf Baechle	select CEVT_R4K
699940f6b48SRalf Baechle	select CSRC_R4K
7001da177e4SLinus Torvalds	select DMA_NONCOHERENT
7011da177e4SLinus Torvalds	select HW_HAS_PCI
70267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7031da177e4SLinus Torvalds	select R5000_CPU_SCACHE
7041da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
7057cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
7067cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
7077cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
708dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
709ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
7105e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7111da177e4SLinus Torvalds	help
7121da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
7131da177e4SLinus Torvalds
714ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
715ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
7165e83d430SRalf Baechle	select BOOT_ELF32
7175e83d430SRalf Baechle	select DMA_COHERENT
7185e83d430SRalf Baechle	select SIBYTE_BCM1120
7195e83d430SRalf Baechle	select SWAP_IO_SPACE
7207cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7215e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7225e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7235e83d430SRalf Baechle
724ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
725ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
7265e83d430SRalf Baechle	select BOOT_ELF32
7275e83d430SRalf Baechle	select DMA_COHERENT
7285e83d430SRalf Baechle	select SIBYTE_BCM1120
7295e83d430SRalf Baechle	select SWAP_IO_SPACE
7307cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7315e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7325e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7335e83d430SRalf Baechle
7345e83d430SRalf Baechleconfig SIBYTE_CRHONE
7353fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
7365e83d430SRalf Baechle	select BOOT_ELF32
7375e83d430SRalf Baechle	select DMA_COHERENT
7385e83d430SRalf Baechle	select SIBYTE_BCM1125
7395e83d430SRalf Baechle	select SWAP_IO_SPACE
7407cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7415e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7425e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7435e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7445e83d430SRalf Baechle
745ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
746ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
747ade299d8SYoichi Yuasa	select BOOT_ELF32
748ade299d8SYoichi Yuasa	select DMA_COHERENT
749ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
750ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
751ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
752ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
753ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
754ade299d8SYoichi Yuasa
755ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
756ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
757ade299d8SYoichi Yuasa	select BOOT_ELF32
758ade299d8SYoichi Yuasa	select DMA_COHERENT
759fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
760ade299d8SYoichi Yuasa	select SIBYTE_SB1250
761ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
762ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
763ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
764ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
765ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
766cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
767ade299d8SYoichi Yuasa
768ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
769ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
770ade299d8SYoichi Yuasa	select BOOT_ELF32
771ade299d8SYoichi Yuasa	select DMA_COHERENT
772fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
773ade299d8SYoichi Yuasa	select SIBYTE_SB1250
774ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
775ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
776ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
777ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
778ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
779ade299d8SYoichi Yuasa
780ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
781ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
782ade299d8SYoichi Yuasa	select BOOT_ELF32
783ade299d8SYoichi Yuasa	select DMA_COHERENT
784ade299d8SYoichi Yuasa	select SIBYTE_SB1250
785ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
786ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
787ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
788ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
789ade299d8SYoichi Yuasa
790ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
791ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
792ade299d8SYoichi Yuasa	select BOOT_ELF32
793ade299d8SYoichi Yuasa	select DMA_COHERENT
794ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
795ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
796ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
797ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
798ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
799651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
800ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
801cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
802ade299d8SYoichi Yuasa
80314b36af4SThomas Bogendoerferconfig SNI_RM
80414b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
8050e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
8060e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
807aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
8085e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
8095e83d430SRalf Baechle	select BOOT_ELF32
81042f77542SRalf Baechle	select CEVT_R4K
811940f6b48SRalf Baechle	select CSRC_R4K
812e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
8135e83d430SRalf Baechle	select DMA_NONCOHERENT
8145e83d430SRalf Baechle	select GENERIC_ISA_DMA
8158a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
8165e83d430SRalf Baechle	select HW_HAS_EISA
8175e83d430SRalf Baechle	select HW_HAS_PCI
81867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
819d865bea4SRalf Baechle	select I8253
8205e83d430SRalf Baechle	select I8259
8215e83d430SRalf Baechle	select ISA
8224a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
8237cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
8244a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
825c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
8264a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
82736a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
828ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
8297d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
8304a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
8315e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
8325e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
8331da177e4SLinus Torvalds	help
83414b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
83514b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
8365e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
8375e83d430SRalf Baechle	  support this machine type.
8381da177e4SLinus Torvalds
839edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
840edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
8415e83d430SRalf Baechle
842edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
843edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
84423fbee9dSRalf Baechle
84573b4390fSRalf Baechleconfig MIKROTIK_RB532
84673b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
84773b4390fSRalf Baechle	select CEVT_R4K
84873b4390fSRalf Baechle	select CSRC_R4K
84973b4390fSRalf Baechle	select DMA_NONCOHERENT
85073b4390fSRalf Baechle	select HW_HAS_PCI
85167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
85273b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
85373b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
85473b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
85573b4390fSRalf Baechle	select SWAP_IO_SPACE
85673b4390fSRalf Baechle	select BOOT_RAW
857*d30a2b47SLinus Walleij	select GPIOLIB
858930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
85973b4390fSRalf Baechle	help
86073b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
86173b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
86273b4390fSRalf Baechle
8639ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
8649ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
865a86c7f72SDavid Daney	select CEVT_R4K
86634adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
867a86c7f72SDavid Daney	select DMA_COHERENT
868a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
869a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
870f65aad41SRalf Baechle	select EDAC_SUPPORT
871b01aec9bSBorislav Petkov	select EDAC_ATOMIC_SCRUB
87273569d87SDavid Daney	select SYS_SUPPORTS_LITTLE_ENDIAN
87373569d87SDavid Daney	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
874a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
8755e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
876a86c7f72SDavid Daney	select SWAP_IO_SPACE
877e8635b48SDavid Daney	select HW_HAS_PCI
878f00e001eSDavid Daney	select ZONE_DMA32
879465aaed0SDavid Daney	select HOLES_IN_ZONE
880*d30a2b47SLinus Walleij	select GPIOLIB
8816e511163SDavid Daney	select LIBFDT
8826e511163SDavid Daney	select USE_OF
8836e511163SDavid Daney	select ARCH_SPARSEMEM_ENABLE
8846e511163SDavid Daney	select SYS_SUPPORTS_SMP
8856e511163SDavid Daney	select NR_CPUS_DEFAULT_16
886e326479fSAndrew Bresticker	select BUILTIN_DTB
8878c1e6b14SDavid Daney	select MTD_COMPLEX_MAPPINGS
888a86c7f72SDavid Daney	help
889a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
890a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
891a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
892a86c7f72SDavid Daney	  Some of the supported boards are:
893a86c7f72SDavid Daney		EBT3000
894a86c7f72SDavid Daney		EBH3000
895a86c7f72SDavid Daney		EBH3100
896a86c7f72SDavid Daney		Thunder
897a86c7f72SDavid Daney		Kodama
898a86c7f72SDavid Daney		Hikari
899a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
900a86c7f72SDavid Daney
9017f058e85SJayachandran Cconfig NLM_XLR_BOARD
9027f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
9037f058e85SJayachandran C	select BOOT_ELF32
9047f058e85SJayachandran C	select NLM_COMMON
9057f058e85SJayachandran C	select SYS_HAS_CPU_XLR
9067f058e85SJayachandran C	select SYS_SUPPORTS_SMP
9077f058e85SJayachandran C	select HW_HAS_PCI
9087f058e85SJayachandran C	select SWAP_IO_SPACE
9097f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9107f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
91134adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
9127f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9137f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9147f058e85SJayachandran C	select DMA_COHERENT
9157f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
9167f058e85SJayachandran C	select CEVT_R4K
9177f058e85SJayachandran C	select CSRC_R4K
91867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
919b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9207f058e85SJayachandran C	select SYNC_R4K
9217f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
9228f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9238f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9247f058e85SJayachandran C	help
9257f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
9267f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
9277f058e85SJayachandran C
9281c773ea4SJayachandran Cconfig NLM_XLP_BOARD
9291c773ea4SJayachandran C	bool "Netlogic XLP based systems"
9301c773ea4SJayachandran C	select BOOT_ELF32
9311c773ea4SJayachandran C	select NLM_COMMON
9321c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
9331c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
9341c773ea4SJayachandran C	select HW_HAS_PCI
9351c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9361c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
93734adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
938*d30a2b47SLinus Walleij	select GPIOLIB
9391c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9401c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
9411c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9421c773ea4SJayachandran C	select DMA_COHERENT
9431c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
9441c773ea4SJayachandran C	select CEVT_R4K
9451c773ea4SJayachandran C	select CSRC_R4K
94667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
947b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9481c773ea4SJayachandran C	select SYNC_R4K
9491c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
9502f6528e1SJayachandran C	select USE_OF
9518f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9528f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9531c773ea4SJayachandran C	help
9541c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
9551c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
9561c773ea4SJayachandran C
9579bc463beSDavid Daneyconfig MIPS_PARAVIRT
9589bc463beSDavid Daney	bool "Para-Virtualized guest system"
9599bc463beSDavid Daney	select CEVT_R4K
9609bc463beSDavid Daney	select CSRC_R4K
9619bc463beSDavid Daney	select DMA_COHERENT
9629bc463beSDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
9639bc463beSDavid Daney	select SYS_SUPPORTS_32BIT_KERNEL
9649bc463beSDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
9659bc463beSDavid Daney	select SYS_SUPPORTS_SMP
9669bc463beSDavid Daney	select NR_CPUS_DEFAULT_4
9679bc463beSDavid Daney	select SYS_HAS_EARLY_PRINTK
9689bc463beSDavid Daney	select SYS_HAS_CPU_MIPS32_R2
9699bc463beSDavid Daney	select SYS_HAS_CPU_MIPS64_R2
9709bc463beSDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
9719bc463beSDavid Daney	select HW_HAS_PCI
9729bc463beSDavid Daney	select SWAP_IO_SPACE
9739bc463beSDavid Daney	help
9749bc463beSDavid Daney	  This option supports guest running under ????
9759bc463beSDavid Daney
9761da177e4SLinus Torvaldsendchoice
9771da177e4SLinus Torvalds
978e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
9793b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig"
980d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
981a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
982e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
9838945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig"
9845e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
9855ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
9868ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
9871f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
9882572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig"
989af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig"
9900f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
991ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
99229c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
99338b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
99422b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
9955e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
996a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
99730ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig"
99830ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig"
9997f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
1000ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig"
10019937f5ffSZubair Lutfullah Kakakhelsource "arch/mips/xilfpga/Kconfig"
100238b18f72SRalf Baechle
10035e83d430SRalf Baechleendmenu
10045e83d430SRalf Baechle
10051da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK
10061da177e4SLinus Torvalds	bool
10071da177e4SLinus Torvalds	default y
10081da177e4SLinus Torvalds
10091da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
10101da177e4SLinus Torvalds	bool
10111da177e4SLinus Torvalds
1012f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32
1013f0d1b0b3SDavid Howells	bool
1014f0d1b0b3SDavid Howells	default n
1015f0d1b0b3SDavid Howells
1016f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64
1017f0d1b0b3SDavid Howells	bool
1018f0d1b0b3SDavid Howells	default n
1019f0d1b0b3SDavid Howells
10203c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
10213c9ee7efSAkinobu Mita	bool
10223c9ee7efSAkinobu Mita	default y
10233c9ee7efSAkinobu Mita
10241da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
10251da177e4SLinus Torvalds	bool
10261da177e4SLinus Torvalds	default y
10271da177e4SLinus Torvalds
1028ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
10291cc89038SAtsushi Nemoto	bool
10301cc89038SAtsushi Nemoto	default y
10311cc89038SAtsushi Nemoto
10321da177e4SLinus Torvalds#
10331da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
10341da177e4SLinus Torvalds#
10350e2794b0SRalf Baechleconfig FW_ARC
10361da177e4SLinus Torvalds	bool
10371da177e4SLinus Torvalds
103861ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
103961ed242dSRalf Baechle	bool
104061ed242dSRalf Baechle
10419267a30dSMarc St-Jeanconfig BOOT_RAW
10429267a30dSMarc St-Jean	bool
10439267a30dSMarc St-Jean
1044217dd11eSRalf Baechleconfig CEVT_BCM1480
1045217dd11eSRalf Baechle	bool
1046217dd11eSRalf Baechle
10476457d9fcSYoichi Yuasaconfig CEVT_DS1287
10486457d9fcSYoichi Yuasa	bool
10496457d9fcSYoichi Yuasa
10501097c6acSYoichi Yuasaconfig CEVT_GT641XX
10511097c6acSYoichi Yuasa	bool
10521097c6acSYoichi Yuasa
105342f77542SRalf Baechleconfig CEVT_R4K
105442f77542SRalf Baechle	bool
105542f77542SRalf Baechle
1056217dd11eSRalf Baechleconfig CEVT_SB1250
1057217dd11eSRalf Baechle	bool
1058217dd11eSRalf Baechle
1059229f773eSAtsushi Nemotoconfig CEVT_TXX9
1060229f773eSAtsushi Nemoto	bool
1061229f773eSAtsushi Nemoto
1062217dd11eSRalf Baechleconfig CSRC_BCM1480
1063217dd11eSRalf Baechle	bool
1064217dd11eSRalf Baechle
10654247417dSYoichi Yuasaconfig CSRC_IOASIC
10664247417dSYoichi Yuasa	bool
10674247417dSYoichi Yuasa
1068940f6b48SRalf Baechleconfig CSRC_R4K
1069940f6b48SRalf Baechle	bool
1070940f6b48SRalf Baechle
1071217dd11eSRalf Baechleconfig CSRC_SB1250
1072217dd11eSRalf Baechle	bool
1073217dd11eSRalf Baechle
1074a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL
1075a7f4df4eSAlex Smith	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1076a7f4df4eSAlex Smith
1077a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
1078*d30a2b47SLinus Walleij	select GPIOLIB
1079a9aec7feSAtsushi Nemoto	bool
1080a9aec7feSAtsushi Nemoto
10810e2794b0SRalf Baechleconfig FW_CFE
1082df78b5c8SAurelien Jarno	bool
1083df78b5c8SAurelien Jarno
10844bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT
108534adb28dSRalf Baechle	def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
10864bafad92SFUJITA Tomonori
108740e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES
108840e084a5SRalf Baechle	bool
108940e084a5SRalf Baechle
1090885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
1091885014bcSFelix Fietkau	select DMA_NONCOHERENT
1092885014bcSFelix Fietkau	bool
1093885014bcSFelix Fietkau
10941da177e4SLinus Torvaldsconfig DMA_COHERENT
10951da177e4SLinus Torvalds	bool
10961da177e4SLinus Torvalds
10971da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
10981da177e4SLinus Torvalds	bool
1099e1e02b32SFUJITA Tomonori	select NEED_DMA_MAP_STATE
11004ce588cdSRalf Baechle
1101e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
11024ce588cdSRalf Baechle	bool
11031da177e4SLinus Torvalds
110436a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
11051da177e4SLinus Torvalds	bool
11061da177e4SLinus Torvalds
1107dbb74540SRalf Baechleconfig HOTPLUG_CPU
11081b2bc75cSRalf Baechle	bool "Support for hot-pluggable CPUs"
110940b31360SStephen Rothwell	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
11101b2bc75cSRalf Baechle	help
11111b2bc75cSRalf Baechle	  Say Y here to allow turning CPUs off and on. CPUs can be
11121b2bc75cSRalf Baechle	  controlled through /sys/devices/system/cpu.
11131b2bc75cSRalf Baechle	  (Note: power management support will enable this option
11141b2bc75cSRalf Baechle	    automatically on SMP systems. )
11151b2bc75cSRalf Baechle	  Say N if you want to disable CPU hotplug.
11161b2bc75cSRalf Baechle
11171b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
1118dbb74540SRalf Baechle	bool
1119dbb74540SRalf Baechle
11201da177e4SLinus Torvaldsconfig MIPS_BONITO64
11211da177e4SLinus Torvalds	bool
11221da177e4SLinus Torvalds
11231da177e4SLinus Torvaldsconfig MIPS_MSC
11241da177e4SLinus Torvalds	bool
11251da177e4SLinus Torvalds
11261f21d2bdSBrian Murphyconfig MIPS_NILE4
11271f21d2bdSBrian Murphy	bool
11281f21d2bdSBrian Murphy
112939b8d525SRalf Baechleconfig SYNC_R4K
113039b8d525SRalf Baechle	bool
113139b8d525SRalf Baechle
1132487d70d0SGabor Juhosconfig MIPS_MACHINE
1133487d70d0SGabor Juhos	def_bool n
1134487d70d0SGabor Juhos
1135ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1136d388d685SMaciej W. Rozycki	def_bool n
1137d388d685SMaciej W. Rozycki
11384e0748f5SMarkos Chandrasconfig GENERIC_CSUM
11394e0748f5SMarkos Chandras	bool
11404e0748f5SMarkos Chandras
11418313da30SRalf Baechleconfig GENERIC_ISA_DMA
11428313da30SRalf Baechle	bool
11438313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1144a35bee8aSNamhyung Kim	select ISA_DMA_API
11458313da30SRalf Baechle
1146aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1147aa414dffSRalf Baechle	bool
11488313da30SRalf Baechle	select GENERIC_ISA_DMA
1149aa414dffSRalf Baechle
1150a35bee8aSNamhyung Kimconfig ISA_DMA_API
1151a35bee8aSNamhyung Kim	bool
1152a35bee8aSNamhyung Kim
1153465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1154465aaed0SDavid Daney	bool
1155465aaed0SDavid Daney
11565e83d430SRalf Baechle#
11576b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
11585e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
11595e83d430SRalf Baechle# choice statement should be more obvious to the user.
11605e83d430SRalf Baechle#
11615e83d430SRalf Baechlechoice
11626b2aac42SMasanari Iida	prompt "Endianness selection"
11631da177e4SLinus Torvalds	help
11641da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
11655e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
11663cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
11675e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
11683dde6ad8SDavid Sterba	  one or the other endianness.
11695e83d430SRalf Baechle
11705e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
11715e83d430SRalf Baechle	bool "Big endian"
11725e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
11735e83d430SRalf Baechle
11745e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
11755e83d430SRalf Baechle	bool "Little endian"
11765e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
11775e83d430SRalf Baechle
11785e83d430SRalf Baechleendchoice
11795e83d430SRalf Baechle
118022b0763aSDavid Daneyconfig EXPORT_UASM
118122b0763aSDavid Daney	bool
118222b0763aSDavid Daney
11832116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
11842116245eSRalf Baechle	bool
11852116245eSRalf Baechle
11865e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
11875e83d430SRalf Baechle	bool
11885e83d430SRalf Baechle
11895e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
11905e83d430SRalf Baechle	bool
11911da177e4SLinus Torvalds
11929cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
11939cffd154SDavid Daney	bool
11949cffd154SDavid Daney	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
11959cffd154SDavid Daney	default y
11969cffd154SDavid Daney
1197aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1198aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1199aa1762f4SDavid Daney
12001da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
12011da177e4SLinus Torvalds	bool
12021da177e4SLinus Torvalds
12039267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
12049267a30dSMarc St-Jean	bool
12059267a30dSMarc St-Jean
12069267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
12079267a30dSMarc St-Jean	bool
12089267a30dSMarc St-Jean
12098420fd00SAtsushi Nemotoconfig IRQ_TXX9
12108420fd00SAtsushi Nemoto	bool
12118420fd00SAtsushi Nemoto
1212d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1213d5ab1a69SYoichi Yuasa	bool
1214d5ab1a69SYoichi Yuasa
1215252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
12161da177e4SLinus Torvalds	bool
12171da177e4SLinus Torvalds
12189267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
12199267a30dSMarc St-Jean	bool
12209267a30dSMarc St-Jean
1221a83860c2SRalf Baechleconfig SOC_EMMA2RH
1222a83860c2SRalf Baechle	bool
1223a83860c2SRalf Baechle	select CEVT_R4K
1224a83860c2SRalf Baechle	select CSRC_R4K
1225a83860c2SRalf Baechle	select DMA_NONCOHERENT
122667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1227a83860c2SRalf Baechle	select SWAP_IO_SPACE
1228a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1229a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1230a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1231a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1232a83860c2SRalf Baechle
1233edb6310aSDaniel Lairdconfig SOC_PNX833X
1234edb6310aSDaniel Laird	bool
1235edb6310aSDaniel Laird	select CEVT_R4K
1236edb6310aSDaniel Laird	select CSRC_R4K
123767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1238edb6310aSDaniel Laird	select DMA_NONCOHERENT
1239edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1240edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1241edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1242edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1243377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1244edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1245edb6310aSDaniel Laird
1246edb6310aSDaniel Lairdconfig SOC_PNX8335
1247edb6310aSDaniel Laird	bool
1248edb6310aSDaniel Laird	select SOC_PNX833X
1249edb6310aSDaniel Laird
1250a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM
1251a7e07b1aSMarkos Chandras	bool
1252a7e07b1aSMarkos Chandras
12531da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
12541da177e4SLinus Torvalds	bool
12551da177e4SLinus Torvalds
1256e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1257e2defae5SThomas Bogendoerfer	bool
1258e2defae5SThomas Bogendoerfer
12595b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
12605b438c44SThomas Bogendoerfer	bool
12615b438c44SThomas Bogendoerfer
1262e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1263e2defae5SThomas Bogendoerfer	bool
1264e2defae5SThomas Bogendoerfer
1265e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1266e2defae5SThomas Bogendoerfer	bool
1267e2defae5SThomas Bogendoerfer
1268e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1269e2defae5SThomas Bogendoerfer	bool
1270e2defae5SThomas Bogendoerfer
1271e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1272e2defae5SThomas Bogendoerfer	bool
1273e2defae5SThomas Bogendoerfer
1274e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1275e2defae5SThomas Bogendoerfer	bool
1276e2defae5SThomas Bogendoerfer
12770e2794b0SRalf Baechleconfig FW_ARC32
12785e83d430SRalf Baechle	bool
12795e83d430SRalf Baechle
1280aaa9fad3SPaul Bolleconfig FW_SNIPROM
1281231a35d3SThomas Bogendoerfer	bool
1282231a35d3SThomas Bogendoerfer
12831da177e4SLinus Torvaldsconfig BOOT_ELF32
12841da177e4SLinus Torvalds	bool
12851da177e4SLinus Torvalds
1286930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1287930beb5aSFlorian Fainelli	bool
1288930beb5aSFlorian Fainelli
1289930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1290930beb5aSFlorian Fainelli	bool
1291930beb5aSFlorian Fainelli
1292930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1293930beb5aSFlorian Fainelli	bool
1294930beb5aSFlorian Fainelli
1295930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1296930beb5aSFlorian Fainelli	bool
1297930beb5aSFlorian Fainelli
12981da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
12991da177e4SLinus Torvalds	int
1300a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
13015432eeb6SKevin Cernekee	default "6" if MIPS_L1_CACHE_SHIFT_6
13025432eeb6SKevin Cernekee	default "5" if MIPS_L1_CACHE_SHIFT_5
13035432eeb6SKevin Cernekee	default "4" if MIPS_L1_CACHE_SHIFT_4
13041da177e4SLinus Torvalds	default "5"
13051da177e4SLinus Torvalds
13061da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
13071da177e4SLinus Torvalds	bool
13081da177e4SLinus Torvalds
13091da177e4SLinus Torvaldsconfig ARC_CONSOLE
13101da177e4SLinus Torvalds	bool "ARC console support"
1311e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
13121da177e4SLinus Torvalds
13131da177e4SLinus Torvaldsconfig ARC_MEMORY
13141da177e4SLinus Torvalds	bool
131514b36af4SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP32
13161da177e4SLinus Torvalds	default y
13171da177e4SLinus Torvalds
13181da177e4SLinus Torvaldsconfig ARC_PROMLIB
13191da177e4SLinus Torvalds	bool
1320e2defae5SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
13211da177e4SLinus Torvalds	default y
13221da177e4SLinus Torvalds
13230e2794b0SRalf Baechleconfig FW_ARC64
13241da177e4SLinus Torvalds	bool
13251da177e4SLinus Torvalds
13261da177e4SLinus Torvaldsconfig BOOT_ELF64
13271da177e4SLinus Torvalds	bool
13281da177e4SLinus Torvalds
13291da177e4SLinus Torvaldsmenu "CPU selection"
13301da177e4SLinus Torvalds
13311da177e4SLinus Torvaldschoice
13321da177e4SLinus Torvalds	prompt "CPU type"
13331da177e4SLinus Torvalds	default CPU_R4X00
13341da177e4SLinus Torvalds
13350e476d91SHuacai Chenconfig CPU_LOONGSON3
13360e476d91SHuacai Chen	bool "Loongson 3 CPU"
13370e476d91SHuacai Chen	depends on SYS_HAS_CPU_LOONGSON3
13380e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
13390e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
13400e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
13410e476d91SHuacai Chen	select WEAK_ORDERING
13420e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
1343*d30a2b47SLinus Walleij	select GPIOLIB
13440e476d91SHuacai Chen	help
13450e476d91SHuacai Chen		The Loongson 3 processor implements the MIPS64R2 instruction
13460e476d91SHuacai Chen		set with many extensions.
13470e476d91SHuacai Chen
13483702bba5SWu Zhangjinconfig CPU_LOONGSON2E
13493702bba5SWu Zhangjin	bool "Loongson 2E"
13503702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
13513702bba5SWu Zhangjin	select CPU_LOONGSON2
13522a21c730SFuxin Zhang	help
13532a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
13542a21c730SFuxin Zhang	  with many extensions.
13552a21c730SFuxin Zhang
135625985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
13576f7a251aSWu Zhangjin	  bonito64.
13586f7a251aSWu Zhangjin
13596f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
13606f7a251aSWu Zhangjin	bool "Loongson 2F"
13616f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
13626f7a251aSWu Zhangjin	select CPU_LOONGSON2
1363*d30a2b47SLinus Walleij	select GPIOLIB
13646f7a251aSWu Zhangjin	help
13656f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
13666f7a251aSWu Zhangjin	  with many extensions.
13676f7a251aSWu Zhangjin
13686f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
13696f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
13706f7a251aSWu Zhangjin	  Loongson2E.
13716f7a251aSWu Zhangjin
1372ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1373ca585cf9SKelvin Cheung	bool "Loongson 1B"
1374ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1375ca585cf9SKelvin Cheung	select CPU_LOONGSON1
1376ca585cf9SKelvin Cheung	help
1377ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1378ca585cf9SKelvin Cheung	  release 2 instruction set.
1379ca585cf9SKelvin Cheung
13806e760c8dSRalf Baechleconfig CPU_MIPS32_R1
13816e760c8dSRalf Baechle	bool "MIPS32 Release 1"
13827cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
13836e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1384797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1385ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13866e760c8dSRalf Baechle	help
13875e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
13881e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13891e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13901e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
13911e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13921e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
13931e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
13941e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
13951e5f1caaSRalf Baechle	  performance.
13961e5f1caaSRalf Baechle
13971e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
13981e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
13997cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
14001e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1401797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1402ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1403a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14042235a54dSSanjay Lal	select HAVE_KVM
14051e5f1caaSRalf Baechle	help
14065e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14076e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
14086e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
14096e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14106e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
14111da177e4SLinus Torvalds
14127fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6
1413674d10e2SMarkos Chandras	bool "MIPS32 Release 6"
14147fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R6
14157fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14167fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14177fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14187fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14194e0748f5SMarkos Chandras	select GENERIC_CSUM
14207fd08ca5SLeonid Yegoshin	select HAVE_KVM
14217fd08ca5SLeonid Yegoshin	select MIPS_O32_FP64_SUPPORT
14227fd08ca5SLeonid Yegoshin	help
14237fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14247fd08ca5SLeonid Yegoshin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
14257fd08ca5SLeonid Yegoshin	  family, are based on a MIPS32r6 processor. If you own an older
14267fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
14277fd08ca5SLeonid Yegoshin
14286e760c8dSRalf Baechleconfig CPU_MIPS64_R1
14296e760c8dSRalf Baechle	bool "MIPS64 Release 1"
14307cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1431797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1432ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1433ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1434ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14359cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
14366e760c8dSRalf Baechle	help
14376e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
14386e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14396e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14406e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14416e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14421e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
14431e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
14441e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
14451e5f1caaSRalf Baechle	  performance.
14461e5f1caaSRalf Baechle
14471e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
14481e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
14497cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1450797798c1SRalf Baechle	select CPU_HAS_PREFETCH
14511e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
14521e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1453ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14549cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1455a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14561e5f1caaSRalf Baechle	help
14571e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14581e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14591e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14601e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
14611e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14621da177e4SLinus Torvalds
14637fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6
1464674d10e2SMarkos Chandras	bool "MIPS64 Release 6"
14657fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS64_R6
14667fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14677fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14687fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_64BIT_KERNEL
14697fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14707fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14714e0748f5SMarkos Chandras	select GENERIC_CSUM
14724e9d324dSPaul Burton	select MIPS_O32_FP64_SUPPORT if MIPS32_O32
14737fd08ca5SLeonid Yegoshin	help
14747fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14757fd08ca5SLeonid Yegoshin	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
14767fd08ca5SLeonid Yegoshin	  family, are based on a MIPS64r6 processor. If you own an older
14777fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
14787fd08ca5SLeonid Yegoshin
14791da177e4SLinus Torvaldsconfig CPU_R3000
14801da177e4SLinus Torvalds	bool "R3000"
14817cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1482f7062ddbSRalf Baechle	select CPU_HAS_WB
1483ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1484797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14851da177e4SLinus Torvalds	help
14861da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
14871da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
14881da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
14891da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
14901da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
14911da177e4SLinus Torvalds	  try to recompile with R3000.
14921da177e4SLinus Torvalds
14931da177e4SLinus Torvaldsconfig CPU_TX39XX
14941da177e4SLinus Torvalds	bool "R39XX"
14957cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1496ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
14971da177e4SLinus Torvalds
14981da177e4SLinus Torvaldsconfig CPU_VR41XX
14991da177e4SLinus Torvalds	bool "R41xx"
15007cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1501ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1502ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15031da177e4SLinus Torvalds	help
15045e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
15051da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
15061da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
15071da177e4SLinus Torvalds	  processor or vice versa.
15081da177e4SLinus Torvalds
15091da177e4SLinus Torvaldsconfig CPU_R4300
15101da177e4SLinus Torvalds	bool "R4300"
15117cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4300
1512ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1513ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15141da177e4SLinus Torvalds	help
15151da177e4SLinus Torvalds	  MIPS Technologies R4300-series processors.
15161da177e4SLinus Torvalds
15171da177e4SLinus Torvaldsconfig CPU_R4X00
15181da177e4SLinus Torvalds	bool "R4x00"
15197cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1520ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1521ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1522970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15231da177e4SLinus Torvalds	help
15241da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
15251da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
15261da177e4SLinus Torvalds
15271da177e4SLinus Torvaldsconfig CPU_TX49XX
15281da177e4SLinus Torvalds	bool "R49XX"
15297cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1530de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1531ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1532ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1533970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15341da177e4SLinus Torvalds
15351da177e4SLinus Torvaldsconfig CPU_R5000
15361da177e4SLinus Torvalds	bool "R5000"
15377cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1538ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1539ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1540970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15411da177e4SLinus Torvalds	help
15421da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
15431da177e4SLinus Torvalds
15441da177e4SLinus Torvaldsconfig CPU_R5432
15451da177e4SLinus Torvalds	bool "R5432"
15467cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5432
15475e83d430SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
15485e83d430SRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1549970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15501da177e4SLinus Torvalds
1551542c1020SShinya Kuribayashiconfig CPU_R5500
1552542c1020SShinya Kuribayashi	bool "R5500"
1553542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1554542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1555542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
15569cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1557542c1020SShinya Kuribayashi	help
1558542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1559542c1020SShinya Kuribayashi	  instruction set.
1560542c1020SShinya Kuribayashi
15611da177e4SLinus Torvaldsconfig CPU_R6000
15621da177e4SLinus Torvalds	bool "R6000"
15637cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R6000
1564ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
15651da177e4SLinus Torvalds	help
15661da177e4SLinus Torvalds	  MIPS Technologies R6000 and R6000A series processors.  Note these
1567c09b47d8SChris Dearman	  processors are extremely rare and the support for them is incomplete.
15681da177e4SLinus Torvalds
15691da177e4SLinus Torvaldsconfig CPU_NEVADA
15701da177e4SLinus Torvalds	bool "RM52xx"
15717cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1572ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1573ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1574970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15751da177e4SLinus Torvalds	help
15761da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
15771da177e4SLinus Torvalds
15781da177e4SLinus Torvaldsconfig CPU_R8000
15791da177e4SLinus Torvalds	bool "R8000"
15807cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R8000
15815e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1582ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15831da177e4SLinus Torvalds	help
15841da177e4SLinus Torvalds	  MIPS Technologies R8000 processors.  Note these processors are
15851da177e4SLinus Torvalds	  uncommon and the support for them is incomplete.
15861da177e4SLinus Torvalds
15871da177e4SLinus Torvaldsconfig CPU_R10000
15881da177e4SLinus Torvalds	bool "R10000"
15897cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
15905e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1591ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1592ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1593797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1594970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15951da177e4SLinus Torvalds	help
15961da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
15971da177e4SLinus Torvalds
15981da177e4SLinus Torvaldsconfig CPU_RM7000
15991da177e4SLinus Torvalds	bool "RM7000"
16007cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
16015e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1602ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1603ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1604797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1605970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16061da177e4SLinus Torvalds
16071da177e4SLinus Torvaldsconfig CPU_SB1
16081da177e4SLinus Torvalds	bool "SB1"
16097cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1610ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1611ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1612797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1613970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16140004a9dfSRalf Baechle	select WEAK_ORDERING
16151da177e4SLinus Torvalds
1616a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1617a86c7f72SDavid Daney	bool "Cavium Octeon processor"
16185e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1619a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1620a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1621a86c7f72SDavid Daney	select WEAK_ORDERING
1622a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
16239cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1624df115f3eSBen Hutchings	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1625df115f3eSBen Hutchings	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1626930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
1627a86c7f72SDavid Daney	help
1628a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1629a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1630a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1631a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1632a86c7f72SDavid Daney
1633cd746249SJonas Gorskiconfig CPU_BMIPS
1634cd746249SJonas Gorski	bool "Broadcom BMIPS"
1635cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1636cd746249SJonas Gorski	select CPU_MIPS32
1637fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1638cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1639cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1640cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1641cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1642cd746249SJonas Gorski	select DMA_NONCOHERENT
164367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1644cd746249SJonas Gorski	select SWAP_IO_SPACE
1645cd746249SJonas Gorski	select WEAK_ORDERING
1646c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
164769aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1648c1c0c461SKevin Cernekee	help
1649fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1650c1c0c461SKevin Cernekee
16517f058e85SJayachandran Cconfig CPU_XLR
16527f058e85SJayachandran C	bool "Netlogic XLR SoC"
16537f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
16547f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16557f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16567f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1657970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16587f058e85SJayachandran C	select WEAK_ORDERING
16597f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16607f058e85SJayachandran C	help
16617f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
16621c773ea4SJayachandran C
16631c773ea4SJayachandran Cconfig CPU_XLP
16641c773ea4SJayachandran C	bool "Netlogic XLP SoC"
16651c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
16661c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16671c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16681c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
16691c773ea4SJayachandran C	select WEAK_ORDERING
16701c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16711c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1672d6504846SJayachandran C	select CPU_MIPSR2
1673ddba6833SPrem Mallappa	select CPU_SUPPORTS_HUGEPAGES
16741c773ea4SJayachandran C	help
16751c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
16761da177e4SLinus Torvaldsendchoice
16771da177e4SLinus Torvalds
1678a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1679a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1680a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
16817fd08ca5SLeonid Yegoshin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1682a6e18781SLeonid Yegoshin	help
1683a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1684a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1685a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1686a6e18781SLeonid Yegoshin
1687a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1688a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1689a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1690a6e18781SLeonid Yegoshin	select EVA
1691a6e18781SLeonid Yegoshin	default y
1692a6e18781SLeonid Yegoshin	help
1693a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1694a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1695a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1696a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1697a6e18781SLeonid Yegoshin
1698c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES
1699c5b36783SSteven J. Hill	bool "MIPS32 Release 5 Features"
1700c5b36783SSteven J. Hill	depends on SYS_HAS_CPU_MIPS32_R5
1701c5b36783SSteven J. Hill	depends on CPU_MIPS32_R2
1702c5b36783SSteven J. Hill	help
1703c5b36783SSteven J. Hill	  Choose this option to build a kernel for release 2 or later of the
1704c5b36783SSteven J. Hill	  MIPS32 architecture including features from release 5 such as
1705c5b36783SSteven J. Hill	  support for Extended Physical Addressing (XPA).
1706c5b36783SSteven J. Hill
1707c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA
1708c5b36783SSteven J. Hill	bool "Extended Physical Addressing (XPA)"
1709c5b36783SSteven J. Hill	depends on CPU_MIPS32_R5_FEATURES
1710c5b36783SSteven J. Hill	depends on !EVA
1711c5b36783SSteven J. Hill	depends on !PAGE_SIZE_4KB
1712c5b36783SSteven J. Hill	depends on SYS_SUPPORTS_HIGHMEM
1713c5b36783SSteven J. Hill	select XPA
1714c5b36783SSteven J. Hill	select HIGHMEM
1715c5b36783SSteven J. Hill	select ARCH_PHYS_ADDR_T_64BIT
1716c5b36783SSteven J. Hill	default n
1717c5b36783SSteven J. Hill	help
1718c5b36783SSteven J. Hill	  Choose this option if you want to enable the Extended Physical
1719c5b36783SSteven J. Hill	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1720c5b36783SSteven J. Hill	  benefit is to increase physical addressing equal to or greater
1721c5b36783SSteven J. Hill	  than 40 bits. Note that this has the side effect of turning on
1722c5b36783SSteven J. Hill	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1723c5b36783SSteven J. Hill	  If unsure, say 'N' here.
1724c5b36783SSteven J. Hill
1725622844bfSWu Zhangjinif CPU_LOONGSON2F
1726622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1727622844bfSWu Zhangjin	bool
1728622844bfSWu Zhangjin
1729622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1730622844bfSWu Zhangjin	bool
1731622844bfSWu Zhangjin
1732622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1733622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1734622844bfSWu Zhangjin	default y
1735622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1736622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1737622844bfSWu Zhangjin	help
1738622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1739622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1740622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1741622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1742622844bfSWu Zhangjin
1743622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1744622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1745622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1746622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1747622844bfSWu Zhangjin	  systems.
1748622844bfSWu Zhangjin
1749622844bfSWu Zhangjin	  If unsure, please say Y.
1750622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1751622844bfSWu Zhangjin
17521b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
17531b93b3c3SWu Zhangjin	bool
17541b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
17551b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
175631c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
17571b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1758fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
17594e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
17601b93b3c3SWu Zhangjin
17611b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
17621b93b3c3SWu Zhangjin	bool
17631b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
17641b93b3c3SWu Zhangjin
1765dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM
1766dbb98314SAlban Bedel	bool
1767dbb98314SAlban Bedel	select SYS_SUPPORTS_ZBOOT
1768dbb98314SAlban Bedel
17693702bba5SWu Zhangjinconfig CPU_LOONGSON2
17703702bba5SWu Zhangjin	bool
17713702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
17723702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
17733702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1774970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17753702bba5SWu Zhangjin
1776ca585cf9SKelvin Cheungconfig CPU_LOONGSON1
1777ca585cf9SKelvin Cheung	bool
1778ca585cf9SKelvin Cheung	select CPU_MIPS32
1779ca585cf9SKelvin Cheung	select CPU_MIPSR2
1780ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1781ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1782ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1783f29ad10dSKelvin Cheung	select CPU_SUPPORTS_CPUFREQ
1784ca585cf9SKelvin Cheung
1785fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
178604fa8bf7SJonas Gorski	select SMP_UP if SMP
17871bbb6c1bSKevin Cernekee	bool
1788cd746249SJonas Gorski
1789cd746249SJonas Gorskiconfig CPU_BMIPS4350
1790cd746249SJonas Gorski	bool
1791cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1792cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1793cd746249SJonas Gorski
1794cd746249SJonas Gorskiconfig CPU_BMIPS4380
1795cd746249SJonas Gorski	bool
1796bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
1797cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1798cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1799cd746249SJonas Gorski
1800cd746249SJonas Gorskiconfig CPU_BMIPS5000
1801cd746249SJonas Gorski	bool
1802cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1803bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_7
1804cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1805cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
18061bbb6c1bSKevin Cernekee
18070e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3
18080e476d91SHuacai Chen	bool
18090e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
18100e476d91SHuacai Chen
18113702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
18122a21c730SFuxin Zhang	bool
18132a21c730SFuxin Zhang
18146f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
18156f7a251aSWu Zhangjin	bool
181655045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
181755045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
181822f1fdfdSWu Zhangjin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
18196f7a251aSWu Zhangjin
1820ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1821ca585cf9SKelvin Cheung	bool
1822ca585cf9SKelvin Cheung
18237cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
18247cf8053bSRalf Baechle	bool
18257cf8053bSRalf Baechle
18267cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
18277cf8053bSRalf Baechle	bool
18287cf8053bSRalf Baechle
1829a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1830a6e18781SLeonid Yegoshin	bool
1831a6e18781SLeonid Yegoshin
1832c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5
1833c5b36783SSteven J. Hill	bool
1834c5b36783SSteven J. Hill
18357fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6
18367fd08ca5SLeonid Yegoshin	bool
18377fd08ca5SLeonid Yegoshin
18387cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
18397cf8053bSRalf Baechle	bool
18407cf8053bSRalf Baechle
18417cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
18427cf8053bSRalf Baechle	bool
18437cf8053bSRalf Baechle
18447fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6
18457fd08ca5SLeonid Yegoshin	bool
18467fd08ca5SLeonid Yegoshin
18477cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
18487cf8053bSRalf Baechle	bool
18497cf8053bSRalf Baechle
18507cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
18517cf8053bSRalf Baechle	bool
18527cf8053bSRalf Baechle
18537cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
18547cf8053bSRalf Baechle	bool
18557cf8053bSRalf Baechle
18567cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300
18577cf8053bSRalf Baechle	bool
18587cf8053bSRalf Baechle
18597cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
18607cf8053bSRalf Baechle	bool
18617cf8053bSRalf Baechle
18627cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
18637cf8053bSRalf Baechle	bool
18647cf8053bSRalf Baechle
18657cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
18667cf8053bSRalf Baechle	bool
18677cf8053bSRalf Baechle
18687cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432
18697cf8053bSRalf Baechle	bool
18707cf8053bSRalf Baechle
1871542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1872542c1020SShinya Kuribayashi	bool
1873542c1020SShinya Kuribayashi
18747cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000
18757cf8053bSRalf Baechle	bool
18767cf8053bSRalf Baechle
18777cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
18787cf8053bSRalf Baechle	bool
18797cf8053bSRalf Baechle
18807cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000
18817cf8053bSRalf Baechle	bool
18827cf8053bSRalf Baechle
18837cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
18847cf8053bSRalf Baechle	bool
18857cf8053bSRalf Baechle
18867cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
18877cf8053bSRalf Baechle	bool
18887cf8053bSRalf Baechle
18897cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
18907cf8053bSRalf Baechle	bool
18917cf8053bSRalf Baechle
18925e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
18935e683389SDavid Daney	bool
18945e683389SDavid Daney
1895cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
1896c1c0c461SKevin Cernekee	bool
1897c1c0c461SKevin Cernekee
1898fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
1899c1c0c461SKevin Cernekee	bool
1900cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1901c1c0c461SKevin Cernekee
1902c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
1903c1c0c461SKevin Cernekee	bool
1904cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1905c1c0c461SKevin Cernekee
1906c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
1907c1c0c461SKevin Cernekee	bool
1908cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1909c1c0c461SKevin Cernekee
1910c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
1911c1c0c461SKevin Cernekee	bool
1912cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1913c1c0c461SKevin Cernekee
19147f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
19157f058e85SJayachandran C	bool
19167f058e85SJayachandran C
19171c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
19181c773ea4SJayachandran C	bool
19191c773ea4SJayachandran C
1920b6911bbaSPaul Burtonconfig MIPS_MALTA_PM
1921b6911bbaSPaul Burton	depends on MIPS_MALTA
1922b6911bbaSPaul Burton	depends on PCI
1923b6911bbaSPaul Burton	bool
1924b6911bbaSPaul Burton	default y
1925b6911bbaSPaul Burton
192617099b11SRalf Baechle#
192717099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
192817099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
192917099b11SRalf Baechle#
19300004a9dfSRalf Baechleconfig WEAK_ORDERING
19310004a9dfSRalf Baechle	bool
193217099b11SRalf Baechle
193317099b11SRalf Baechle#
193417099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
193517099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
193617099b11SRalf Baechle#
193717099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
193817099b11SRalf Baechle	bool
19395e83d430SRalf Baechleendmenu
19405e83d430SRalf Baechle
19415e83d430SRalf Baechle#
19425e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
19435e83d430SRalf Baechle#
19445e83d430SRalf Baechleconfig CPU_MIPS32
19455e83d430SRalf Baechle	bool
19467fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
19475e83d430SRalf Baechle
19485e83d430SRalf Baechleconfig CPU_MIPS64
19495e83d430SRalf Baechle	bool
19507fd08ca5SLeonid Yegoshin	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
19515e83d430SRalf Baechle
19525e83d430SRalf Baechle#
1953c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2
19545e83d430SRalf Baechle#
19555e83d430SRalf Baechleconfig CPU_MIPSR1
19565e83d430SRalf Baechle	bool
19575e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
19585e83d430SRalf Baechle
19595e83d430SRalf Baechleconfig CPU_MIPSR2
19605e83d430SRalf Baechle	bool
1961a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1962a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19635e83d430SRalf Baechle
19647fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6
19657fd08ca5SLeonid Yegoshin	bool
19667fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1967a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19685e83d430SRalf Baechle
1969a6e18781SLeonid Yegoshinconfig EVA
1970a6e18781SLeonid Yegoshin	bool
1971a6e18781SLeonid Yegoshin
1972c5b36783SSteven J. Hillconfig XPA
1973c5b36783SSteven J. Hill	bool
1974c5b36783SSteven J. Hill
19755e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
19765e83d430SRalf Baechle	bool
19775e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
19785e83d430SRalf Baechle	bool
19795e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
19805e83d430SRalf Baechle	bool
19815e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
19825e83d430SRalf Baechle	bool
198355045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
198455045ff5SWu Zhangjin	bool
198555045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
198655045ff5SWu Zhangjin	bool
19879cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
19889cffd154SDavid Daney	bool
198922f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED
199022f1fdfdSWu Zhangjin	bool
199182622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
199282622284SDavid Daney	bool
1993d6504846SJayachandran C	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
19945e83d430SRalf Baechle
19958192c9eaSDavid Daney#
19968192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
19978192c9eaSDavid Daney#
19988192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
19998192c9eaSDavid Daney       bool
2000f839490aSDavid Daney       default y if CPU_MIPSR1 || CPU_MIPSR2
20018192c9eaSDavid Daney
20025e83d430SRalf Baechlemenu "Kernel type"
20035e83d430SRalf Baechle
20045e83d430SRalf Baechlechoice
20055e83d430SRalf Baechle	prompt "Kernel code model"
20065e83d430SRalf Baechle	help
20075e83d430SRalf Baechle	  You should only select this option if you have a workload that
20085e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
20095e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
20105e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
20115e83d430SRalf Baechle
20125e83d430SRalf Baechleconfig 32BIT
20135e83d430SRalf Baechle	bool "32-bit kernel"
20145e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
20155e83d430SRalf Baechle	select TRAD_SIGNALS
20165e83d430SRalf Baechle	help
20175e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
2018f17c4ca3SRalf Baechle
20195e83d430SRalf Baechleconfig 64BIT
20205e83d430SRalf Baechle	bool "64-bit kernel"
20215e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
20225e83d430SRalf Baechle	help
20235e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
20245e83d430SRalf Baechle
20255e83d430SRalf Baechleendchoice
20265e83d430SRalf Baechle
20272235a54dSSanjay Lalconfig KVM_GUEST
20282235a54dSSanjay Lal	bool "KVM Guest Kernel"
2029f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
20302235a54dSSanjay Lal	help
2031caa1faa7SJames Hogan	  Select this option if building a guest kernel for KVM (Trap & Emulate)
2032caa1faa7SJames Hogan	  mode.
20332235a54dSSanjay Lal
2034eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ
2035eda3d33cSJames Hogan	int "Count/Compare Timer Frequency (MHz)"
20362235a54dSSanjay Lal	depends on KVM_GUEST
2037eda3d33cSJames Hogan	default 100
20382235a54dSSanjay Lal	help
2039eda3d33cSJames Hogan	  Set this to non-zero if building a guest kernel for KVM to skip RTC
2040eda3d33cSJames Hogan	  emulation when determining guest CPU Frequency. Instead, the guest's
2041eda3d33cSJames Hogan	  timer frequency is specified directly.
20422235a54dSSanjay Lal
20431da177e4SLinus Torvaldschoice
20441da177e4SLinus Torvalds	prompt "Kernel page size"
20451da177e4SLinus Torvalds	default PAGE_SIZE_4KB
20461da177e4SLinus Torvalds
20471da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
20481da177e4SLinus Torvalds	bool "4kB"
20490e476d91SHuacai Chen	depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
20501da177e4SLinus Torvalds	help
20511da177e4SLinus Torvalds	 This option select the standard 4kB Linux page size.  On some
20521da177e4SLinus Torvalds	 R3000-family processors this is the only available page size.  Using
20531da177e4SLinus Torvalds	 4kB page size will minimize memory consumption and is therefore
20541da177e4SLinus Torvalds	 recommended for low memory systems.
20551da177e4SLinus Torvalds
20561da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
20571da177e4SLinus Torvalds	bool "8kB"
20587d60717eSKees Cook	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
20591da177e4SLinus Torvalds	help
20601da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
20611da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
2062c52399beSRalf Baechle	  only on R8000 and cnMIPS processors.  Note that you will need a
2063c52399beSRalf Baechle	  suitable Linux distribution to support this.
20641da177e4SLinus Torvalds
20651da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
20661da177e4SLinus Torvalds	bool "16kB"
2067714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
20681da177e4SLinus Torvalds	help
20691da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
20701da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
2071714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
2072714bfad6SRalf Baechle	  Linux distribution to support this.
20731da177e4SLinus Torvalds
2074c52399beSRalf Baechleconfig PAGE_SIZE_32KB
2075c52399beSRalf Baechle	bool "32kB"
2076c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
2077c52399beSRalf Baechle	help
2078c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
2079c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
2080c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
2081c52399beSRalf Baechle	  distribution to support this.
2082c52399beSRalf Baechle
20831da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
20841da177e4SLinus Torvalds	bool "64kB"
208574c81ecdSRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000
20861da177e4SLinus Torvalds	help
20871da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
20881da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
20891da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
2090714bfad6SRalf Baechle	  writing this option is still high experimental.
20911da177e4SLinus Torvalds
20921da177e4SLinus Torvaldsendchoice
20931da177e4SLinus Torvalds
2094c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
2095c9bace7cSDavid Daney	int "Maximum zone order"
2096e4362d1eSAlex Smith	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2097e4362d1eSAlex Smith	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2098e4362d1eSAlex Smith	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2099e4362d1eSAlex Smith	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2100e4362d1eSAlex Smith	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2101e4362d1eSAlex Smith	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2102c9bace7cSDavid Daney	range 11 64
2103c9bace7cSDavid Daney	default "11"
2104c9bace7cSDavid Daney	help
2105c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
2106c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
2107c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
2108c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
2109c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
2110c9bace7cSDavid Daney	  increase this value.
2111c9bace7cSDavid Daney
2112c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
2113c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
2114c9bace7cSDavid Daney
2115c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
2116c9bace7cSDavid Daney	  when choosing a value for this option.
2117c9bace7cSDavid Daney
21181da177e4SLinus Torvaldsconfig BOARD_SCACHE
21191da177e4SLinus Torvalds	bool
21201da177e4SLinus Torvalds
21211da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
21221da177e4SLinus Torvalds	bool
21231da177e4SLinus Torvalds	select BOARD_SCACHE
21241da177e4SLinus Torvalds
21259318c51aSChris Dearman#
21269318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
21279318c51aSChris Dearman#
21289318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
21299318c51aSChris Dearman	bool
21309318c51aSChris Dearman	select BOARD_SCACHE
21319318c51aSChris Dearman
21321da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
21331da177e4SLinus Torvalds	bool
21341da177e4SLinus Torvalds	select BOARD_SCACHE
21351da177e4SLinus Torvalds
21361da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
21371da177e4SLinus Torvalds	bool
21381da177e4SLinus Torvalds	select BOARD_SCACHE
21391da177e4SLinus Torvalds
21401da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
21411da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
21421da177e4SLinus Torvalds	depends on CPU_SB1
21431da177e4SLinus Torvalds	help
21441da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
21451da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
21461da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
21471da177e4SLinus Torvalds
21481da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
2149c8094b53SRalf Baechle	bool
21501da177e4SLinus Torvalds
21513165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
21523165c846SFlorian Fainelli	bool
21533165c846SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
21543165c846SFlorian Fainelli
215591405eb6SFlorian Fainelliconfig CPU_R4K_FPU
215691405eb6SFlorian Fainelli	bool
215791405eb6SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
215891405eb6SFlorian Fainelli
215962cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
216062cedc4fSFlorian Fainelli	bool
216162cedc4fSFlorian Fainelli	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
216262cedc4fSFlorian Fainelli
216359d6ab86SRalf Baechleconfig MIPS_MT_SMP
2164a92b7f87SMarkos Chandras	bool "MIPS MT SMP support (1 TC on each available VPE)"
21655676319cSMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
216659d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
2167d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
2168c080faa5SSteven J. Hill	select SYNC_R4K
216959d6ab86SRalf Baechle	select MIPS_MT
217059d6ab86SRalf Baechle	select SMP
217187353d8aSRalf Baechle	select SMP_UP
2172c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
2173c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
2174399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
217559d6ab86SRalf Baechle	help
2176c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
2177c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
2178c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
2179c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
2180c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
218159d6ab86SRalf Baechle
2182f41ae0b2SRalf Baechleconfig MIPS_MT
2183f41ae0b2SRalf Baechle	bool
2184f41ae0b2SRalf Baechle
21850ab7aefcSRalf Baechleconfig SCHED_SMT
21860ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
21870ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
21880ab7aefcSRalf Baechle	default n
21890ab7aefcSRalf Baechle	help
21900ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
21910ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
21920ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
21930ab7aefcSRalf Baechle
21940ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
21950ab7aefcSRalf Baechle	bool
21960ab7aefcSRalf Baechle
2197f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
2198f41ae0b2SRalf Baechle	bool
2199f41ae0b2SRalf Baechle
2200f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
2201f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
2202f088fc84SRalf Baechle	default y
2203b633648cSRalf Baechle	depends on MIPS_MT_SMP
220407cc0c9eSRalf Baechle
2205b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR
2206b0a668fbSLeonid Yegoshin	bool "MIPS R2-to-R6 emulator"
2207b0a668fbSLeonid Yegoshin	depends on CPU_MIPSR6 && !SMP
2208b0a668fbSLeonid Yegoshin	default y
2209b0a668fbSLeonid Yegoshin	help
2210b0a668fbSLeonid Yegoshin	  Choose this option if you want to run non-R6 MIPS userland code.
2211b0a668fbSLeonid Yegoshin	  Even if you say 'Y' here, the emulator will still be disabled by
221207edf0d4SMarkos Chandras	  default. You can enable it using the 'mipsr2emu' kernel option.
2213b0a668fbSLeonid Yegoshin	  The only reason this is a build-time option is to save ~14K from the
2214b0a668fbSLeonid Yegoshin	  final kernel image.
2215b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels"
2216b0a668fbSLeonid Yegoshin	depends on SMP && CPU_MIPSR6
2217b0a668fbSLeonid Yegoshin
221807cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
221907cc0c9eSRalf Baechle	bool "VPE loader support."
2220704e6460SMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && MODULES
222107cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
222207cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
222307cc0c9eSRalf Baechle	select MIPS_MT
222407cc0c9eSRalf Baechle	help
222507cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
222607cc0c9eSRalf Baechle	  onto another VPE and running it.
2227f088fc84SRalf Baechle
222817a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
222917a1d523SDeng-Cheng Zhu	bool
223017a1d523SDeng-Cheng Zhu	default "y"
223117a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
223217a1d523SDeng-Cheng Zhu
22331a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
22341a2a6d7eSDeng-Cheng Zhu	bool
22351a2a6d7eSDeng-Cheng Zhu	default "y"
22361a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
22371a2a6d7eSDeng-Cheng Zhu
2238e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2239e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2240e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2241e01402b1SRalf Baechle	default y
2242e01402b1SRalf Baechle	help
2243e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2244e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2245e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2246e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2247e01402b1SRalf Baechle
2248e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2249e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2250e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
22515e83d430SRalf Baechle	help
2252e01402b1SRalf Baechle
2253da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2254da615cf6SDeng-Cheng Zhu	bool
2255da615cf6SDeng-Cheng Zhu	default "y"
2256da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2257da615cf6SDeng-Cheng Zhu
22582c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
22592c973ef0SDeng-Cheng Zhu	bool
22602c973ef0SDeng-Cheng Zhu	default "y"
22612c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
22622c973ef0SDeng-Cheng Zhu
22634a16ff4cSRalf Baechleconfig MIPS_CMP
22645cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
22655676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2266b10b43baSMarkos Chandras	select SMP
2267eb9b5141STim Anderson	select SYNC_R4K
2268b10b43baSMarkos Chandras	select SYS_SUPPORTS_SMP
22694a16ff4cSRalf Baechle	select WEAK_ORDERING
22704a16ff4cSRalf Baechle	default n
22714a16ff4cSRalf Baechle	help
2272044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2273044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2274044505c7SPaul Burton	  its ability to start secondary CPUs.
22754a16ff4cSRalf Baechle
22765cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
22775cac93b3SPaul Burton	  instead of this.
22785cac93b3SPaul Burton
22790ee958e1SPaul Burtonconfig MIPS_CPS
22800ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
22815676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CPS && !CPU_MIPSR6
22820ee958e1SPaul Burton	select MIPS_CM
22830ee958e1SPaul Burton	select MIPS_CPC
22841d8f1f5aSPaul Burton	select MIPS_CPS_PM if HOTPLUG_CPU
22850ee958e1SPaul Burton	select SMP
22860ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
22871d8f1f5aSPaul Burton	select SYS_SUPPORTS_HOTPLUG_CPU
22880ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
22890ee958e1SPaul Burton	select WEAK_ORDERING
22900ee958e1SPaul Burton	help
22910ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
22920ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
22930ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
22940ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
22950ee958e1SPaul Burton	  support is unavailable.
22960ee958e1SPaul Burton
22973179d37eSPaul Burtonconfig MIPS_CPS_PM
229839a59593SMarkos Chandras	depends on MIPS_CPS
2299a8b84677SPaul Burton	select MIPS_CPC
23003179d37eSPaul Burton	bool
23013179d37eSPaul Burton
23029f98f3ddSPaul Burtonconfig MIPS_CM
23039f98f3ddSPaul Burton	bool
23049f98f3ddSPaul Burton
23059c38cf44SPaul Burtonconfig MIPS_CPC
23069c38cf44SPaul Burton	bool
23072600990eSRalf Baechle
23081da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
23091da177e4SLinus Torvalds	bool
23101da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
23111da177e4SLinus Torvalds	default y
23121da177e4SLinus Torvalds
23131da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
23141da177e4SLinus Torvalds	bool
23151da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
23161da177e4SLinus Torvalds	default y
23171da177e4SLinus Torvalds
23182235a54dSSanjay Lal
231960ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT
232034adb28dSRalf Baechle       bool
232160ec6571Spascal@pabr.org
23229e2b5372SMarkos Chandraschoice
23239e2b5372SMarkos Chandras	prompt "SmartMIPS or microMIPS ASE support"
23249e2b5372SMarkos Chandras
23259e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
23269e2b5372SMarkos Chandras	bool "None"
23279e2b5372SMarkos Chandras	help
23289e2b5372SMarkos Chandras	  Select this if you want neither microMIPS nor SmartMIPS support
23299e2b5372SMarkos Chandras
23309693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
23319693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
23329e2b5372SMarkos Chandras	bool "SmartMIPS"
23339693a853SFranck Bui-Huu	help
23349693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
23359693a853SFranck Bui-Huu	  increased security at both hardware and software level for
23369693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
23379693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
23389693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
23399693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
23409693a853SFranck Bui-Huu	  here.
23419693a853SFranck Bui-Huu
2342bce86083SSteven J. Hillconfig CPU_MICROMIPS
23437fd08ca5SLeonid Yegoshin	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
23449e2b5372SMarkos Chandras	bool "microMIPS"
2345bce86083SSteven J. Hill	help
2346bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2347bce86083SSteven J. Hill	  microMIPS ISA
2348bce86083SSteven J. Hill
23499e2b5372SMarkos Chandrasendchoice
23509e2b5372SMarkos Chandras
2351a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
23520ce3417eSPaul Burton	bool "Support for the MIPS SIMD Architecture"
2353a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
23542a6cb669SPaul Burton	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2355a5e9a69eSPaul Burton	help
2356a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2357a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
23581db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
23591db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
23601db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
23611db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
23621db1af84SPaul Burton	  the size & complexity of your kernel.
2363a5e9a69eSPaul Burton
2364a5e9a69eSPaul Burton	  If unsure, say Y.
2365a5e9a69eSPaul Burton
23661da177e4SLinus Torvaldsconfig CPU_HAS_WB
2367f7062ddbSRalf Baechle	bool
2368e01402b1SRalf Baechle
2369df0ac8a4SKevin Cernekeeconfig XKS01
2370df0ac8a4SKevin Cernekee	bool
2371df0ac8a4SKevin Cernekee
2372f41ae0b2SRalf Baechle#
2373f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2374f41ae0b2SRalf Baechle#
2375e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2376f41ae0b2SRalf Baechle	bool
2377e01402b1SRalf Baechle
2378f41ae0b2SRalf Baechle#
2379f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2380f41ae0b2SRalf Baechle#
2381e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2382f41ae0b2SRalf Baechle	bool
2383e01402b1SRalf Baechle
23841da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
23851da177e4SLinus Torvalds	bool
23861da177e4SLinus Torvalds	depends on !CPU_R3000
23871da177e4SLinus Torvalds	default y
23881da177e4SLinus Torvalds
23891da177e4SLinus Torvalds#
239020d60d99SMaciej W. Rozycki# CPU non-features
239120d60d99SMaciej W. Rozycki#
239220d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
239320d60d99SMaciej W. Rozycki	bool
239420d60d99SMaciej W. Rozycki
239520d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
239620d60d99SMaciej W. Rozycki	bool
239720d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
239820d60d99SMaciej W. Rozycki
239920d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
240020d60d99SMaciej W. Rozycki	bool
240120d60d99SMaciej W. Rozycki
240220d60d99SMaciej W. Rozycki#
24031da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
24041da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
24051da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
24061da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
24071da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
24081da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
24091da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
24101da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2411797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2412797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2413797798c1SRalf Baechle#   support.
24141da177e4SLinus Torvalds#
24151da177e4SLinus Torvaldsconfig HIGHMEM
24161da177e4SLinus Torvalds	bool "High Memory Support"
2417a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2418797798c1SRalf Baechle
2419797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2420797798c1SRalf Baechle	bool
2421797798c1SRalf Baechle
2422797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2423797798c1SRalf Baechle	bool
24241da177e4SLinus Torvalds
24259693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
24269693a853SFranck Bui-Huu	bool
24279693a853SFranck Bui-Huu
2428a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2429a6a4834cSSteven J. Hill	bool
2430a6a4834cSSteven J. Hill
2431377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16
2432377cb1b6SRalf Baechle	bool
2433377cb1b6SRalf Baechle	help
2434377cb1b6SRalf Baechle	  This option must be set if a kernel might be executed on a MIPS16-
2435377cb1b6SRalf Baechle	  enabled CPU even if MIPS16 is not actually being used.  In other
2436377cb1b6SRalf Baechle	  words, it makes the kernel MIPS16-tolerant.
2437377cb1b6SRalf Baechle
2438a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2439a5e9a69eSPaul Burton	bool
2440a5e9a69eSPaul Burton
2441b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2442b4819b59SYoichi Yuasa	def_bool y
2443f133f22dSWu Zhangjin	depends on !NUMA && !CPU_LOONGSON2
2444b4819b59SYoichi Yuasa
2445d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE
2446d8cb4e11SRalf Baechle	bool
2447d8cb4e11SRalf Baechle	default y if SGI_IP27
2448d8cb4e11SRalf Baechle	help
24493dde6ad8SDavid Sterba	  Say Y to support efficient handling of discontiguous physical memory,
2450d8cb4e11SRalf Baechle	  for architectures which are either NUMA (Non-Uniform Memory Access)
2451d8cb4e11SRalf Baechle	  or have huge holes in the physical address space for other reasons.
2452d8cb4e11SRalf Baechle	  See <file:Documentation/vm/numa> for more.
2453d8cb4e11SRalf Baechle
2454b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2455b1c6cd42SAtsushi Nemoto	bool
24567de58fabSAtsushi Nemoto	select SPARSEMEM_STATIC
245731473747SAtsushi Nemoto
2458d8cb4e11SRalf Baechleconfig NUMA
2459d8cb4e11SRalf Baechle	bool "NUMA Support"
2460d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2461d8cb4e11SRalf Baechle	help
2462d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2463d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2464d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2465d8cb4e11SRalf Baechle	  leave it disabled; on single node systems disable this option
2466d8cb4e11SRalf Baechle	  disabled.
2467d8cb4e11SRalf Baechle
2468d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2469d8cb4e11SRalf Baechle	bool
2470d8cb4e11SRalf Baechle
2471c80d79d7SYasunori Gotoconfig NODES_SHIFT
2472c80d79d7SYasunori Goto	int
2473c80d79d7SYasunori Goto	default "6"
2474c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2475c80d79d7SYasunori Goto
247614f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
247714f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
2478f14ceff7SHuacai Chen	depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
247914f70012SDeng-Cheng Zhu	default y
248014f70012SDeng-Cheng Zhu	help
248114f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
248214f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
248314f70012SDeng-Cheng Zhu
2484b4819b59SYoichi Yuasasource "mm/Kconfig"
2485b4819b59SYoichi Yuasa
24861da177e4SLinus Torvaldsconfig SMP
24871da177e4SLinus Torvalds	bool "Multi-Processing support"
2488e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2489e73ea273SRalf Baechle	help
24901da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
24914a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
24924a474157SRobert Graffham	  than one CPU, say Y.
24931da177e4SLinus Torvalds
24944a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
24951da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
24961da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
24974a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
24981da177e4SLinus Torvalds	  will run faster if you say N here.
24991da177e4SLinus Torvalds
25001da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
25011da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
25021da177e4SLinus Torvalds
250303502faaSAdrian Bunk	  See also the SMP-HOWTO available at
250403502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
25051da177e4SLinus Torvalds
25061da177e4SLinus Torvalds	  If you don't know what to do here, say N.
25071da177e4SLinus Torvalds
250887353d8aSRalf Baechleconfig SMP_UP
250987353d8aSRalf Baechle	bool
251087353d8aSRalf Baechle
25114a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
25124a16ff4cSRalf Baechle	bool
25134a16ff4cSRalf Baechle
25140ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
25150ee958e1SPaul Burton	bool
25160ee958e1SPaul Burton
2517e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2518e73ea273SRalf Baechle	bool
2519e73ea273SRalf Baechle
2520130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2521130e2fb7SRalf Baechle	bool
2522130e2fb7SRalf Baechle
2523130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2524130e2fb7SRalf Baechle	bool
2525130e2fb7SRalf Baechle
2526130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2527130e2fb7SRalf Baechle	bool
2528130e2fb7SRalf Baechle
2529130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2530130e2fb7SRalf Baechle	bool
2531130e2fb7SRalf Baechle
2532130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2533130e2fb7SRalf Baechle	bool
2534130e2fb7SRalf Baechle
25351da177e4SLinus Torvaldsconfig NR_CPUS
2536a91796a9SJayachandran C	int "Maximum number of CPUs (2-256)"
2537a91796a9SJayachandran C	range 2 256
25381da177e4SLinus Torvalds	depends on SMP
2539130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2540130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2541130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2542130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2543130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
25441da177e4SLinus Torvalds	help
25451da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
25461da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
25471da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
254872ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
254972ede9b1SAtsushi Nemoto	  and 2 for all others.
25501da177e4SLinus Torvalds
25511da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
255272ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
255372ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
255472ede9b1SAtsushi Nemoto	  power of two.
25551da177e4SLinus Torvalds
2556399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2557399aaa25SAl Cooper	bool
2558399aaa25SAl Cooper
25591723b4a3SAtsushi Nemoto#
25601723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
25611723b4a3SAtsushi Nemoto#
25621723b4a3SAtsushi Nemoto
25631723b4a3SAtsushi Nemotochoice
25641723b4a3SAtsushi Nemoto	prompt "Timer frequency"
25651723b4a3SAtsushi Nemoto	default HZ_250
25661723b4a3SAtsushi Nemoto	help
25671723b4a3SAtsushi Nemoto	 Allows the configuration of the timer frequency.
25681723b4a3SAtsushi Nemoto
256967596573SPaul Burton	config HZ_24
257067596573SPaul Burton		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
257167596573SPaul Burton
25721723b4a3SAtsushi Nemoto	config HZ_48
25730f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
25741723b4a3SAtsushi Nemoto
25751723b4a3SAtsushi Nemoto	config HZ_100
25761723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
25771723b4a3SAtsushi Nemoto
25781723b4a3SAtsushi Nemoto	config HZ_128
25791723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
25801723b4a3SAtsushi Nemoto
25811723b4a3SAtsushi Nemoto	config HZ_250
25821723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
25831723b4a3SAtsushi Nemoto
25841723b4a3SAtsushi Nemoto	config HZ_256
25851723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
25861723b4a3SAtsushi Nemoto
25871723b4a3SAtsushi Nemoto	config HZ_1000
25881723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
25891723b4a3SAtsushi Nemoto
25901723b4a3SAtsushi Nemoto	config HZ_1024
25911723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
25921723b4a3SAtsushi Nemoto
25931723b4a3SAtsushi Nemotoendchoice
25941723b4a3SAtsushi Nemoto
259567596573SPaul Burtonconfig SYS_SUPPORTS_24HZ
259667596573SPaul Burton	bool
259767596573SPaul Burton
25981723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
25991723b4a3SAtsushi Nemoto	bool
26001723b4a3SAtsushi Nemoto
26011723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
26021723b4a3SAtsushi Nemoto	bool
26031723b4a3SAtsushi Nemoto
26041723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
26051723b4a3SAtsushi Nemoto	bool
26061723b4a3SAtsushi Nemoto
26071723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
26081723b4a3SAtsushi Nemoto	bool
26091723b4a3SAtsushi Nemoto
26101723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
26111723b4a3SAtsushi Nemoto	bool
26121723b4a3SAtsushi Nemoto
26131723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
26141723b4a3SAtsushi Nemoto	bool
26151723b4a3SAtsushi Nemoto
26161723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
26171723b4a3SAtsushi Nemoto	bool
26181723b4a3SAtsushi Nemoto
26191723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
26201723b4a3SAtsushi Nemoto	bool
262167596573SPaul Burton	default y if !SYS_SUPPORTS_24HZ && \
262267596573SPaul Burton		     !SYS_SUPPORTS_48HZ && \
262367596573SPaul Burton		     !SYS_SUPPORTS_100HZ && \
262467596573SPaul Burton		     !SYS_SUPPORTS_128HZ && \
262567596573SPaul Burton		     !SYS_SUPPORTS_250HZ && \
262667596573SPaul Burton		     !SYS_SUPPORTS_256HZ && \
262767596573SPaul Burton		     !SYS_SUPPORTS_1000HZ && \
26281723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
26291723b4a3SAtsushi Nemoto
26301723b4a3SAtsushi Nemotoconfig HZ
26311723b4a3SAtsushi Nemoto	int
263267596573SPaul Burton	default 24 if HZ_24
26331723b4a3SAtsushi Nemoto	default 48 if HZ_48
26341723b4a3SAtsushi Nemoto	default 100 if HZ_100
26351723b4a3SAtsushi Nemoto	default 128 if HZ_128
26361723b4a3SAtsushi Nemoto	default 250 if HZ_250
26371723b4a3SAtsushi Nemoto	default 256 if HZ_256
26381723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
26391723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
26401723b4a3SAtsushi Nemoto
264196685b17SDeng-Cheng Zhuconfig SCHED_HRTICK
264296685b17SDeng-Cheng Zhu	def_bool HIGH_RES_TIMERS
264396685b17SDeng-Cheng Zhu
2644e80de850SRalf Baechlesource "kernel/Kconfig.preempt"
26451da177e4SLinus Torvalds
2646ea6e942bSAtsushi Nemotoconfig KEXEC
26477d60717eSKees Cook	bool "Kexec system call"
26482965faa5SDave Young	select KEXEC_CORE
2649ea6e942bSAtsushi Nemoto	help
2650ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2651ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
26523dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2653ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2654ea6e942bSAtsushi Nemoto
265501dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2656ea6e942bSAtsushi Nemoto
2657ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2658ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2659bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2660bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2661bf220695SGeert Uytterhoeven	  made.
2662ea6e942bSAtsushi Nemoto
26637aa1c8f4SRalf Baechleconfig CRASH_DUMP
26647aa1c8f4SRalf Baechle	  bool "Kernel crash dumps"
26657aa1c8f4SRalf Baechle	  help
26667aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
26677aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
26687aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
26697aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
26707aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
26717aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
26727aa1c8f4SRalf Baechle	  PHYSICAL_START.
26737aa1c8f4SRalf Baechle
26747aa1c8f4SRalf Baechleconfig PHYSICAL_START
26757aa1c8f4SRalf Baechle	  hex "Physical address where the kernel is loaded"
26767aa1c8f4SRalf Baechle	  default "0xffffffff84000000" if 64BIT
26777aa1c8f4SRalf Baechle	  default "0x84000000" if 32BIT
26787aa1c8f4SRalf Baechle	  depends on CRASH_DUMP
26797aa1c8f4SRalf Baechle	  help
26807aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
26817aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
26827aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
26837aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
26847aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
26857aa1c8f4SRalf Baechle
2686ea6e942bSAtsushi Nemotoconfig SECCOMP
2687ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2688293c5bd1SRalf Baechle	depends on PROC_FS
2689ea6e942bSAtsushi Nemoto	default y
2690ea6e942bSAtsushi Nemoto	help
2691ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2692ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2693ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2694ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2695ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2696ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2697ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2698ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2699ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2700ea6e942bSAtsushi Nemoto
2701ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2702ea6e942bSAtsushi Nemoto
2703597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
27040ce3417eSPaul Burton	bool "Support for O32 binaries using 64-bit FP"
2705597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
2706597ce172SPaul Burton	help
2707597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
2708597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
2709597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2710597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
2711597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
2712597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
2713597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
2714597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
2715597ce172SPaul Burton	  saying N here.
2716597ce172SPaul Burton
271706e2e882SPaul Burton	  Although binutils currently supports use of this flag the details
271806e2e882SPaul Burton	  concerning its effect upon the O32 ABI in userland are still being
271906e2e882SPaul Burton	  worked on. In order to avoid userland becoming dependant upon current
272006e2e882SPaul Burton	  behaviour before the details have been finalised, this option should
272106e2e882SPaul Burton	  be considered experimental and only enabled by those working upon
272206e2e882SPaul Burton	  said details.
272306e2e882SPaul Burton
272406e2e882SPaul Burton	  If unsure, say N.
2725597ce172SPaul Burton
2726f2ffa5abSDezhong Diaoconfig USE_OF
27270b3e06fdSJonas Gorski	bool
2728f2ffa5abSDezhong Diao	select OF
2729e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
2730abd2363fSGrant Likely	select IRQ_DOMAIN
2731f2ffa5abSDezhong Diao
27327fafb068SAndrew Brestickerconfig BUILTIN_DTB
27337fafb068SAndrew Bresticker	bool
27347fafb068SAndrew Bresticker
27351da8f179SJonas Gorskichoice
27365b24d52cSJonas Gorski	prompt "Kernel appended dtb support" if USE_OF
27371da8f179SJonas Gorski	default MIPS_NO_APPENDED_DTB
27381da8f179SJonas Gorski
27391da8f179SJonas Gorski	config MIPS_NO_APPENDED_DTB
27401da8f179SJonas Gorski		bool "None"
27411da8f179SJonas Gorski		help
27421da8f179SJonas Gorski		  Do not enable appended dtb support.
27431da8f179SJonas Gorski
274487db537dSAaro Koskinen	config MIPS_ELF_APPENDED_DTB
274587db537dSAaro Koskinen		bool "vmlinux"
274687db537dSAaro Koskinen		help
274787db537dSAaro Koskinen		  With this option, the boot code will look for a device tree binary
274887db537dSAaro Koskinen		  DTB) included in the vmlinux ELF section .appended_dtb. By default
274987db537dSAaro Koskinen		  it is empty and the DTB can be appended using binutils command
275087db537dSAaro Koskinen		  objcopy:
275187db537dSAaro Koskinen
275287db537dSAaro Koskinen		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
275387db537dSAaro Koskinen
275487db537dSAaro Koskinen		  This is meant as a backward compatiblity convenience for those
275587db537dSAaro Koskinen		  systems with a bootloader that can't be upgraded to accommodate
275687db537dSAaro Koskinen		  the documented boot protocol using a device tree.
275787db537dSAaro Koskinen
27581da8f179SJonas Gorski	config MIPS_RAW_APPENDED_DTB
27591da8f179SJonas Gorski		bool "vmlinux.bin"
27601da8f179SJonas Gorski		help
27611da8f179SJonas Gorski		  With this option, the boot code will look for a device tree binary
27621da8f179SJonas Gorski		  DTB) appended to raw vmlinux.bin (without decompressor).
27631da8f179SJonas Gorski		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
27641da8f179SJonas Gorski
27651da8f179SJonas Gorski		  This is meant as a backward compatibility convenience for those
27661da8f179SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
27671da8f179SJonas Gorski		  the documented boot protocol using a device tree.
27681da8f179SJonas Gorski
27691da8f179SJonas Gorski		  Beware that there is very little in terms of protection against
27701da8f179SJonas Gorski		  this option being confused by leftover garbage in memory that might
27711da8f179SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
27721da8f179SJonas Gorski		  to vmlinux.bin.  Do not leave this option active in a production kernel
27731da8f179SJonas Gorski		  if you don't intend to always append a DTB.
2774c0b4e101SJonas Gorski
2775c0b4e101SJonas Gorski	config MIPS_ZBOOT_APPENDED_DTB
2776c0b4e101SJonas Gorski		bool "vmlinuz.bin"
2777c0b4e101SJonas Gorski		depends on SYS_SUPPORTS_ZBOOT
2778c0b4e101SJonas Gorski		help
2779c0b4e101SJonas Gorski		  With this option, the boot code will look for a device tree binary
2780c0b4e101SJonas Gorski		  DTB) appended to raw vmlinuz.bin (with decompressor).
2781c0b4e101SJonas Gorski		  (e.g. cat vmlinuz.bin <filename>.dtb > vmlinuz_w_dtb).
2782c0b4e101SJonas Gorski
2783c0b4e101SJonas Gorski		  This is meant as a backward compatibility convenience for those
2784c0b4e101SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
2785c0b4e101SJonas Gorski		  the documented boot protocol using a device tree.
2786c0b4e101SJonas Gorski
2787c0b4e101SJonas Gorski		  Beware that there is very little in terms of protection against
2788c0b4e101SJonas Gorski		  this option being confused by leftover garbage in memory that might
2789c0b4e101SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
2790c0b4e101SJonas Gorski		  to vmlinuz.bin.  Do not leave this option active in a production kernel
2791c0b4e101SJonas Gorski		  if you don't intend to always append a DTB.
27921da8f179SJonas Gorskiendchoice
27931da8f179SJonas Gorski
27942024972eSJonas Gorskichoice
27952024972eSJonas Gorski	prompt "Kernel command line type" if !CMDLINE_OVERRIDE
27962bcef9b4SJonas Gorski	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
27972bcef9b4SJonas Gorski					 !MIPS_MALTA && !MIPS_SEAD3 && \
27982bcef9b4SJonas Gorski					 !CAVIUM_OCTEON_SOC
27992024972eSJonas Gorski	default MIPS_CMDLINE_FROM_BOOTLOADER
28002024972eSJonas Gorski
28012024972eSJonas Gorski	config MIPS_CMDLINE_FROM_DTB
28022024972eSJonas Gorski		depends on USE_OF
28032024972eSJonas Gorski		bool "Dtb kernel arguments if available"
28042024972eSJonas Gorski
28052024972eSJonas Gorski	config MIPS_CMDLINE_DTB_EXTEND
28062024972eSJonas Gorski		depends on USE_OF
28072024972eSJonas Gorski		bool "Extend dtb kernel arguments with bootloader arguments"
28082024972eSJonas Gorski
28092024972eSJonas Gorski	config MIPS_CMDLINE_FROM_BOOTLOADER
28102024972eSJonas Gorski		bool "Bootloader kernel arguments if available"
28112024972eSJonas Gorskiendchoice
28122024972eSJonas Gorski
28135e83d430SRalf Baechleendmenu
28145e83d430SRalf Baechle
28151df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
28161df0f0ffSAtsushi Nemoto	bool
28171df0f0ffSAtsushi Nemoto	default y
28181df0f0ffSAtsushi Nemoto
28191df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
28201df0f0ffSAtsushi Nemoto	bool
28211df0f0ffSAtsushi Nemoto	default y
28221df0f0ffSAtsushi Nemoto
2823e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT
2824e1e16115SAaro Koskinen	bool
2825e1e16115SAaro Koskinen	default y
2826e1e16115SAaro Koskinen
2827a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS
2828a728ab52SKirill A. Shutemov	int
2829a728ab52SKirill A. Shutemov	default 3 if 64BIT && !PAGE_SIZE_64KB
2830a728ab52SKirill A. Shutemov	default 2
2831a728ab52SKirill A. Shutemov
2832b6c3539bSRalf Baechlesource "init/Kconfig"
2833b6c3539bSRalf Baechle
2834dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
2835dc52ddc0SMatt Helsley
28361da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
28371da177e4SLinus Torvalds
28385e83d430SRalf Baechleconfig HW_HAS_EISA
28395e83d430SRalf Baechle	bool
28401da177e4SLinus Torvaldsconfig HW_HAS_PCI
28411da177e4SLinus Torvalds	bool
28421da177e4SLinus Torvalds
28431da177e4SLinus Torvaldsconfig PCI
28441da177e4SLinus Torvalds	bool "Support for PCI controller"
28451da177e4SLinus Torvalds	depends on HW_HAS_PCI
2846abb4ae46SRalf Baechle	select PCI_DOMAINS
28470f3b3956SMichael S. Tsirkin	select NO_GENERIC_PCI_IOPORT_MAP
28481da177e4SLinus Torvalds	help
28491da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
28501da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
28511da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
28521da177e4SLinus Torvalds	  say Y, otherwise N.
28531da177e4SLinus Torvalds
28540e476d91SHuacai Chenconfig HT_PCI
28550e476d91SHuacai Chen	bool "Support for HT-linked PCI"
28560e476d91SHuacai Chen	default y
28570e476d91SHuacai Chen	depends on CPU_LOONGSON3
28580e476d91SHuacai Chen	select PCI
28590e476d91SHuacai Chen	select PCI_DOMAINS
28600e476d91SHuacai Chen	help
28610e476d91SHuacai Chen	  Loongson family machines use Hyper-Transport bus for inter-core
28620e476d91SHuacai Chen	  connection and device connection. The PCI bus is a subordinate
28630e476d91SHuacai Chen	  linked at HT. Choose Y for Loongson-3 based machines.
28640e476d91SHuacai Chen
28651da177e4SLinus Torvaldsconfig PCI_DOMAINS
28661da177e4SLinus Torvalds	bool
28671da177e4SLinus Torvalds
28681da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
28691da177e4SLinus Torvalds
28701da177e4SLinus Torvalds#
28711da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
28721da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
28731da177e4SLinus Torvalds# users to choose the right thing ...
28741da177e4SLinus Torvalds#
28751da177e4SLinus Torvaldsconfig ISA
28761da177e4SLinus Torvalds	bool
28771da177e4SLinus Torvalds
28781da177e4SLinus Torvaldsconfig EISA
28791da177e4SLinus Torvalds	bool "EISA support"
28805e83d430SRalf Baechle	depends on HW_HAS_EISA
28811da177e4SLinus Torvalds	select ISA
2882aa414dffSRalf Baechle	select GENERIC_ISA_DMA
28831da177e4SLinus Torvalds	---help---
28841da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
28851da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
28861da177e4SLinus Torvalds
28871da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
28881da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
28891da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
28901da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
28911da177e4SLinus Torvalds
28921da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
28931da177e4SLinus Torvalds
28941da177e4SLinus Torvalds	  Otherwise, say N.
28951da177e4SLinus Torvalds
28961da177e4SLinus Torvaldssource "drivers/eisa/Kconfig"
28971da177e4SLinus Torvalds
28981da177e4SLinus Torvaldsconfig TC
28991da177e4SLinus Torvalds	bool "TURBOchannel support"
29001da177e4SLinus Torvalds	depends on MACH_DECSTATION
29011da177e4SLinus Torvalds	help
290250a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
290350a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
290450a23e6eSJustin P. Mattock	  at:
290550a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
290650a23e6eSJustin P. Mattock	  and:
290750a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
290850a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
290950a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
29101da177e4SLinus Torvalds
29111da177e4SLinus Torvaldsconfig MMU
29121da177e4SLinus Torvalds	bool
29131da177e4SLinus Torvalds	default y
29141da177e4SLinus Torvalds
2915d865bea4SRalf Baechleconfig I8253
2916d865bea4SRalf Baechle	bool
2917798778b8SRussell King	select CLKSRC_I8253
29182d02612fSThomas Gleixner	select CLKEVT_I8253
29199726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
2920d865bea4SRalf Baechle
2921e05eb3f8SRalf Baechleconfig ZONE_DMA
2922e05eb3f8SRalf Baechle	bool
2923e05eb3f8SRalf Baechle
2924cce335aeSRalf Baechleconfig ZONE_DMA32
2925cce335aeSRalf Baechle	bool
2926cce335aeSRalf Baechle
29271da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
29281da177e4SLinus Torvalds
2929388b78adSAlexandre Bounineconfig RAPIDIO
293056abde72SAlexandre Bounine	tristate "RapidIO support"
2931388b78adSAlexandre Bounine	depends on PCI
2932388b78adSAlexandre Bounine	default n
2933388b78adSAlexandre Bounine	help
2934388b78adSAlexandre Bounine	  If you say Y here, the kernel will include drivers and
2935388b78adSAlexandre Bounine	  infrastructure code to support RapidIO interconnect devices.
2936388b78adSAlexandre Bounine
2937388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig"
2938388b78adSAlexandre Bounine
29391da177e4SLinus Torvaldsendmenu
29401da177e4SLinus Torvalds
29411da177e4SLinus Torvaldsmenu "Executable file formats"
29421da177e4SLinus Torvalds
29431da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
29441da177e4SLinus Torvalds
29451da177e4SLinus Torvaldsconfig TRAD_SIGNALS
29461da177e4SLinus Torvalds	bool
29471da177e4SLinus Torvalds
29481da177e4SLinus Torvaldsconfig MIPS32_COMPAT
294978aaf956SRalf Baechle	bool
29501da177e4SLinus Torvalds
29511da177e4SLinus Torvaldsconfig COMPAT
29521da177e4SLinus Torvalds	bool
29531da177e4SLinus Torvalds
295405e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
295505e43966SAtsushi Nemoto	bool
295605e43966SAtsushi Nemoto
29571da177e4SLinus Torvaldsconfig MIPS32_O32
29581da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
295978aaf956SRalf Baechle	depends on 64BIT
296078aaf956SRalf Baechle	select ARCH_WANT_OLD_COMPAT_IPC
296178aaf956SRalf Baechle	select COMPAT
296278aaf956SRalf Baechle	select MIPS32_COMPAT
296378aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
29641da177e4SLinus Torvalds	help
29651da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
29661da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
29671da177e4SLinus Torvalds	  existing binaries are in this format.
29681da177e4SLinus Torvalds
29691da177e4SLinus Torvalds	  If unsure, say Y.
29701da177e4SLinus Torvalds
29711da177e4SLinus Torvaldsconfig MIPS32_N32
29721da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
2973c22eacfeSRalf Baechle	depends on 64BIT
297478aaf956SRalf Baechle	select COMPAT
297578aaf956SRalf Baechle	select MIPS32_COMPAT
297678aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
29771da177e4SLinus Torvalds	help
29781da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
29791da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
29801da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
29811da177e4SLinus Torvalds	  cases.
29821da177e4SLinus Torvalds
29831da177e4SLinus Torvalds	  If unsure, say N.
29841da177e4SLinus Torvalds
29851da177e4SLinus Torvaldsconfig BINFMT_ELF32
29861da177e4SLinus Torvalds	bool
29871da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
29881da177e4SLinus Torvalds
29892116245eSRalf Baechleendmenu
29901da177e4SLinus Torvalds
29912116245eSRalf Baechlemenu "Power management options"
2992952fa954SRodolfo Giometti
2993363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
2994363c55caSWu Zhangjin	def_bool y
29953f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2996363c55caSWu Zhangjin
2997f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
2998f4cb5700SJohannes Berg	def_bool y
29993f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3000f4cb5700SJohannes Berg
30012116245eSRalf Baechlesource "kernel/power/Kconfig"
3002952fa954SRodolfo Giometti
30031da177e4SLinus Torvaldsendmenu
30041da177e4SLinus Torvalds
30057a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
30067a998935SViresh Kumar	bool
30077a998935SViresh Kumar
30087a998935SViresh Kumarmenu "CPU Power Management"
3009c095ebafSPaul Burton
3010c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
30117a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
30127a998935SViresh Kumarendif
30139726b43aSWu Zhangjin
3014c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig"
3015c095ebafSPaul Burton
3016c095ebafSPaul Burtonendmenu
3017c095ebafSPaul Burton
3018d5950b43SSam Ravnborgsource "net/Kconfig"
3019d5950b43SSam Ravnborg
30201da177e4SLinus Torvaldssource "drivers/Kconfig"
30211da177e4SLinus Torvalds
302298cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
302398cdee0eSRalf Baechle
30241da177e4SLinus Torvaldssource "fs/Kconfig"
30251da177e4SLinus Torvalds
30261da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug"
30271da177e4SLinus Torvalds
30281da177e4SLinus Torvaldssource "security/Kconfig"
30291da177e4SLinus Torvalds
30301da177e4SLinus Torvaldssource "crypto/Kconfig"
30311da177e4SLinus Torvalds
30321da177e4SLinus Torvaldssource "lib/Kconfig"
30332235a54dSSanjay Lal
30342235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
3035