11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 4a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 5393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 6c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 7f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 8ec7748b5SSam Ravnborg select HAVE_IDE 942d4b839SMathieu Desnoyers select HAVE_OPROFILE 107f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 117f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1288547001SJason Wessel select HAVE_ARCH_KGDB 13490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 14c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 153f5fdb4bSMarkos Chandras select HAVE_BPF_JIT if !CPU_MICROMIPS 167563bbf8SMark Brown select ARCH_HAVE_CUSTOM_GPIO_H 17d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 18538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 19538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 2064575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2129c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 22c1bf207dSDavid Daney select HAVE_KPROBES 23c1bf207dSDavid Daney select HAVE_KRETPROBES 24fb59e394SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 25b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 261d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 272b68f6caSKees Cook select ARCH_HAS_ELF_RANDOMIZE 28383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 2930ad29bbSHuacai Chen select RTC_LIB if !MACH_LOONGSON64 302b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 317463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3248e1fd5aSDavid Daney select HAVE_DMA_ATTRS 33f4649382SZubair Lutfullah Kakakhel select HAVE_DMA_CONTIGUOUS 3448e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 353bd27e32SDavid Daney select GENERIC_IRQ_PROBE 36f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3778857614SMarkos Chandras select GENERIC_PCI_IOMAP 3894bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 39c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 400f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 419d15ffc8STejun Heo select HAVE_MEMBLOCK 429d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 439d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 44360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 454b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 46cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 47929de4ccSDeng-Cheng Zhu select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 48cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 49786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 504febd95aSStephen Rothwell select VIRT_TO_BUS 512f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 522f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 5350150d2bSAl Viro select CLONE_BACKWARDS 54d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5519952a92SKees Cook select HAVE_CC_STACKPROTECTOR 56b1d4c6caSJames Hogan select CPU_PM if CPU_IDLE 57cc7964afSPaul Burton select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 5890cee759SPaul Burton select ARCH_BINFMT_ELF_STATE 59d79d853dSMarkos Chandras select SYSCTL_EXCEPTION_TRACE 60bb877e96SDeng-Cheng Zhu select HAVE_VIRT_CPU_ACCOUNTING_GEN 61ec9ddad3SDeng-Cheng Zhu select HAVE_IRQ_TIME_ACCOUNTING 621da177e4SLinus Torvalds 631da177e4SLinus Torvaldsmenu "Machine selection" 641da177e4SLinus Torvalds 655e83d430SRalf Baechlechoice 665e83d430SRalf Baechle prompt "System type" 675e83d430SRalf Baechle default SGI_IP22 681da177e4SLinus Torvalds 6942a4f17dSManuel Laussconfig MIPS_ALCHEMY 70c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 7134adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 72f772cdb2SRalf Baechle select CEVT_R4K 73d7ea335cSSteven J. Hill select CSRC_R4K 7467e38cf2SRalf Baechle select IRQ_MIPS_CPU 7588e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 7642a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 7742a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 7842a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 79efb12436SAlexandre Courbot select ARCH_REQUIRE_GPIOLIB 801b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 8147440229SManuel Lauss select COMMON_CLK 821da177e4SLinus Torvalds 837ca5dc14SFlorian Fainelliconfig AR7 847ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 857ca5dc14SFlorian Fainelli select BOOT_ELF32 867ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 877ca5dc14SFlorian Fainelli select CEVT_R4K 887ca5dc14SFlorian Fainelli select CSRC_R4K 8967e38cf2SRalf Baechle select IRQ_MIPS_CPU 907ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 917ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 927ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 937ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 947ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 957ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 96377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 971b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 985f3c9098SFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 997ca5dc14SFlorian Fainelli select VLYNQ 1008551fb64SYoichi Yuasa select HAVE_CLK 1017ca5dc14SFlorian Fainelli help 1027ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1037ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1047ca5dc14SFlorian Fainelli 10543cc739fSSergey Ryazanovconfig ATH25 10643cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 10743cc739fSSergey Ryazanov select CEVT_R4K 10843cc739fSSergey Ryazanov select CSRC_R4K 10943cc739fSSergey Ryazanov select DMA_NONCOHERENT 11067e38cf2SRalf Baechle select IRQ_MIPS_CPU 1111753e74eSSergey Ryazanov select IRQ_DOMAIN 11243cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 11343cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 11443cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1158aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 11643cc739fSSergey Ryazanov help 11743cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 11843cc739fSSergey Ryazanov 119d4a67d9dSGabor Juhosconfig ATH79 120d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 1216eae43c5SGabor Juhos select ARCH_REQUIRE_GPIOLIB 122d4a67d9dSGabor Juhos select BOOT_RAW 123d4a67d9dSGabor Juhos select CEVT_R4K 124d4a67d9dSGabor Juhos select CSRC_R4K 125d4a67d9dSGabor Juhos select DMA_NONCOHERENT 12694638067SGabor Juhos select HAVE_CLK 127411520afSAlban Bedel select COMMON_CLK 1282c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 12967e38cf2SRalf Baechle select IRQ_MIPS_CPU 1300aabf1a4SGabor Juhos select MIPS_MACHINE 131d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 132d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 133d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 134d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 135377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 136da628e8bSAlban Bedel select SYS_SUPPORTS_ZBOOT 13703c8c407SAlban Bedel select USE_OF 138d4a67d9dSGabor Juhos help 139d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 140d4a67d9dSGabor Juhos 1415f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 1425f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 143d666cd02SKevin Cernekee select BOOT_RAW 144d666cd02SKevin Cernekee select NO_EXCEPT_FILL 145d666cd02SKevin Cernekee select USE_OF 146d666cd02SKevin Cernekee select CEVT_R4K 147d666cd02SKevin Cernekee select CSRC_R4K 148d666cd02SKevin Cernekee select SYNC_R4K 149d666cd02SKevin Cernekee select COMMON_CLK 15060b858f2SKevin Cernekee select BCM7038_L1_IRQ 15160b858f2SKevin Cernekee select BCM7120_L2_IRQ 15260b858f2SKevin Cernekee select BRCMSTB_L2_IRQ 15367e38cf2SRalf Baechle select IRQ_MIPS_CPU 15460b858f2SKevin Cernekee select RAW_IRQ_ACCESSORS 15560b858f2SKevin Cernekee select DMA_NONCOHERENT 156d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 15760b858f2SKevin Cernekee select SYS_SUPPORTS_LITTLE_ENDIAN 158d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 159d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 16060b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS32_3300 16160b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4350 16260b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4380 163d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 164d666cd02SKevin Cernekee select SWAP_IO_SPACE 16560b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 16660b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 16760b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 16860b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 169d666cd02SKevin Cernekee help 1705f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 1715f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 1725f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 1735f2d4459SKevin Cernekee must be set appropriately for your board. 174d666cd02SKevin Cernekee 1751c0c13ebSAurelien Jarnoconfig BCM47XX 176c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 1772da4c74dSHauke Mehrtens select ARCH_WANT_OPTIONAL_GPIOLIB 178fe08f8c2SHauke Mehrtens select BOOT_RAW 17942f77542SRalf Baechle select CEVT_R4K 180940f6b48SRalf Baechle select CSRC_R4K 1811c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1821c0c13ebSAurelien Jarno select HW_HAS_PCI 18367e38cf2SRalf Baechle select IRQ_MIPS_CPU 184314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 185dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1861c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1871c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 188377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 18925e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 190e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 191c949c0bcSRafał Miłecki select GPIOLIB 192c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 1931c0c13ebSAurelien Jarno help 1941c0c13ebSAurelien Jarno Support for BCM47XX based boards 1951c0c13ebSAurelien Jarno 196e7300d04SMaxime Bizonconfig BCM63XX 197e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 198ae8de61cSFlorian Fainelli select BOOT_RAW 199e7300d04SMaxime Bizon select CEVT_R4K 200e7300d04SMaxime Bizon select CSRC_R4K 201fc264022SJonas Gorski select SYNC_R4K 202e7300d04SMaxime Bizon select DMA_NONCOHERENT 20367e38cf2SRalf Baechle select IRQ_MIPS_CPU 204e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 205e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 206e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 207e7300d04SMaxime Bizon select SWAP_IO_SPACE 208e7300d04SMaxime Bizon select ARCH_REQUIRE_GPIOLIB 2093e82eeebSYoichi Yuasa select HAVE_CLK 210af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 211e7300d04SMaxime Bizon help 212e7300d04SMaxime Bizon Support for BCM63XX based boards 213e7300d04SMaxime Bizon 2141da177e4SLinus Torvaldsconfig MIPS_COBALT 2153fa986faSMartin Michlmayr bool "Cobalt Server" 21642f77542SRalf Baechle select CEVT_R4K 217940f6b48SRalf Baechle select CSRC_R4K 2181097c6acSYoichi Yuasa select CEVT_GT641XX 2191da177e4SLinus Torvalds select DMA_NONCOHERENT 2201da177e4SLinus Torvalds select HW_HAS_PCI 221d865bea4SRalf Baechle select I8253 2221da177e4SLinus Torvalds select I8259 22367e38cf2SRalf Baechle select IRQ_MIPS_CPU 224d5ab1a69SYoichi Yuasa select IRQ_GT641XX 225252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 226e25bfc92SYoichi Yuasa select PCI 2277cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 2280a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 229ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2300e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 2315e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 232e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 2331da177e4SLinus Torvalds 2341da177e4SLinus Torvaldsconfig MACH_DECSTATION 2353fa986faSMartin Michlmayr bool "DECstations" 2361da177e4SLinus Torvalds select BOOT_ELF32 2376457d9fcSYoichi Yuasa select CEVT_DS1287 23881d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 2394247417dSYoichi Yuasa select CSRC_IOASIC 24081d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 24120d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 24220d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 24320d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 2441da177e4SLinus Torvalds select DMA_NONCOHERENT 245ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 24667e38cf2SRalf Baechle select IRQ_MIPS_CPU 2477cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 2487cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 249ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2507d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2515e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 2521723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 2531723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 2541723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 255930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 2565e83d430SRalf Baechle help 2571da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 2581da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 2591da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 2601da177e4SLinus Torvalds 2611da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 2621da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 2631da177e4SLinus Torvalds 2641da177e4SLinus Torvalds DECstation 5000/50 2651da177e4SLinus Torvalds DECstation 5000/150 2661da177e4SLinus Torvalds DECstation 5000/260 2671da177e4SLinus Torvalds DECsystem 5900/260 2681da177e4SLinus Torvalds 2691da177e4SLinus Torvalds otherwise choose R3000. 2701da177e4SLinus Torvalds 2715e83d430SRalf Baechleconfig MACH_JAZZ 2723fa986faSMartin Michlmayr bool "Jazz family of machines" 2730e2794b0SRalf Baechle select FW_ARC 2740e2794b0SRalf Baechle select FW_ARC32 2755e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 27642f77542SRalf Baechle select CEVT_R4K 277940f6b48SRalf Baechle select CSRC_R4K 278e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2795e83d430SRalf Baechle select GENERIC_ISA_DMA 2808a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 28167e38cf2SRalf Baechle select IRQ_MIPS_CPU 282d865bea4SRalf Baechle select I8253 2835e83d430SRalf Baechle select I8259 2845e83d430SRalf Baechle select ISA 2857cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2865e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2877d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2881723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2891da177e4SLinus Torvalds help 2905e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2915e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 292692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 2935e83d430SRalf Baechle Olivetti M700-10 workstations. 2945e83d430SRalf Baechle 295de361e8bSPaul Burtonconfig MACH_INGENIC 296de361e8bSPaul Burton bool "Ingenic SoC based machines" 2975ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 2985ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 299f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 3005ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 30167e38cf2SRalf Baechle select IRQ_MIPS_CPU 3025ebabe59SLars-Peter Clausen select ARCH_REQUIRE_GPIOLIB 303ff1930c6SPaul Burton select COMMON_CLK 30483bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 305ffb1843dSPaul Burton select BUILTIN_DTB 306ffb1843dSPaul Burton select USE_OF 3076ec127fbSPaul Burton select LIBFDT 3085ebabe59SLars-Peter Clausen 309171bb2f1SJohn Crispinconfig LANTIQ 310171bb2f1SJohn Crispin bool "Lantiq based platforms" 311171bb2f1SJohn Crispin select DMA_NONCOHERENT 31267e38cf2SRalf Baechle select IRQ_MIPS_CPU 313171bb2f1SJohn Crispin select CEVT_R4K 314171bb2f1SJohn Crispin select CSRC_R4K 315171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 316171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 317171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 318171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 319377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 320171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 321171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 322171bb2f1SJohn Crispin select ARCH_REQUIRE_GPIOLIB 323171bb2f1SJohn Crispin select SWAP_IO_SPACE 324171bb2f1SJohn Crispin select BOOT_RAW 325287e3f3fSJohn Crispin select HAVE_MACH_CLKDEV 326287e3f3fSJohn Crispin select CLKDEV_LOOKUP 327a0392222SJohn Crispin select USE_OF 3283f8c50c9SJohn Crispin select PINCTRL 3293f8c50c9SJohn Crispin select PINCTRL_LANTIQ 330c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 331c530781cSJohn Crispin select RESET_CONTROLLER 332171bb2f1SJohn Crispin 3331f21d2bdSBrian Murphyconfig LASAT 3341f21d2bdSBrian Murphy bool "LASAT Networks platforms" 33542f77542SRalf Baechle select CEVT_R4K 33616f0bbbcSRalf Baechle select CRC32 337940f6b48SRalf Baechle select CSRC_R4K 3381f21d2bdSBrian Murphy select DMA_NONCOHERENT 3391f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 3401f21d2bdSBrian Murphy select HW_HAS_PCI 34167e38cf2SRalf Baechle select IRQ_MIPS_CPU 3421f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 3431f21d2bdSBrian Murphy select MIPS_NILE4 3441f21d2bdSBrian Murphy select R5000_CPU_SCACHE 3451f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 3461f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 3471f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 3481f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 3491f21d2bdSBrian Murphy 35030ad29bbSHuacai Chenconfig MACH_LOONGSON32 35130ad29bbSHuacai Chen bool "Loongson-1 family of machines" 352c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 353ade299d8SYoichi Yuasa help 35430ad29bbSHuacai Chen This enables support for the Loongson-1 family of machines. 35585749d24SWu Zhangjin 35630ad29bbSHuacai Chen Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by 35730ad29bbSHuacai Chen the Institute of Computing Technology (ICT), Chinese Academy of 35830ad29bbSHuacai Chen Sciences (CAS). 359ade299d8SYoichi Yuasa 36030ad29bbSHuacai Chenconfig MACH_LOONGSON64 36130ad29bbSHuacai Chen bool "Loongson-2/3 family of machines" 362ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 363ca585cf9SKelvin Cheung help 36430ad29bbSHuacai Chen This enables the support of Loongson-2/3 family of machines. 365ca585cf9SKelvin Cheung 36630ad29bbSHuacai Chen Loongson-2 is a family of single-core CPUs and Loongson-3 is a 36730ad29bbSHuacai Chen family of multi-core CPUs. They are both 64-bit general-purpose 36830ad29bbSHuacai Chen MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute 36930ad29bbSHuacai Chen of Computing Technology (ICT), Chinese Academy of Sciences (CAS) 37030ad29bbSHuacai Chen in the People's Republic of China. The chief architect is Professor 37130ad29bbSHuacai Chen Weiwu Hu. 372ca585cf9SKelvin Cheung 3736a438309SAndrew Brestickerconfig MACH_PISTACHIO 3746a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 3756a438309SAndrew Bresticker select ARCH_REQUIRE_GPIOLIB 3766a438309SAndrew Bresticker select BOOT_ELF32 3776a438309SAndrew Bresticker select BOOT_RAW 3786a438309SAndrew Bresticker select CEVT_R4K 3796a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 3806a438309SAndrew Bresticker select COMMON_CLK 3816a438309SAndrew Bresticker select CSRC_R4K 3826a438309SAndrew Bresticker select DMA_MAYBE_COHERENT 38367e38cf2SRalf Baechle select IRQ_MIPS_CPU 3846a438309SAndrew Bresticker select LIBFDT 3856a438309SAndrew Bresticker select MFD_SYSCON 3866a438309SAndrew Bresticker select MIPS_CPU_SCACHE 3876a438309SAndrew Bresticker select MIPS_GIC 3886a438309SAndrew Bresticker select PINCTRL 3896a438309SAndrew Bresticker select REGULATOR 3906a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 3916a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 3926a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 3936a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 3946a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 3956a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 396018f62eeSEzequiel Garcia select SYS_HAS_EARLY_PRINTK 397018f62eeSEzequiel Garcia select USE_GENERIC_EARLY_PRINTK_8250 3986a438309SAndrew Bresticker select USE_OF 3996a438309SAndrew Bresticker help 4006a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 4016a438309SAndrew Bresticker 4021da177e4SLinus Torvaldsconfig MIPS_MALTA 4033fa986faSMartin Michlmayr bool "MIPS Malta board" 40461ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 4051da177e4SLinus Torvalds select BOOT_ELF32 406fa71c960SRalf Baechle select BOOT_RAW 40742f77542SRalf Baechle select CEVT_R4K 408940f6b48SRalf Baechle select CSRC_R4K 409fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 410885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 4111da177e4SLinus Torvalds select GENERIC_ISA_DMA 4128a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 41367e38cf2SRalf Baechle select IRQ_MIPS_CPU 4148a19b8f1SAndrew Bresticker select MIPS_GIC 4151da177e4SLinus Torvalds select HW_HAS_PCI 416d865bea4SRalf Baechle select I8253 4171da177e4SLinus Torvalds select I8259 4185e83d430SRalf Baechle select MIPS_BONITO64 4199318c51aSChris Dearman select MIPS_CPU_SCACHE 420a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 421252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 4225e83d430SRalf Baechle select MIPS_MSC 4231da177e4SLinus Torvalds select SWAP_IO_SPACE 4247cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 4257cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 426bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 427c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 428575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 4297cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 4305d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 431575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 4327cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 4337cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 434ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 435ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4365e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 437c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 4385e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 439424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 4400365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 441e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 442377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 443f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 4449693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 4451b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 446abcc82b1SJames Hogan select ZONE_DMA32 if 64BIT 4471da177e4SLinus Torvalds help 448f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 4491da177e4SLinus Torvalds board. 4501da177e4SLinus Torvalds 451ec47b274SSteven J. Hillconfig MIPS_SEAD3 452ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 453ec47b274SSteven J. Hill select BOOT_ELF32 454ec47b274SSteven J. Hill select BOOT_RAW 455f262b5f2SAndrew Bresticker select BUILTIN_DTB 456ec47b274SSteven J. Hill select CEVT_R4K 457ec47b274SSteven J. Hill select CSRC_R4K 458fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 459ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 460ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 461ec47b274SSteven J. Hill select DMA_NONCOHERENT 46267e38cf2SRalf Baechle select IRQ_MIPS_CPU 4638a19b8f1SAndrew Bresticker select MIPS_GIC 46444327236SQais Yousef select LIBFDT 465ec47b274SSteven J. Hill select MIPS_MSC 466ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 467ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 468ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 469ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 470ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 471ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 472ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 473ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 474ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 475a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 476377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 477ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 478ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 4799b731009SSteven J. Hill select USE_OF 480ec47b274SSteven J. Hill help 481ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 482ec47b274SSteven J. Hill board. 483ec47b274SSteven J. Hill 484a83860c2SRalf Baechleconfig NEC_MARKEINS 485a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 486a83860c2SRalf Baechle select SOC_EMMA2RH 487a83860c2SRalf Baechle select HW_HAS_PCI 488a83860c2SRalf Baechle help 489a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 490ade299d8SYoichi Yuasa 4915e83d430SRalf Baechleconfig MACH_VR41XX 49274142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 49342f77542SRalf Baechle select CEVT_R4K 494940f6b48SRalf Baechle select CSRC_R4K 4957cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 496377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 49727fdd325SYoichi Yuasa select ARCH_REQUIRE_GPIOLIB 4985e83d430SRalf Baechle 499edb6310aSDaniel Lairdconfig NXP_STB220 500edb6310aSDaniel Laird bool "NXP STB220 board" 501edb6310aSDaniel Laird select SOC_PNX833X 502edb6310aSDaniel Laird help 503edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 504edb6310aSDaniel Laird 505edb6310aSDaniel Lairdconfig NXP_STB225 506edb6310aSDaniel Laird bool "NXP 225 board" 507edb6310aSDaniel Laird select SOC_PNX833X 508edb6310aSDaniel Laird select SOC_PNX8335 509edb6310aSDaniel Laird help 510edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 511edb6310aSDaniel Laird 5129267a30dSMarc St-Jeanconfig PMC_MSP 5139267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 51439d30c13SAnoop P A select CEVT_R4K 51539d30c13SAnoop P A select CSRC_R4K 5169267a30dSMarc St-Jean select DMA_NONCOHERENT 5179267a30dSMarc St-Jean select SWAP_IO_SPACE 5189267a30dSMarc St-Jean select NO_EXCEPT_FILL 5199267a30dSMarc St-Jean select BOOT_RAW 5209267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 5219267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 5229267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 5239267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 524377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 52567e38cf2SRalf Baechle select IRQ_MIPS_CPU 5269267a30dSMarc St-Jean select SERIAL_8250 5279267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 5289296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 5299296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 5309267a30dSMarc St-Jean help 5319267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 5329267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 5339267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 5349267a30dSMarc St-Jean a variety of MIPS cores. 5359267a30dSMarc St-Jean 536ae2b5bb6SJohn Crispinconfig RALINK 537ae2b5bb6SJohn Crispin bool "Ralink based machines" 538ae2b5bb6SJohn Crispin select CEVT_R4K 539ae2b5bb6SJohn Crispin select CSRC_R4K 540ae2b5bb6SJohn Crispin select BOOT_RAW 541ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 54267e38cf2SRalf Baechle select IRQ_MIPS_CPU 543ae2b5bb6SJohn Crispin select USE_OF 544ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 545ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 546ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 547ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 548377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 549ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 550ae2b5bb6SJohn Crispin select HAVE_MACH_CLKDEV 551ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 5522a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 5532a153f1cSJohn Crispin select RESET_CONTROLLER 554ae2b5bb6SJohn Crispin 5551da177e4SLinus Torvaldsconfig SGI_IP22 5563fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 5570e2794b0SRalf Baechle select FW_ARC 5580e2794b0SRalf Baechle select FW_ARC32 5591da177e4SLinus Torvalds select BOOT_ELF32 56042f77542SRalf Baechle select CEVT_R4K 561940f6b48SRalf Baechle select CSRC_R4K 562e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 5631da177e4SLinus Torvalds select DMA_NONCOHERENT 5645e83d430SRalf Baechle select HW_HAS_EISA 565d865bea4SRalf Baechle select I8253 56668de4803SThomas Bogendoerfer select I8259 5671da177e4SLinus Torvalds select IP22_CPU_SCACHE 56867e38cf2SRalf Baechle select IRQ_MIPS_CPU 569aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 570e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 571e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 57236e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 573e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 574e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 575e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 5761da177e4SLinus Torvalds select SWAP_IO_SPACE 5777cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 5787cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 5792b5e63f6SMartin Michlmayr # 5802b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 5812b5e63f6SMartin Michlmayr # memory during early boot on some machines. 5822b5e63f6SMartin Michlmayr # 5832b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 5842b5e63f6SMartin Michlmayr # for a more details discussion 5852b5e63f6SMartin Michlmayr # 5862b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 587ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 588ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5895e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 590930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 5911da177e4SLinus Torvalds help 5921da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 5931da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 5941da177e4SLinus Torvalds that runs on these, say Y here. 5951da177e4SLinus Torvalds 5961da177e4SLinus Torvaldsconfig SGI_IP27 5973fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 5980e2794b0SRalf Baechle select FW_ARC 5990e2794b0SRalf Baechle select FW_ARC64 6005e83d430SRalf Baechle select BOOT_ELF64 601e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 602634286f1SRalf Baechle select DMA_COHERENT 60336a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 6041da177e4SLinus Torvalds select HW_HAS_PCI 605130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 6067cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 607ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6085e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 609d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 6101a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 611930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6121da177e4SLinus Torvalds help 6131da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 6141da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 6151da177e4SLinus Torvalds here. 6161da177e4SLinus Torvalds 617e2defae5SThomas Bogendoerferconfig SGI_IP28 6187d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 6190e2794b0SRalf Baechle select FW_ARC 6200e2794b0SRalf Baechle select FW_ARC64 621e2defae5SThomas Bogendoerfer select BOOT_ELF64 622e2defae5SThomas Bogendoerfer select CEVT_R4K 623e2defae5SThomas Bogendoerfer select CSRC_R4K 624e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 625e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 626e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 62767e38cf2SRalf Baechle select IRQ_MIPS_CPU 628e2defae5SThomas Bogendoerfer select HW_HAS_EISA 629e2defae5SThomas Bogendoerfer select I8253 630e2defae5SThomas Bogendoerfer select I8259 631e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 632e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 6335b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 634e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 635e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 636e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 637e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 638e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 6392b5e63f6SMartin Michlmayr # 6402b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6412b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6422b5e63f6SMartin Michlmayr # 6432b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6442b5e63f6SMartin Michlmayr # for a more details discussion 6452b5e63f6SMartin Michlmayr # 6462b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 647e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 648e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 649dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 650e2defae5SThomas Bogendoerfer help 651e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 652e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 653e2defae5SThomas Bogendoerfer 6541da177e4SLinus Torvaldsconfig SGI_IP32 655cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 6560e2794b0SRalf Baechle select FW_ARC 6570e2794b0SRalf Baechle select FW_ARC32 6581da177e4SLinus Torvalds select BOOT_ELF32 65942f77542SRalf Baechle select CEVT_R4K 660940f6b48SRalf Baechle select CSRC_R4K 6611da177e4SLinus Torvalds select DMA_NONCOHERENT 6621da177e4SLinus Torvalds select HW_HAS_PCI 66367e38cf2SRalf Baechle select IRQ_MIPS_CPU 6641da177e4SLinus Torvalds select R5000_CPU_SCACHE 6651da177e4SLinus Torvalds select RM7000_CPU_SCACHE 6667cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 6677cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 6687cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 669dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 670ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6715e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6721da177e4SLinus Torvalds help 6731da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 6741da177e4SLinus Torvalds 675ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 676ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 6775e83d430SRalf Baechle select BOOT_ELF32 6785e83d430SRalf Baechle select DMA_COHERENT 6795e83d430SRalf Baechle select SIBYTE_BCM1120 6805e83d430SRalf Baechle select SWAP_IO_SPACE 6817cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6825e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6835e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6845e83d430SRalf Baechle 685ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 686ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 6875e83d430SRalf Baechle select BOOT_ELF32 6885e83d430SRalf Baechle select DMA_COHERENT 6895e83d430SRalf Baechle select SIBYTE_BCM1120 6905e83d430SRalf Baechle select SWAP_IO_SPACE 6917cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6925e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6935e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6945e83d430SRalf Baechle 6955e83d430SRalf Baechleconfig SIBYTE_CRHONE 6963fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 6975e83d430SRalf Baechle select BOOT_ELF32 6985e83d430SRalf Baechle select DMA_COHERENT 6995e83d430SRalf Baechle select SIBYTE_BCM1125 7005e83d430SRalf Baechle select SWAP_IO_SPACE 7017cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7025e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7035e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7045e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7055e83d430SRalf Baechle 706ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 707ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 708ade299d8SYoichi Yuasa select BOOT_ELF32 709ade299d8SYoichi Yuasa select DMA_COHERENT 710ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 711ade299d8SYoichi Yuasa select SWAP_IO_SPACE 712ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 713ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 714ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 715ade299d8SYoichi Yuasa 716ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 717ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 718ade299d8SYoichi Yuasa select BOOT_ELF32 719ade299d8SYoichi Yuasa select DMA_COHERENT 720fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 721ade299d8SYoichi Yuasa select SIBYTE_SB1250 722ade299d8SYoichi Yuasa select SWAP_IO_SPACE 723ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 724ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 725ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 726ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 727cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 728ade299d8SYoichi Yuasa 729ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 730ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 731ade299d8SYoichi Yuasa select BOOT_ELF32 732ade299d8SYoichi Yuasa select DMA_COHERENT 733fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 734ade299d8SYoichi Yuasa select SIBYTE_SB1250 735ade299d8SYoichi Yuasa select SWAP_IO_SPACE 736ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 737ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 738ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 739ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 740ade299d8SYoichi Yuasa 741ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 742ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 743ade299d8SYoichi Yuasa select BOOT_ELF32 744ade299d8SYoichi Yuasa select DMA_COHERENT 745ade299d8SYoichi Yuasa select SIBYTE_SB1250 746ade299d8SYoichi Yuasa select SWAP_IO_SPACE 747ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 748ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 749ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 750ade299d8SYoichi Yuasa 751ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 752ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 753ade299d8SYoichi Yuasa select BOOT_ELF32 754ade299d8SYoichi Yuasa select DMA_COHERENT 755ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 756ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 757ade299d8SYoichi Yuasa select SWAP_IO_SPACE 758ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 759ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 760651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 761ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 762cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 763ade299d8SYoichi Yuasa 76414b36af4SThomas Bogendoerferconfig SNI_RM 76514b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 7660e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 7670e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 768aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 7695e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 7705e83d430SRalf Baechle select BOOT_ELF32 77142f77542SRalf Baechle select CEVT_R4K 772940f6b48SRalf Baechle select CSRC_R4K 773e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 7745e83d430SRalf Baechle select DMA_NONCOHERENT 7755e83d430SRalf Baechle select GENERIC_ISA_DMA 7768a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 7775e83d430SRalf Baechle select HW_HAS_EISA 7785e83d430SRalf Baechle select HW_HAS_PCI 77967e38cf2SRalf Baechle select IRQ_MIPS_CPU 780d865bea4SRalf Baechle select I8253 7815e83d430SRalf Baechle select I8259 7825e83d430SRalf Baechle select ISA 7834a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 7847cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 7854a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 786c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 7874a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 78836a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 789ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 7907d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 7914a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 7925e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7935e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7941da177e4SLinus Torvalds help 79514b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 79614b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 7975e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 7985e83d430SRalf Baechle support this machine type. 7991da177e4SLinus Torvalds 800edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 801edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 8025e83d430SRalf Baechle 803edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 804edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 80523fbee9dSRalf Baechle 80673b4390fSRalf Baechleconfig MIKROTIK_RB532 80773b4390fSRalf Baechle bool "Mikrotik RB532 boards" 80873b4390fSRalf Baechle select CEVT_R4K 80973b4390fSRalf Baechle select CSRC_R4K 81073b4390fSRalf Baechle select DMA_NONCOHERENT 81173b4390fSRalf Baechle select HW_HAS_PCI 81267e38cf2SRalf Baechle select IRQ_MIPS_CPU 81373b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 81473b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 81573b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 81673b4390fSRalf Baechle select SWAP_IO_SPACE 81773b4390fSRalf Baechle select BOOT_RAW 818d888e25bSFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 819930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 82073b4390fSRalf Baechle help 82173b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 82273b4390fSRalf Baechle based on the IDT RC32434 SoC. 82373b4390fSRalf Baechle 8249ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 8259ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 826a86c7f72SDavid Daney select CEVT_R4K 82734adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 828a86c7f72SDavid Daney select DMA_COHERENT 829a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 830a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 831f65aad41SRalf Baechle select EDAC_SUPPORT 83273569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 83373569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 834a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 8355e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 836a86c7f72SDavid Daney select SWAP_IO_SPACE 837e8635b48SDavid Daney select HW_HAS_PCI 838f00e001eSDavid Daney select ZONE_DMA32 839465aaed0SDavid Daney select HOLES_IN_ZONE 84099cab4bbSDavid Daney select ARCH_REQUIRE_GPIOLIB 8416e511163SDavid Daney select LIBFDT 8426e511163SDavid Daney select USE_OF 8436e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 8446e511163SDavid Daney select SYS_SUPPORTS_SMP 8456e511163SDavid Daney select NR_CPUS_DEFAULT_16 846e326479fSAndrew Bresticker select BUILTIN_DTB 8478c1e6b14SDavid Daney select MTD_COMPLEX_MAPPINGS 848a86c7f72SDavid Daney help 849a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 850a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 851a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 852a86c7f72SDavid Daney Some of the supported boards are: 853a86c7f72SDavid Daney EBT3000 854a86c7f72SDavid Daney EBH3000 855a86c7f72SDavid Daney EBH3100 856a86c7f72SDavid Daney Thunder 857a86c7f72SDavid Daney Kodama 858a86c7f72SDavid Daney Hikari 859a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 860a86c7f72SDavid Daney 8617f058e85SJayachandran Cconfig NLM_XLR_BOARD 8627f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 8637f058e85SJayachandran C select BOOT_ELF32 8647f058e85SJayachandran C select NLM_COMMON 8657f058e85SJayachandran C select SYS_HAS_CPU_XLR 8667f058e85SJayachandran C select SYS_SUPPORTS_SMP 8677f058e85SJayachandran C select HW_HAS_PCI 8687f058e85SJayachandran C select SWAP_IO_SPACE 8697f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 8707f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 87134adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 8727f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 8737f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 8747f058e85SJayachandran C select DMA_COHERENT 8757f058e85SJayachandran C select NR_CPUS_DEFAULT_32 8767f058e85SJayachandran C select CEVT_R4K 8777f058e85SJayachandran C select CSRC_R4K 87867e38cf2SRalf Baechle select IRQ_MIPS_CPU 879b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 8807f058e85SJayachandran C select SYNC_R4K 8817f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 8828f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 8838f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 8847f058e85SJayachandran C help 8857f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 8867f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 8877f058e85SJayachandran C 8881c773ea4SJayachandran Cconfig NLM_XLP_BOARD 8891c773ea4SJayachandran C bool "Netlogic XLP based systems" 8901c773ea4SJayachandran C select BOOT_ELF32 8911c773ea4SJayachandran C select NLM_COMMON 8921c773ea4SJayachandran C select SYS_HAS_CPU_XLP 8931c773ea4SJayachandran C select SYS_SUPPORTS_SMP 8941c773ea4SJayachandran C select HW_HAS_PCI 8951c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 8961c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 89734adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 8981c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 8991c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 9001c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 9011c773ea4SJayachandran C select DMA_COHERENT 9021c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 9031c773ea4SJayachandran C select CEVT_R4K 9041c773ea4SJayachandran C select CSRC_R4K 90567e38cf2SRalf Baechle select IRQ_MIPS_CPU 906b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9071c773ea4SJayachandran C select SYNC_R4K 9081c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 9092f6528e1SJayachandran C select USE_OF 9108f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9118f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9121c773ea4SJayachandran C help 9131c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 9141c773ea4SJayachandran C Say Y here if you have a XLP based board. 9151c773ea4SJayachandran C 9169bc463beSDavid Daneyconfig MIPS_PARAVIRT 9179bc463beSDavid Daney bool "Para-Virtualized guest system" 9189bc463beSDavid Daney select CEVT_R4K 9199bc463beSDavid Daney select CSRC_R4K 9209bc463beSDavid Daney select DMA_COHERENT 9219bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 9229bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 9239bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 9249bc463beSDavid Daney select SYS_SUPPORTS_SMP 9259bc463beSDavid Daney select NR_CPUS_DEFAULT_4 9269bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 9279bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 9289bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 9299bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 9309bc463beSDavid Daney select HW_HAS_PCI 9319bc463beSDavid Daney select SWAP_IO_SPACE 9329bc463beSDavid Daney help 9339bc463beSDavid Daney This option supports guest running under ???? 9349bc463beSDavid Daney 9351da177e4SLinus Torvaldsendchoice 9361da177e4SLinus Torvalds 937e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 9383b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 939d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 940a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 941e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 9428945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig" 9435e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 9445ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 9458ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 9461f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 9470f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 948ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 94929c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 95038b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 95122b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 9525e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 953a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 95430ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig" 95530ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig" 9567f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 957ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 95838b18f72SRalf Baechle 9595e83d430SRalf Baechleendmenu 9605e83d430SRalf Baechle 9611da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 9621da177e4SLinus Torvalds bool 9631da177e4SLinus Torvalds default y 9641da177e4SLinus Torvalds 9651da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 9661da177e4SLinus Torvalds bool 9671da177e4SLinus Torvalds 968f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 969f0d1b0b3SDavid Howells bool 970f0d1b0b3SDavid Howells default n 971f0d1b0b3SDavid Howells 972f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 973f0d1b0b3SDavid Howells bool 974f0d1b0b3SDavid Howells default n 975f0d1b0b3SDavid Howells 9763c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 9773c9ee7efSAkinobu Mita bool 9783c9ee7efSAkinobu Mita default y 9793c9ee7efSAkinobu Mita 9801da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 9811da177e4SLinus Torvalds bool 9821da177e4SLinus Torvalds default y 9831da177e4SLinus Torvalds 984ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 9851cc89038SAtsushi Nemoto bool 9861cc89038SAtsushi Nemoto default y 9871cc89038SAtsushi Nemoto 9881da177e4SLinus Torvalds# 9891da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 9901da177e4SLinus Torvalds# 9910e2794b0SRalf Baechleconfig FW_ARC 9921da177e4SLinus Torvalds bool 9931da177e4SLinus Torvalds 99461ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 99561ed242dSRalf Baechle bool 99661ed242dSRalf Baechle 9979267a30dSMarc St-Jeanconfig BOOT_RAW 9989267a30dSMarc St-Jean bool 9999267a30dSMarc St-Jean 1000217dd11eSRalf Baechleconfig CEVT_BCM1480 1001217dd11eSRalf Baechle bool 1002217dd11eSRalf Baechle 10036457d9fcSYoichi Yuasaconfig CEVT_DS1287 10046457d9fcSYoichi Yuasa bool 10056457d9fcSYoichi Yuasa 10061097c6acSYoichi Yuasaconfig CEVT_GT641XX 10071097c6acSYoichi Yuasa bool 10081097c6acSYoichi Yuasa 100942f77542SRalf Baechleconfig CEVT_R4K 101042f77542SRalf Baechle bool 101142f77542SRalf Baechle 1012217dd11eSRalf Baechleconfig CEVT_SB1250 1013217dd11eSRalf Baechle bool 1014217dd11eSRalf Baechle 1015229f773eSAtsushi Nemotoconfig CEVT_TXX9 1016229f773eSAtsushi Nemoto bool 1017229f773eSAtsushi Nemoto 1018217dd11eSRalf Baechleconfig CSRC_BCM1480 1019217dd11eSRalf Baechle bool 1020217dd11eSRalf Baechle 10214247417dSYoichi Yuasaconfig CSRC_IOASIC 10224247417dSYoichi Yuasa bool 10234247417dSYoichi Yuasa 1024940f6b48SRalf Baechleconfig CSRC_R4K 1025940f6b48SRalf Baechle bool 1026940f6b48SRalf Baechle 1027217dd11eSRalf Baechleconfig CSRC_SB1250 1028217dd11eSRalf Baechle bool 1029217dd11eSRalf Baechle 1030a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 10317444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 1032a9aec7feSAtsushi Nemoto bool 1033a9aec7feSAtsushi Nemoto 10340e2794b0SRalf Baechleconfig FW_CFE 1035df78b5c8SAurelien Jarno bool 1036df78b5c8SAurelien Jarno 10374bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 103834adb28dSRalf Baechle def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT 10394bafad92SFUJITA Tomonori 1040885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1041885014bcSFelix Fietkau select DMA_NONCOHERENT 1042885014bcSFelix Fietkau bool 1043885014bcSFelix Fietkau 10441da177e4SLinus Torvaldsconfig DMA_COHERENT 10451da177e4SLinus Torvalds bool 10461da177e4SLinus Torvalds 10471da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 10481da177e4SLinus Torvalds bool 1049e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 10504ce588cdSRalf Baechle 1051e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 10524ce588cdSRalf Baechle bool 10531da177e4SLinus Torvalds 105436a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 10551da177e4SLinus Torvalds bool 10561da177e4SLinus Torvalds 1057dbb74540SRalf Baechleconfig HOTPLUG_CPU 10581b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 105940b31360SStephen Rothwell depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 10601b2bc75cSRalf Baechle help 10611b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 10621b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 10631b2bc75cSRalf Baechle (Note: power management support will enable this option 10641b2bc75cSRalf Baechle automatically on SMP systems. ) 10651b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 10661b2bc75cSRalf Baechle 10671b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1068dbb74540SRalf Baechle bool 1069dbb74540SRalf Baechle 10701da177e4SLinus Torvaldsconfig I8259 10711da177e4SLinus Torvalds bool 1072079a4601SAndrew Bresticker select IRQ_DOMAIN 10731da177e4SLinus Torvalds 10741da177e4SLinus Torvaldsconfig MIPS_BONITO64 10751da177e4SLinus Torvalds bool 10761da177e4SLinus Torvalds 10771da177e4SLinus Torvaldsconfig MIPS_MSC 10781da177e4SLinus Torvalds bool 10791da177e4SLinus Torvalds 10801f21d2bdSBrian Murphyconfig MIPS_NILE4 10811f21d2bdSBrian Murphy bool 10821f21d2bdSBrian Murphy 108339b8d525SRalf Baechleconfig SYNC_R4K 108439b8d525SRalf Baechle bool 108539b8d525SRalf Baechle 1086487d70d0SGabor Juhosconfig MIPS_MACHINE 1087487d70d0SGabor Juhos def_bool n 1088487d70d0SGabor Juhos 1089ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1090d388d685SMaciej W. Rozycki def_bool n 1091d388d685SMaciej W. Rozycki 10924e0748f5SMarkos Chandrasconfig GENERIC_CSUM 10934e0748f5SMarkos Chandras bool 10944e0748f5SMarkos Chandras 10958313da30SRalf Baechleconfig GENERIC_ISA_DMA 10968313da30SRalf Baechle bool 10978313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1098a35bee8aSNamhyung Kim select ISA_DMA_API 10998313da30SRalf Baechle 1100aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1101aa414dffSRalf Baechle bool 11028313da30SRalf Baechle select GENERIC_ISA_DMA 1103aa414dffSRalf Baechle 1104a35bee8aSNamhyung Kimconfig ISA_DMA_API 1105a35bee8aSNamhyung Kim bool 1106a35bee8aSNamhyung Kim 1107465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1108465aaed0SDavid Daney bool 1109465aaed0SDavid Daney 11105e83d430SRalf Baechle# 11116b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 11125e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 11135e83d430SRalf Baechle# choice statement should be more obvious to the user. 11145e83d430SRalf Baechle# 11155e83d430SRalf Baechlechoice 11166b2aac42SMasanari Iida prompt "Endianness selection" 11171da177e4SLinus Torvalds help 11181da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 11195e83d430SRalf Baechle byte order. These modes require different kernels and a different 11203cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 11215e83d430SRalf Baechle particular system but some systems are just as commonly used in the 11223dde6ad8SDavid Sterba one or the other endianness. 11235e83d430SRalf Baechle 11245e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 11255e83d430SRalf Baechle bool "Big endian" 11265e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 11275e83d430SRalf Baechle 11285e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 11295e83d430SRalf Baechle bool "Little endian" 11305e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 11315e83d430SRalf Baechle 11325e83d430SRalf Baechleendchoice 11335e83d430SRalf Baechle 113422b0763aSDavid Daneyconfig EXPORT_UASM 113522b0763aSDavid Daney bool 113622b0763aSDavid Daney 11372116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 11382116245eSRalf Baechle bool 11392116245eSRalf Baechle 11405e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 11415e83d430SRalf Baechle bool 11425e83d430SRalf Baechle 11435e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 11445e83d430SRalf Baechle bool 11451da177e4SLinus Torvalds 11469cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 11479cffd154SDavid Daney bool 11489cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 11499cffd154SDavid Daney default y 11509cffd154SDavid Daney 1151aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1152aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1153aa1762f4SDavid Daney 11541da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 11551da177e4SLinus Torvalds bool 11561da177e4SLinus Torvalds 11579267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 11589267a30dSMarc St-Jean bool 11599267a30dSMarc St-Jean 11609267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 11619267a30dSMarc St-Jean bool 11629267a30dSMarc St-Jean 11638420fd00SAtsushi Nemotoconfig IRQ_TXX9 11648420fd00SAtsushi Nemoto bool 11658420fd00SAtsushi Nemoto 1166d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1167d5ab1a69SYoichi Yuasa bool 1168d5ab1a69SYoichi Yuasa 1169252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 11701da177e4SLinus Torvalds bool 11711da177e4SLinus Torvalds 11729267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 11739267a30dSMarc St-Jean bool 11749267a30dSMarc St-Jean 1175a83860c2SRalf Baechleconfig SOC_EMMA2RH 1176a83860c2SRalf Baechle bool 1177a83860c2SRalf Baechle select CEVT_R4K 1178a83860c2SRalf Baechle select CSRC_R4K 1179a83860c2SRalf Baechle select DMA_NONCOHERENT 118067e38cf2SRalf Baechle select IRQ_MIPS_CPU 1181a83860c2SRalf Baechle select SWAP_IO_SPACE 1182a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1183a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1184a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1185a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1186a83860c2SRalf Baechle 1187edb6310aSDaniel Lairdconfig SOC_PNX833X 1188edb6310aSDaniel Laird bool 1189edb6310aSDaniel Laird select CEVT_R4K 1190edb6310aSDaniel Laird select CSRC_R4K 119167e38cf2SRalf Baechle select IRQ_MIPS_CPU 1192edb6310aSDaniel Laird select DMA_NONCOHERENT 1193edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1194edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1195edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1196edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1197377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1198edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1199edb6310aSDaniel Laird 1200edb6310aSDaniel Lairdconfig SOC_PNX8335 1201edb6310aSDaniel Laird bool 1202edb6310aSDaniel Laird select SOC_PNX833X 1203edb6310aSDaniel Laird 1204a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1205a7e07b1aSMarkos Chandras bool 1206a7e07b1aSMarkos Chandras 12071da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 12081da177e4SLinus Torvalds bool 12091da177e4SLinus Torvalds 1210e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1211e2defae5SThomas Bogendoerfer bool 1212e2defae5SThomas Bogendoerfer 12135b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 12145b438c44SThomas Bogendoerfer bool 12155b438c44SThomas Bogendoerfer 1216e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1217e2defae5SThomas Bogendoerfer bool 1218e2defae5SThomas Bogendoerfer 1219e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1220e2defae5SThomas Bogendoerfer bool 1221e2defae5SThomas Bogendoerfer 1222e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1223e2defae5SThomas Bogendoerfer bool 1224e2defae5SThomas Bogendoerfer 1225e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1226e2defae5SThomas Bogendoerfer bool 1227e2defae5SThomas Bogendoerfer 1228e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1229e2defae5SThomas Bogendoerfer bool 1230e2defae5SThomas Bogendoerfer 12310e2794b0SRalf Baechleconfig FW_ARC32 12325e83d430SRalf Baechle bool 12335e83d430SRalf Baechle 1234aaa9fad3SPaul Bolleconfig FW_SNIPROM 1235231a35d3SThomas Bogendoerfer bool 1236231a35d3SThomas Bogendoerfer 12371da177e4SLinus Torvaldsconfig BOOT_ELF32 12381da177e4SLinus Torvalds bool 12391da177e4SLinus Torvalds 1240930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1241930beb5aSFlorian Fainelli bool 1242930beb5aSFlorian Fainelli 1243930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1244930beb5aSFlorian Fainelli bool 1245930beb5aSFlorian Fainelli 1246930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1247930beb5aSFlorian Fainelli bool 1248930beb5aSFlorian Fainelli 1249930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1250930beb5aSFlorian Fainelli bool 1251930beb5aSFlorian Fainelli 12521da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 12531da177e4SLinus Torvalds int 1254a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 12555432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 12565432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 12575432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 12581da177e4SLinus Torvalds default "5" 12591da177e4SLinus Torvalds 12601da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 12611da177e4SLinus Torvalds bool 12621da177e4SLinus Torvalds 12631da177e4SLinus Torvaldsconfig ARC_CONSOLE 12641da177e4SLinus Torvalds bool "ARC console support" 1265e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 12661da177e4SLinus Torvalds 12671da177e4SLinus Torvaldsconfig ARC_MEMORY 12681da177e4SLinus Torvalds bool 126914b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 12701da177e4SLinus Torvalds default y 12711da177e4SLinus Torvalds 12721da177e4SLinus Torvaldsconfig ARC_PROMLIB 12731da177e4SLinus Torvalds bool 1274e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 12751da177e4SLinus Torvalds default y 12761da177e4SLinus Torvalds 12770e2794b0SRalf Baechleconfig FW_ARC64 12781da177e4SLinus Torvalds bool 12791da177e4SLinus Torvalds 12801da177e4SLinus Torvaldsconfig BOOT_ELF64 12811da177e4SLinus Torvalds bool 12821da177e4SLinus Torvalds 12831da177e4SLinus Torvaldsmenu "CPU selection" 12841da177e4SLinus Torvalds 12851da177e4SLinus Torvaldschoice 12861da177e4SLinus Torvalds prompt "CPU type" 12871da177e4SLinus Torvalds default CPU_R4X00 12881da177e4SLinus Torvalds 12890e476d91SHuacai Chenconfig CPU_LOONGSON3 12900e476d91SHuacai Chen bool "Loongson 3 CPU" 12910e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 12920e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 12930e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 12940e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 12950e476d91SHuacai Chen select WEAK_ORDERING 12960e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 1297cbfb3ea7SHuacai Chen select ARCH_REQUIRE_GPIOLIB 12980e476d91SHuacai Chen help 12990e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 13000e476d91SHuacai Chen set with many extensions. 13010e476d91SHuacai Chen 13023702bba5SWu Zhangjinconfig CPU_LOONGSON2E 13033702bba5SWu Zhangjin bool "Loongson 2E" 13043702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 13053702bba5SWu Zhangjin select CPU_LOONGSON2 13062a21c730SFuxin Zhang help 13072a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 13082a21c730SFuxin Zhang with many extensions. 13092a21c730SFuxin Zhang 131025985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 13116f7a251aSWu Zhangjin bonito64. 13126f7a251aSWu Zhangjin 13136f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 13146f7a251aSWu Zhangjin bool "Loongson 2F" 13156f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 13166f7a251aSWu Zhangjin select CPU_LOONGSON2 1317c197da91SArnaud Patard select ARCH_REQUIRE_GPIOLIB 13186f7a251aSWu Zhangjin help 13196f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 13206f7a251aSWu Zhangjin with many extensions. 13216f7a251aSWu Zhangjin 13226f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 13236f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 13246f7a251aSWu Zhangjin Loongson2E. 13256f7a251aSWu Zhangjin 1326ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1327ca585cf9SKelvin Cheung bool "Loongson 1B" 1328ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1329ca585cf9SKelvin Cheung select CPU_LOONGSON1 1330ca585cf9SKelvin Cheung help 1331ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1332ca585cf9SKelvin Cheung release 2 instruction set. 1333ca585cf9SKelvin Cheung 13346e760c8dSRalf Baechleconfig CPU_MIPS32_R1 13356e760c8dSRalf Baechle bool "MIPS32 Release 1" 13367cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 13376e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1338797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1339ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 13406e760c8dSRalf Baechle help 13415e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 13421e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 13431e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 13441e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 13451e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 13461e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 13471e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 13481e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 13491e5f1caaSRalf Baechle performance. 13501e5f1caaSRalf Baechle 13511e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 13521e5f1caaSRalf Baechle bool "MIPS32 Release 2" 13537cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 13541e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1355797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1356ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1357a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 13582235a54dSSanjay Lal select HAVE_KVM 13591e5f1caaSRalf Baechle help 13605e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 13616e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 13626e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 13636e760c8dSRalf Baechle specific type of processor in your system, choose those that one 13646e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 13651da177e4SLinus Torvalds 13667fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 13677fd08ca5SLeonid Yegoshin bool "MIPS32 Release 6 (EXPERIMENTAL)" 13687fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 13697fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 13707fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 13717fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 13727fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 13734e0748f5SMarkos Chandras select GENERIC_CSUM 13747fd08ca5SLeonid Yegoshin select HAVE_KVM 13757fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 13767fd08ca5SLeonid Yegoshin help 13777fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 13787fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 13797fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 13807fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 13817fd08ca5SLeonid Yegoshin 13826e760c8dSRalf Baechleconfig CPU_MIPS64_R1 13836e760c8dSRalf Baechle bool "MIPS64 Release 1" 13847cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1385797798c1SRalf Baechle select CPU_HAS_PREFETCH 1386ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1387ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1388ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 13899cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 13906e760c8dSRalf Baechle help 13916e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 13926e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 13936e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 13946e760c8dSRalf Baechle specific type of processor in your system, choose those that one 13956e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 13961e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 13971e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 13981e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 13991e5f1caaSRalf Baechle performance. 14001e5f1caaSRalf Baechle 14011e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 14021e5f1caaSRalf Baechle bool "MIPS64 Release 2" 14037cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1404797798c1SRalf Baechle select CPU_HAS_PREFETCH 14051e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 14061e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1407ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14089cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1409a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14101e5f1caaSRalf Baechle help 14111e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 14121e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 14131e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 14141e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14151e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 14161da177e4SLinus Torvalds 14177fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 14187fd08ca5SLeonid Yegoshin bool "MIPS64 Release 6 (EXPERIMENTAL)" 14197fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 14207fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 14217fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 14227fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 14237fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 14247fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 14254e0748f5SMarkos Chandras select GENERIC_CSUM 14267fd08ca5SLeonid Yegoshin help 14277fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 14287fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 14297fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 14307fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 14317fd08ca5SLeonid Yegoshin 14321da177e4SLinus Torvaldsconfig CPU_R3000 14331da177e4SLinus Torvalds bool "R3000" 14347cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1435f7062ddbSRalf Baechle select CPU_HAS_WB 1436ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1437797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14381da177e4SLinus Torvalds help 14391da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 14401da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 14411da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 14421da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 14431da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 14441da177e4SLinus Torvalds try to recompile with R3000. 14451da177e4SLinus Torvalds 14461da177e4SLinus Torvaldsconfig CPU_TX39XX 14471da177e4SLinus Torvalds bool "R39XX" 14487cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1449ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 14501da177e4SLinus Torvalds 14511da177e4SLinus Torvaldsconfig CPU_VR41XX 14521da177e4SLinus Torvalds bool "R41xx" 14537cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1454ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1455ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 14561da177e4SLinus Torvalds help 14575e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 14581da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 14591da177e4SLinus Torvalds kernel built with this option will not run on any other type of 14601da177e4SLinus Torvalds processor or vice versa. 14611da177e4SLinus Torvalds 14621da177e4SLinus Torvaldsconfig CPU_R4300 14631da177e4SLinus Torvalds bool "R4300" 14647cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1465ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1466ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 14671da177e4SLinus Torvalds help 14681da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 14691da177e4SLinus Torvalds 14701da177e4SLinus Torvaldsconfig CPU_R4X00 14711da177e4SLinus Torvalds bool "R4x00" 14727cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1473ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1474ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1475970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14761da177e4SLinus Torvalds help 14771da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 14781da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 14791da177e4SLinus Torvalds 14801da177e4SLinus Torvaldsconfig CPU_TX49XX 14811da177e4SLinus Torvalds bool "R49XX" 14827cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1483de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1484ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1485ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1486970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14871da177e4SLinus Torvalds 14881da177e4SLinus Torvaldsconfig CPU_R5000 14891da177e4SLinus Torvalds bool "R5000" 14907cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1491ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1492ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1493970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14941da177e4SLinus Torvalds help 14951da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 14961da177e4SLinus Torvalds 14971da177e4SLinus Torvaldsconfig CPU_R5432 14981da177e4SLinus Torvalds bool "R5432" 14997cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 15005e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 15015e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1502970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15031da177e4SLinus Torvalds 1504542c1020SShinya Kuribayashiconfig CPU_R5500 1505542c1020SShinya Kuribayashi bool "R5500" 1506542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1507542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1508542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 15099cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1510542c1020SShinya Kuribayashi help 1511542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1512542c1020SShinya Kuribayashi instruction set. 1513542c1020SShinya Kuribayashi 15141da177e4SLinus Torvaldsconfig CPU_R6000 15151da177e4SLinus Torvalds bool "R6000" 15167cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1517ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 15181da177e4SLinus Torvalds help 15191da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1520c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 15211da177e4SLinus Torvalds 15221da177e4SLinus Torvaldsconfig CPU_NEVADA 15231da177e4SLinus Torvalds bool "RM52xx" 15247cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1525ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1526ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1527970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15281da177e4SLinus Torvalds help 15291da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 15301da177e4SLinus Torvalds 15311da177e4SLinus Torvaldsconfig CPU_R8000 15321da177e4SLinus Torvalds bool "R8000" 15337cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 15345e83d430SRalf Baechle select CPU_HAS_PREFETCH 1535ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15361da177e4SLinus Torvalds help 15371da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 15381da177e4SLinus Torvalds uncommon and the support for them is incomplete. 15391da177e4SLinus Torvalds 15401da177e4SLinus Torvaldsconfig CPU_R10000 15411da177e4SLinus Torvalds bool "R10000" 15427cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 15435e83d430SRalf Baechle select CPU_HAS_PREFETCH 1544ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1545ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1546797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1547970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15481da177e4SLinus Torvalds help 15491da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 15501da177e4SLinus Torvalds 15511da177e4SLinus Torvaldsconfig CPU_RM7000 15521da177e4SLinus Torvalds bool "RM7000" 15537cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 15545e83d430SRalf Baechle select CPU_HAS_PREFETCH 1555ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1556ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1557797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1558970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15591da177e4SLinus Torvalds 15601da177e4SLinus Torvaldsconfig CPU_SB1 15611da177e4SLinus Torvalds bool "SB1" 15627cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1563ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1564ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1565797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1566970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15670004a9dfSRalf Baechle select WEAK_ORDERING 15681da177e4SLinus Torvalds 1569a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1570a86c7f72SDavid Daney bool "Cavium Octeon processor" 15715e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1572a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1573a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1574a86c7f72SDavid Daney select WEAK_ORDERING 1575a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 15769cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 15779296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 1578930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1579a86c7f72SDavid Daney help 1580a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1581a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1582a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1583a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1584a86c7f72SDavid Daney 1585cd746249SJonas Gorskiconfig CPU_BMIPS 1586cd746249SJonas Gorski bool "Broadcom BMIPS" 1587cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1588cd746249SJonas Gorski select CPU_MIPS32 1589fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1590cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1591cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1592cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1593cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1594cd746249SJonas Gorski select DMA_NONCOHERENT 159567e38cf2SRalf Baechle select IRQ_MIPS_CPU 1596cd746249SJonas Gorski select SWAP_IO_SPACE 1597cd746249SJonas Gorski select WEAK_ORDERING 1598c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 159969aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1600c1c0c461SKevin Cernekee help 1601fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1602c1c0c461SKevin Cernekee 16037f058e85SJayachandran Cconfig CPU_XLR 16047f058e85SJayachandran C bool "Netlogic XLR SoC" 16057f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 16067f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 16077f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 16087f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1609970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16107f058e85SJayachandran C select WEAK_ORDERING 16117f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 16127f058e85SJayachandran C help 16137f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 16141c773ea4SJayachandran C 16151c773ea4SJayachandran Cconfig CPU_XLP 16161c773ea4SJayachandran C bool "Netlogic XLP SoC" 16171c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 16181c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 16191c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 16201c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 16211c773ea4SJayachandran C select WEAK_ORDERING 16221c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 16231c773ea4SJayachandran C select CPU_HAS_PREFETCH 1624d6504846SJayachandran C select CPU_MIPSR2 1625ddba6833SPrem Mallappa select CPU_SUPPORTS_HUGEPAGES 16261c773ea4SJayachandran C help 16271c773ea4SJayachandran C Netlogic Microsystems XLP processors. 16281da177e4SLinus Torvaldsendchoice 16291da177e4SLinus Torvalds 1630a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1631a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1632a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 16337fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1634a6e18781SLeonid Yegoshin help 1635a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1636a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1637a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1638a6e18781SLeonid Yegoshin 1639a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1640a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1641a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1642a6e18781SLeonid Yegoshin select EVA 1643a6e18781SLeonid Yegoshin default y 1644a6e18781SLeonid Yegoshin help 1645a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1646a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1647a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1648a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1649a6e18781SLeonid Yegoshin 1650c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1651c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1652c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1653c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1654c5b36783SSteven J. Hill help 1655c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1656c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1657c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1658c5b36783SSteven J. Hill 1659c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1660c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1661c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1662c5b36783SSteven J. Hill depends on !EVA 1663c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1664c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1665c5b36783SSteven J. Hill select XPA 1666c5b36783SSteven J. Hill select HIGHMEM 1667c5b36783SSteven J. Hill select ARCH_PHYS_ADDR_T_64BIT 1668c5b36783SSteven J. Hill default n 1669c5b36783SSteven J. Hill help 1670c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1671c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1672c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1673c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1674c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1675c5b36783SSteven J. Hill If unsure, say 'N' here. 1676c5b36783SSteven J. Hill 1677622844bfSWu Zhangjinif CPU_LOONGSON2F 1678622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1679622844bfSWu Zhangjin bool 1680622844bfSWu Zhangjin 1681622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1682622844bfSWu Zhangjin bool 1683622844bfSWu Zhangjin 1684622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1685622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1686622844bfSWu Zhangjin default y 1687622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1688622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1689622844bfSWu Zhangjin help 1690622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1691622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1692622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1693622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1694622844bfSWu Zhangjin 1695622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1696622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1697622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1698622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1699622844bfSWu Zhangjin systems. 1700622844bfSWu Zhangjin 1701622844bfSWu Zhangjin If unsure, please say Y. 1702622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1703622844bfSWu Zhangjin 17041b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 17051b93b3c3SWu Zhangjin bool 17061b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 17071b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 170831c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 17091b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1710fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 17114e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 17121b93b3c3SWu Zhangjin 17131b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 17141b93b3c3SWu Zhangjin bool 17151b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 17161b93b3c3SWu Zhangjin 17173702bba5SWu Zhangjinconfig CPU_LOONGSON2 17183702bba5SWu Zhangjin bool 17193702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 17203702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 17213702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1722970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17233702bba5SWu Zhangjin 1724ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1725ca585cf9SKelvin Cheung bool 1726ca585cf9SKelvin Cheung select CPU_MIPS32 1727ca585cf9SKelvin Cheung select CPU_MIPSR2 1728ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1729ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1730ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1731f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1732ca585cf9SKelvin Cheung 1733fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 173404fa8bf7SJonas Gorski select SMP_UP if SMP 17351bbb6c1bSKevin Cernekee bool 1736cd746249SJonas Gorski 1737cd746249SJonas Gorskiconfig CPU_BMIPS4350 1738cd746249SJonas Gorski bool 1739cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1740cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1741cd746249SJonas Gorski 1742cd746249SJonas Gorskiconfig CPU_BMIPS4380 1743cd746249SJonas Gorski bool 1744bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1745cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1746cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1747cd746249SJonas Gorski 1748cd746249SJonas Gorskiconfig CPU_BMIPS5000 1749cd746249SJonas Gorski bool 1750cd746249SJonas Gorski select MIPS_CPU_SCACHE 1751bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1752cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1753cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 17541bbb6c1bSKevin Cernekee 17550e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 17560e476d91SHuacai Chen bool 17570e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 17580e476d91SHuacai Chen 17593702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 17602a21c730SFuxin Zhang bool 17612a21c730SFuxin Zhang 17626f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 17636f7a251aSWu Zhangjin bool 176455045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 176555045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 176622f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 17676f7a251aSWu Zhangjin 1768ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1769ca585cf9SKelvin Cheung bool 1770ca585cf9SKelvin Cheung 17717cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 17727cf8053bSRalf Baechle bool 17737cf8053bSRalf Baechle 17747cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 17757cf8053bSRalf Baechle bool 17767cf8053bSRalf Baechle 1777a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1778a6e18781SLeonid Yegoshin bool 1779a6e18781SLeonid Yegoshin 1780c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1781c5b36783SSteven J. Hill bool 1782c5b36783SSteven J. Hill 17837fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 17847fd08ca5SLeonid Yegoshin bool 17857fd08ca5SLeonid Yegoshin 17867cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 17877cf8053bSRalf Baechle bool 17887cf8053bSRalf Baechle 17897cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 17907cf8053bSRalf Baechle bool 17917cf8053bSRalf Baechle 17927fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 17937fd08ca5SLeonid Yegoshin bool 17947fd08ca5SLeonid Yegoshin 17957cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 17967cf8053bSRalf Baechle bool 17977cf8053bSRalf Baechle 17987cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 17997cf8053bSRalf Baechle bool 18007cf8053bSRalf Baechle 18017cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 18027cf8053bSRalf Baechle bool 18037cf8053bSRalf Baechle 18047cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 18057cf8053bSRalf Baechle bool 18067cf8053bSRalf Baechle 18077cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 18087cf8053bSRalf Baechle bool 18097cf8053bSRalf Baechle 18107cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 18117cf8053bSRalf Baechle bool 18127cf8053bSRalf Baechle 18137cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 18147cf8053bSRalf Baechle bool 18157cf8053bSRalf Baechle 18167cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 18177cf8053bSRalf Baechle bool 18187cf8053bSRalf Baechle 1819542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1820542c1020SShinya Kuribayashi bool 1821542c1020SShinya Kuribayashi 18227cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 18237cf8053bSRalf Baechle bool 18247cf8053bSRalf Baechle 18257cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 18267cf8053bSRalf Baechle bool 18277cf8053bSRalf Baechle 18287cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 18297cf8053bSRalf Baechle bool 18307cf8053bSRalf Baechle 18317cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 18327cf8053bSRalf Baechle bool 18337cf8053bSRalf Baechle 18347cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 18357cf8053bSRalf Baechle bool 18367cf8053bSRalf Baechle 18377cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 18387cf8053bSRalf Baechle bool 18397cf8053bSRalf Baechle 18405e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 18415e683389SDavid Daney bool 18425e683389SDavid Daney 1843cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1844c1c0c461SKevin Cernekee bool 1845c1c0c461SKevin Cernekee 1846fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1847c1c0c461SKevin Cernekee bool 1848cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1849c1c0c461SKevin Cernekee 1850c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1851c1c0c461SKevin Cernekee bool 1852cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1853c1c0c461SKevin Cernekee 1854c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1855c1c0c461SKevin Cernekee bool 1856cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1857c1c0c461SKevin Cernekee 1858c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1859c1c0c461SKevin Cernekee bool 1860cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1861c1c0c461SKevin Cernekee 18627f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 18637f058e85SJayachandran C bool 18647f058e85SJayachandran C 18651c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 18661c773ea4SJayachandran C bool 18671c773ea4SJayachandran C 1868b6911bbaSPaul Burtonconfig MIPS_MALTA_PM 1869b6911bbaSPaul Burton depends on MIPS_MALTA 1870b6911bbaSPaul Burton depends on PCI 1871b6911bbaSPaul Burton bool 1872b6911bbaSPaul Burton default y 1873b6911bbaSPaul Burton 187417099b11SRalf Baechle# 187517099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 187617099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 187717099b11SRalf Baechle# 18780004a9dfSRalf Baechleconfig WEAK_ORDERING 18790004a9dfSRalf Baechle bool 188017099b11SRalf Baechle 188117099b11SRalf Baechle# 188217099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 188317099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 188417099b11SRalf Baechle# 188517099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 188617099b11SRalf Baechle bool 18875e83d430SRalf Baechleendmenu 18885e83d430SRalf Baechle 18895e83d430SRalf Baechle# 18905e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 18915e83d430SRalf Baechle# 18925e83d430SRalf Baechleconfig CPU_MIPS32 18935e83d430SRalf Baechle bool 18947fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 18955e83d430SRalf Baechle 18965e83d430SRalf Baechleconfig CPU_MIPS64 18975e83d430SRalf Baechle bool 18987fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 18995e83d430SRalf Baechle 19005e83d430SRalf Baechle# 1901c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 19025e83d430SRalf Baechle# 19035e83d430SRalf Baechleconfig CPU_MIPSR1 19045e83d430SRalf Baechle bool 19055e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 19065e83d430SRalf Baechle 19075e83d430SRalf Baechleconfig CPU_MIPSR2 19085e83d430SRalf Baechle bool 1909a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 1910a7e07b1aSMarkos Chandras select MIPS_SPRAM 19115e83d430SRalf Baechle 19127fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 19137fd08ca5SLeonid Yegoshin bool 19147fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 1915a7e07b1aSMarkos Chandras select MIPS_SPRAM 19165e83d430SRalf Baechle 1917a6e18781SLeonid Yegoshinconfig EVA 1918a6e18781SLeonid Yegoshin bool 1919a6e18781SLeonid Yegoshin 1920c5b36783SSteven J. Hillconfig XPA 1921c5b36783SSteven J. Hill bool 1922c5b36783SSteven J. Hill 19235e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 19245e83d430SRalf Baechle bool 19255e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 19265e83d430SRalf Baechle bool 19275e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 19285e83d430SRalf Baechle bool 19295e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 19305e83d430SRalf Baechle bool 193155045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 193255045ff5SWu Zhangjin bool 193355045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 193455045ff5SWu Zhangjin bool 19359cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 19369cffd154SDavid Daney bool 193722f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 193822f1fdfdSWu Zhangjin bool 193982622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 194082622284SDavid Daney bool 1941d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 19425e83d430SRalf Baechle 19438192c9eaSDavid Daney# 19448192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 19458192c9eaSDavid Daney# 19468192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 19478192c9eaSDavid Daney bool 1948f839490aSDavid Daney default y if CPU_MIPSR1 || CPU_MIPSR2 19498192c9eaSDavid Daney 19505e83d430SRalf Baechlemenu "Kernel type" 19515e83d430SRalf Baechle 19525e83d430SRalf Baechlechoice 19535e83d430SRalf Baechle prompt "Kernel code model" 19545e83d430SRalf Baechle help 19555e83d430SRalf Baechle You should only select this option if you have a workload that 19565e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 19575e83d430SRalf Baechle large memory. You will only be presented a single option in this 19585e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 19595e83d430SRalf Baechle 19605e83d430SRalf Baechleconfig 32BIT 19615e83d430SRalf Baechle bool "32-bit kernel" 19625e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 19635e83d430SRalf Baechle select TRAD_SIGNALS 19645e83d430SRalf Baechle help 19655e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 19665e83d430SRalf Baechleconfig 64BIT 19675e83d430SRalf Baechle bool "64-bit kernel" 19685e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 19695e83d430SRalf Baechle help 19705e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 19715e83d430SRalf Baechle 19725e83d430SRalf Baechleendchoice 19735e83d430SRalf Baechle 19742235a54dSSanjay Lalconfig KVM_GUEST 19752235a54dSSanjay Lal bool "KVM Guest Kernel" 1976f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 19772235a54dSSanjay Lal help 19782235a54dSSanjay Lal Select this option if building a guest kernel for KVM (Trap & Emulate) mode 19792235a54dSSanjay Lal 1980eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 1981eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 19822235a54dSSanjay Lal depends on KVM_GUEST 1983eda3d33cSJames Hogan default 100 19842235a54dSSanjay Lal help 1985eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 1986eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 1987eda3d33cSJames Hogan timer frequency is specified directly. 19882235a54dSSanjay Lal 19891da177e4SLinus Torvaldschoice 19901da177e4SLinus Torvalds prompt "Kernel page size" 19911da177e4SLinus Torvalds default PAGE_SIZE_4KB 19921da177e4SLinus Torvalds 19931da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 19941da177e4SLinus Torvalds bool "4kB" 19950e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 19961da177e4SLinus Torvalds help 19971da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 19981da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 19991da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 20001da177e4SLinus Torvalds recommended for low memory systems. 20011da177e4SLinus Torvalds 20021da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 20031da177e4SLinus Torvalds bool "8kB" 20047d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 20051da177e4SLinus Torvalds help 20061da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 20071da177e4SLinus Torvalds the price of higher memory consumption. This option is available 2008c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 2009c52399beSRalf Baechle suitable Linux distribution to support this. 20101da177e4SLinus Torvalds 20111da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 20121da177e4SLinus Torvalds bool "16kB" 2013714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 20141da177e4SLinus Torvalds help 20151da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 20161da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 2017714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 2018714bfad6SRalf Baechle Linux distribution to support this. 20191da177e4SLinus Torvalds 2020c52399beSRalf Baechleconfig PAGE_SIZE_32KB 2021c52399beSRalf Baechle bool "32kB" 2022c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 2023c52399beSRalf Baechle help 2024c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 2025c52399beSRalf Baechle the price of higher memory consumption. This option is available 2026c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 2027c52399beSRalf Baechle distribution to support this. 2028c52399beSRalf Baechle 20291da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 20301da177e4SLinus Torvalds bool "64kB" 20317d60717eSKees Cook depends on !CPU_R3000 && !CPU_TX39XX 20321da177e4SLinus Torvalds help 20331da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 20341da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 20351da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 2036714bfad6SRalf Baechle writing this option is still high experimental. 20371da177e4SLinus Torvalds 20381da177e4SLinus Torvaldsendchoice 20391da177e4SLinus Torvalds 2040c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 2041c9bace7cSDavid Daney int "Maximum zone order" 2042e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2043e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2044e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2045e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2046e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2047e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2048c9bace7cSDavid Daney range 11 64 2049c9bace7cSDavid Daney default "11" 2050c9bace7cSDavid Daney help 2051c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2052c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2053c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2054c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2055c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2056c9bace7cSDavid Daney increase this value. 2057c9bace7cSDavid Daney 2058c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2059c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2060c9bace7cSDavid Daney 2061c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2062c9bace7cSDavid Daney when choosing a value for this option. 2063c9bace7cSDavid Daney 20641da177e4SLinus Torvaldsconfig BOARD_SCACHE 20651da177e4SLinus Torvalds bool 20661da177e4SLinus Torvalds 20671da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 20681da177e4SLinus Torvalds bool 20691da177e4SLinus Torvalds select BOARD_SCACHE 20701da177e4SLinus Torvalds 20719318c51aSChris Dearman# 20729318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 20739318c51aSChris Dearman# 20749318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 20759318c51aSChris Dearman bool 20769318c51aSChris Dearman select BOARD_SCACHE 20779318c51aSChris Dearman 20781da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 20791da177e4SLinus Torvalds bool 20801da177e4SLinus Torvalds select BOARD_SCACHE 20811da177e4SLinus Torvalds 20821da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 20831da177e4SLinus Torvalds bool 20841da177e4SLinus Torvalds select BOARD_SCACHE 20851da177e4SLinus Torvalds 20861da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 20871da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 20881da177e4SLinus Torvalds depends on CPU_SB1 20891da177e4SLinus Torvalds help 20901da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 20911da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 20921da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 20931da177e4SLinus Torvalds 20941da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2095c8094b53SRalf Baechle bool 20961da177e4SLinus Torvalds 20973165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 20983165c846SFlorian Fainelli bool 20993165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 21003165c846SFlorian Fainelli 210191405eb6SFlorian Fainelliconfig CPU_R4K_FPU 210291405eb6SFlorian Fainelli bool 210391405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 210491405eb6SFlorian Fainelli 210562cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 210662cedc4fSFlorian Fainelli bool 210762cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 210862cedc4fSFlorian Fainelli 210959d6ab86SRalf Baechleconfig MIPS_MT_SMP 2110a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 211159d6ab86SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 211259d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2113d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2114c080faa5SSteven J. Hill select SYNC_R4K 21150c2cb004SPaul Burton select MIPS_GIC_IPI 211659d6ab86SRalf Baechle select MIPS_MT 211759d6ab86SRalf Baechle select SMP 211887353d8aSRalf Baechle select SMP_UP 2119c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2120c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2121399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 212259d6ab86SRalf Baechle help 2123c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2124c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2125c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2126c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2127c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 212859d6ab86SRalf Baechle 2129f41ae0b2SRalf Baechleconfig MIPS_MT 2130f41ae0b2SRalf Baechle bool 2131f41ae0b2SRalf Baechle 21320ab7aefcSRalf Baechleconfig SCHED_SMT 21330ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 21340ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 21350ab7aefcSRalf Baechle default n 21360ab7aefcSRalf Baechle help 21370ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 21380ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 21390ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 21400ab7aefcSRalf Baechle 21410ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 21420ab7aefcSRalf Baechle bool 21430ab7aefcSRalf Baechle 2144f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2145f41ae0b2SRalf Baechle bool 2146f41ae0b2SRalf Baechle 2147f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2148f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2149f088fc84SRalf Baechle default y 2150b633648cSRalf Baechle depends on MIPS_MT_SMP 215107cc0c9eSRalf Baechle 2152b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2153b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 2154b0a668fbSLeonid Yegoshin depends on CPU_MIPSR6 && !SMP 2155b0a668fbSLeonid Yegoshin default y 2156b0a668fbSLeonid Yegoshin help 2157b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2158b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 215907edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2160b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2161b0a668fbSLeonid Yegoshin final kernel image. 2162b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels" 2163b0a668fbSLeonid Yegoshin depends on SMP && CPU_MIPSR6 2164b0a668fbSLeonid Yegoshin 216507cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 216607cc0c9eSRalf Baechle bool "VPE loader support." 2167704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 216807cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 216907cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 217007cc0c9eSRalf Baechle select MIPS_MT 217107cc0c9eSRalf Baechle help 217207cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 217307cc0c9eSRalf Baechle onto another VPE and running it. 2174f088fc84SRalf Baechle 217517a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 217617a1d523SDeng-Cheng Zhu bool 217717a1d523SDeng-Cheng Zhu default "y" 217817a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 217917a1d523SDeng-Cheng Zhu 21801a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 21811a2a6d7eSDeng-Cheng Zhu bool 21821a2a6d7eSDeng-Cheng Zhu default "y" 21831a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 21841a2a6d7eSDeng-Cheng Zhu 2185e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2186e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2187e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2188e01402b1SRalf Baechle default y 2189e01402b1SRalf Baechle help 2190e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2191e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2192e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2193e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2194e01402b1SRalf Baechle 2195e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2196e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2197e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 21985e83d430SRalf Baechle help 2199e01402b1SRalf Baechle 2200da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2201da615cf6SDeng-Cheng Zhu bool 2202da615cf6SDeng-Cheng Zhu default "y" 2203da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2204da615cf6SDeng-Cheng Zhu 22052c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 22062c973ef0SDeng-Cheng Zhu bool 22072c973ef0SDeng-Cheng Zhu default "y" 22082c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 22092c973ef0SDeng-Cheng Zhu 22104a16ff4cSRalf Baechleconfig MIPS_CMP 22115cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 2212b633648cSRalf Baechle depends on SYS_SUPPORTS_MIPS_CMP 221372e20142SPaul Burton select MIPS_GIC_IPI 2214b10b43baSMarkos Chandras select SMP 2215eb9b5141STim Anderson select SYNC_R4K 2216b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 22174a16ff4cSRalf Baechle select WEAK_ORDERING 22184a16ff4cSRalf Baechle default n 22194a16ff4cSRalf Baechle help 2220044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2221044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2222044505c7SPaul Burton its ability to start secondary CPUs. 22234a16ff4cSRalf Baechle 22245cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 22255cac93b3SPaul Burton instead of this. 22265cac93b3SPaul Burton 22270ee958e1SPaul Burtonconfig MIPS_CPS 22280ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 22296ca716f2SMarkos Chandras depends on SYS_SUPPORTS_MIPS_CPS && !64BIT 22300ee958e1SPaul Burton select MIPS_CM 22310ee958e1SPaul Burton select MIPS_CPC 22321d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 22330ee958e1SPaul Burton select MIPS_GIC_IPI 22340ee958e1SPaul Burton select SMP 22350ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 22361d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 22370ee958e1SPaul Burton select SYS_SUPPORTS_SMP 22380ee958e1SPaul Burton select WEAK_ORDERING 22390ee958e1SPaul Burton help 22400ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 22410ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 22420ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 22430ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 22440ee958e1SPaul Burton support is unavailable. 22450ee958e1SPaul Burton 22463179d37eSPaul Burtonconfig MIPS_CPS_PM 224739a59593SMarkos Chandras depends on MIPS_CPS 2248a8b84677SPaul Burton select MIPS_CPC 22493179d37eSPaul Burton bool 22503179d37eSPaul Burton 225172e20142SPaul Burtonconfig MIPS_GIC_IPI 225272e20142SPaul Burton bool 225372e20142SPaul Burton 22549f98f3ddSPaul Burtonconfig MIPS_CM 22559f98f3ddSPaul Burton bool 22569f98f3ddSPaul Burton 22579c38cf44SPaul Burtonconfig MIPS_CPC 22589c38cf44SPaul Burton bool 22592600990eSRalf Baechle 22601da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS 22611da177e4SLinus Torvalds bool 22621da177e4SLinus Torvalds depends on CPU_SB1_PASS_1 22631da177e4SLinus Torvalds default y 22641da177e4SLinus Torvalds 22651da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 22661da177e4SLinus Torvalds bool 22671da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 22681da177e4SLinus Torvalds default y 22691da177e4SLinus Torvalds 22701da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 22711da177e4SLinus Torvalds bool 22721da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 22731da177e4SLinus Torvalds default y 22741da177e4SLinus Torvalds 22752235a54dSSanjay Lal 227660ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 227734adb28dSRalf Baechle bool 227860ec6571Spascal@pabr.org 22799e2b5372SMarkos Chandraschoice 22809e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 22819e2b5372SMarkos Chandras 22829e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 22839e2b5372SMarkos Chandras bool "None" 22849e2b5372SMarkos Chandras help 22859e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 22869e2b5372SMarkos Chandras 22879693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 22889693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 22899e2b5372SMarkos Chandras bool "SmartMIPS" 22909693a853SFranck Bui-Huu help 22919693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 22929693a853SFranck Bui-Huu increased security at both hardware and software level for 22939693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 22949693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 22959693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 22969693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 22979693a853SFranck Bui-Huu here. 22989693a853SFranck Bui-Huu 2299bce86083SSteven J. Hillconfig CPU_MICROMIPS 23007fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 23019e2b5372SMarkos Chandras bool "microMIPS" 2302bce86083SSteven J. Hill help 2303bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2304bce86083SSteven J. Hill microMIPS ISA 2305bce86083SSteven J. Hill 23069e2b5372SMarkos Chandrasendchoice 23079e2b5372SMarkos Chandras 2308a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 23094af94d5dSPaul Burton bool "Support for the MIPS SIMD Architecture (EXPERIMENTAL)" 2310a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 23112a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2312a5e9a69eSPaul Burton help 2313a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2314a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 23151db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 23161db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 23171db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 23181db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 23191db1af84SPaul Burton the size & complexity of your kernel. 2320a5e9a69eSPaul Burton 2321a5e9a69eSPaul Burton If unsure, say Y. 2322a5e9a69eSPaul Burton 23231da177e4SLinus Torvaldsconfig CPU_HAS_WB 2324f7062ddbSRalf Baechle bool 2325e01402b1SRalf Baechle 2326df0ac8a4SKevin Cernekeeconfig XKS01 2327df0ac8a4SKevin Cernekee bool 2328df0ac8a4SKevin Cernekee 2329f41ae0b2SRalf Baechle# 2330f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2331f41ae0b2SRalf Baechle# 2332e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2333f41ae0b2SRalf Baechle bool 2334e01402b1SRalf Baechle 2335f41ae0b2SRalf Baechle# 2336f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2337f41ae0b2SRalf Baechle# 2338e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2339f41ae0b2SRalf Baechle bool 2340e01402b1SRalf Baechle 23411da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 23421da177e4SLinus Torvalds bool 23431da177e4SLinus Torvalds depends on !CPU_R3000 23441da177e4SLinus Torvalds default y 23451da177e4SLinus Torvalds 23461da177e4SLinus Torvalds# 234720d60d99SMaciej W. Rozycki# CPU non-features 234820d60d99SMaciej W. Rozycki# 234920d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 235020d60d99SMaciej W. Rozycki bool 235120d60d99SMaciej W. Rozycki 235220d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 235320d60d99SMaciej W. Rozycki bool 235420d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 235520d60d99SMaciej W. Rozycki 235620d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 235720d60d99SMaciej W. Rozycki bool 235820d60d99SMaciej W. Rozycki 235920d60d99SMaciej W. Rozycki# 23601da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 23611da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 23621da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 23631da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 23641da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 23651da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 23661da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 23671da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2368797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2369797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2370797798c1SRalf Baechle# support. 23711da177e4SLinus Torvalds# 23721da177e4SLinus Torvaldsconfig HIGHMEM 23731da177e4SLinus Torvalds bool "High Memory Support" 2374a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2375797798c1SRalf Baechle 2376797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2377797798c1SRalf Baechle bool 2378797798c1SRalf Baechle 2379797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2380797798c1SRalf Baechle bool 23811da177e4SLinus Torvalds 23829693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 23839693a853SFranck Bui-Huu bool 23849693a853SFranck Bui-Huu 2385a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2386a6a4834cSSteven J. Hill bool 2387a6a4834cSSteven J. Hill 2388377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2389377cb1b6SRalf Baechle bool 2390377cb1b6SRalf Baechle help 2391377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2392377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2393377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2394377cb1b6SRalf Baechle 2395a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2396a5e9a69eSPaul Burton bool 2397a5e9a69eSPaul Burton 2398b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2399b4819b59SYoichi Yuasa def_bool y 2400f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2401b4819b59SYoichi Yuasa 2402d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2403d8cb4e11SRalf Baechle bool 2404d8cb4e11SRalf Baechle default y if SGI_IP27 2405d8cb4e11SRalf Baechle help 24063dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2407d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2408d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2409d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2410d8cb4e11SRalf Baechle 2411b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2412b1c6cd42SAtsushi Nemoto bool 24137de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 241431473747SAtsushi Nemoto 2415d8cb4e11SRalf Baechleconfig NUMA 2416d8cb4e11SRalf Baechle bool "NUMA Support" 2417d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2418d8cb4e11SRalf Baechle help 2419d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2420d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2421d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2422d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2423d8cb4e11SRalf Baechle disabled. 2424d8cb4e11SRalf Baechle 2425d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2426d8cb4e11SRalf Baechle bool 2427d8cb4e11SRalf Baechle 2428c80d79d7SYasunori Gotoconfig NODES_SHIFT 2429c80d79d7SYasunori Goto int 2430c80d79d7SYasunori Goto default "6" 2431c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2432c80d79d7SYasunori Goto 243314f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 243414f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 2435f14ceff7SHuacai Chen depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) 243614f70012SDeng-Cheng Zhu default y 243714f70012SDeng-Cheng Zhu help 243814f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 243914f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 244014f70012SDeng-Cheng Zhu 2441b4819b59SYoichi Yuasasource "mm/Kconfig" 2442b4819b59SYoichi Yuasa 24431da177e4SLinus Torvaldsconfig SMP 24441da177e4SLinus Torvalds bool "Multi-Processing support" 2445e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2446e73ea273SRalf Baechle help 24471da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 24484a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 24494a474157SRobert Graffham than one CPU, say Y. 24501da177e4SLinus Torvalds 24514a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 24521da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 24531da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 24544a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 24551da177e4SLinus Torvalds will run faster if you say N here. 24561da177e4SLinus Torvalds 24571da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 24581da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 24591da177e4SLinus Torvalds 246003502faaSAdrian Bunk See also the SMP-HOWTO available at 246103502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 24621da177e4SLinus Torvalds 24631da177e4SLinus Torvalds If you don't know what to do here, say N. 24641da177e4SLinus Torvalds 246587353d8aSRalf Baechleconfig SMP_UP 246687353d8aSRalf Baechle bool 246787353d8aSRalf Baechle 24684a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 24694a16ff4cSRalf Baechle bool 24704a16ff4cSRalf Baechle 24710ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 24720ee958e1SPaul Burton bool 24730ee958e1SPaul Burton 2474e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2475e73ea273SRalf Baechle bool 2476e73ea273SRalf Baechle 2477130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2478130e2fb7SRalf Baechle bool 2479130e2fb7SRalf Baechle 2480130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2481130e2fb7SRalf Baechle bool 2482130e2fb7SRalf Baechle 2483130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2484130e2fb7SRalf Baechle bool 2485130e2fb7SRalf Baechle 2486130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2487130e2fb7SRalf Baechle bool 2488130e2fb7SRalf Baechle 2489130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2490130e2fb7SRalf Baechle bool 2491130e2fb7SRalf Baechle 24921da177e4SLinus Torvaldsconfig NR_CPUS 2493a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2494a91796a9SJayachandran C range 2 256 24951da177e4SLinus Torvalds depends on SMP 2496130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2497130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2498130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2499130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2500130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 25011da177e4SLinus Torvalds help 25021da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 25031da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 25041da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 250572ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 250672ede9b1SAtsushi Nemoto and 2 for all others. 25071da177e4SLinus Torvalds 25081da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 250972ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 251072ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 251172ede9b1SAtsushi Nemoto power of two. 25121da177e4SLinus Torvalds 2513399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2514399aaa25SAl Cooper bool 2515399aaa25SAl Cooper 25161723b4a3SAtsushi Nemoto# 25171723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 25181723b4a3SAtsushi Nemoto# 25191723b4a3SAtsushi Nemoto 25201723b4a3SAtsushi Nemotochoice 25211723b4a3SAtsushi Nemoto prompt "Timer frequency" 25221723b4a3SAtsushi Nemoto default HZ_250 25231723b4a3SAtsushi Nemoto help 25241723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 25251723b4a3SAtsushi Nemoto 25261723b4a3SAtsushi Nemoto config HZ_48 25270f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 25281723b4a3SAtsushi Nemoto 25291723b4a3SAtsushi Nemoto config HZ_100 25301723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 25311723b4a3SAtsushi Nemoto 25321723b4a3SAtsushi Nemoto config HZ_128 25331723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 25341723b4a3SAtsushi Nemoto 25351723b4a3SAtsushi Nemoto config HZ_250 25361723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 25371723b4a3SAtsushi Nemoto 25381723b4a3SAtsushi Nemoto config HZ_256 25391723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 25401723b4a3SAtsushi Nemoto 25411723b4a3SAtsushi Nemoto config HZ_1000 25421723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 25431723b4a3SAtsushi Nemoto 25441723b4a3SAtsushi Nemoto config HZ_1024 25451723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 25461723b4a3SAtsushi Nemoto 25471723b4a3SAtsushi Nemotoendchoice 25481723b4a3SAtsushi Nemoto 25491723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 25501723b4a3SAtsushi Nemoto bool 25511723b4a3SAtsushi Nemoto 25521723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 25531723b4a3SAtsushi Nemoto bool 25541723b4a3SAtsushi Nemoto 25551723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 25561723b4a3SAtsushi Nemoto bool 25571723b4a3SAtsushi Nemoto 25581723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 25591723b4a3SAtsushi Nemoto bool 25601723b4a3SAtsushi Nemoto 25611723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 25621723b4a3SAtsushi Nemoto bool 25631723b4a3SAtsushi Nemoto 25641723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 25651723b4a3SAtsushi Nemoto bool 25661723b4a3SAtsushi Nemoto 25671723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 25681723b4a3SAtsushi Nemoto bool 25691723b4a3SAtsushi Nemoto 25701723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 25711723b4a3SAtsushi Nemoto bool 25721723b4a3SAtsushi Nemoto default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \ 25731723b4a3SAtsushi Nemoto !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \ 25741723b4a3SAtsushi Nemoto !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \ 25751723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 25761723b4a3SAtsushi Nemoto 25771723b4a3SAtsushi Nemotoconfig HZ 25781723b4a3SAtsushi Nemoto int 25791723b4a3SAtsushi Nemoto default 48 if HZ_48 25801723b4a3SAtsushi Nemoto default 100 if HZ_100 25811723b4a3SAtsushi Nemoto default 128 if HZ_128 25821723b4a3SAtsushi Nemoto default 250 if HZ_250 25831723b4a3SAtsushi Nemoto default 256 if HZ_256 25841723b4a3SAtsushi Nemoto default 1000 if HZ_1000 25851723b4a3SAtsushi Nemoto default 1024 if HZ_1024 25861723b4a3SAtsushi Nemoto 258796685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 258896685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 258996685b17SDeng-Cheng Zhu 2590e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 25911da177e4SLinus Torvalds 2592ea6e942bSAtsushi Nemotoconfig KEXEC 25937d60717eSKees Cook bool "Kexec system call" 2594ea6e942bSAtsushi Nemoto help 2595ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2596ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 25973dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2598ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2599ea6e942bSAtsushi Nemoto 260001dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2601ea6e942bSAtsushi Nemoto 2602ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2603ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2604bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2605bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2606bf220695SGeert Uytterhoeven made. 2607ea6e942bSAtsushi Nemoto 26087aa1c8f4SRalf Baechleconfig CRASH_DUMP 26097aa1c8f4SRalf Baechle bool "Kernel crash dumps" 26107aa1c8f4SRalf Baechle help 26117aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 26127aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 26137aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 26147aa1c8f4SRalf Baechle a specially reserved region and then later executed after 26157aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 26167aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 26177aa1c8f4SRalf Baechle PHYSICAL_START. 26187aa1c8f4SRalf Baechle 26197aa1c8f4SRalf Baechleconfig PHYSICAL_START 26207aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 26217aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 26227aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 26237aa1c8f4SRalf Baechle depends on CRASH_DUMP 26247aa1c8f4SRalf Baechle help 26257aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 26267aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 26277aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 26287aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 26297aa1c8f4SRalf Baechle passed to the panic-ed kernel). 26307aa1c8f4SRalf Baechle 2631ea6e942bSAtsushi Nemotoconfig SECCOMP 2632ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2633293c5bd1SRalf Baechle depends on PROC_FS 2634ea6e942bSAtsushi Nemoto default y 2635ea6e942bSAtsushi Nemoto help 2636ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2637ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2638ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2639ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2640ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2641ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2642ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2643ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2644ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2645ea6e942bSAtsushi Nemoto 2646ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2647ea6e942bSAtsushi Nemoto 2648597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 264906e2e882SPaul Burton bool "Support for O32 binaries using 64-bit FP (EXPERIMENTAL)" 2650597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2651597ce172SPaul Burton help 2652597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2653597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2654597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2655597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2656597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2657597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2658597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2659597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2660597ce172SPaul Burton saying N here. 2661597ce172SPaul Burton 266206e2e882SPaul Burton Although binutils currently supports use of this flag the details 266306e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 266406e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 266506e2e882SPaul Burton behaviour before the details have been finalised, this option should 266606e2e882SPaul Burton be considered experimental and only enabled by those working upon 266706e2e882SPaul Burton said details. 266806e2e882SPaul Burton 266906e2e882SPaul Burton If unsure, say N. 2670597ce172SPaul Burton 2671f2ffa5abSDezhong Diaoconfig USE_OF 26720b3e06fdSJonas Gorski bool 2673f2ffa5abSDezhong Diao select OF 2674e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2675abd2363fSGrant Likely select IRQ_DOMAIN 2676f2ffa5abSDezhong Diao 26777fafb068SAndrew Brestickerconfig BUILTIN_DTB 26787fafb068SAndrew Bresticker bool 26797fafb068SAndrew Bresticker 26801da8f179SJonas Gorskichoice 26811da8f179SJonas Gorski prompt "Kernel appended dtb support" if OF 26821da8f179SJonas Gorski default MIPS_NO_APPENDED_DTB 26831da8f179SJonas Gorski 26841da8f179SJonas Gorski config MIPS_NO_APPENDED_DTB 26851da8f179SJonas Gorski bool "None" 26861da8f179SJonas Gorski help 26871da8f179SJonas Gorski Do not enable appended dtb support. 26881da8f179SJonas Gorski 26891da8f179SJonas Gorski config MIPS_RAW_APPENDED_DTB 26901da8f179SJonas Gorski bool "vmlinux.bin" 26911da8f179SJonas Gorski help 26921da8f179SJonas Gorski With this option, the boot code will look for a device tree binary 26931da8f179SJonas Gorski DTB) appended to raw vmlinux.bin (without decompressor). 26941da8f179SJonas Gorski (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). 26951da8f179SJonas Gorski 26961da8f179SJonas Gorski This is meant as a backward compatibility convenience for those 26971da8f179SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 26981da8f179SJonas Gorski the documented boot protocol using a device tree. 26991da8f179SJonas Gorski 27001da8f179SJonas Gorski Beware that there is very little in terms of protection against 27011da8f179SJonas Gorski this option being confused by leftover garbage in memory that might 27021da8f179SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 27031da8f179SJonas Gorski to vmlinux.bin. Do not leave this option active in a production kernel 27041da8f179SJonas Gorski if you don't intend to always append a DTB. 2705*c0b4e101SJonas Gorski 2706*c0b4e101SJonas Gorski config MIPS_ZBOOT_APPENDED_DTB 2707*c0b4e101SJonas Gorski bool "vmlinuz.bin" 2708*c0b4e101SJonas Gorski depends on SYS_SUPPORTS_ZBOOT 2709*c0b4e101SJonas Gorski help 2710*c0b4e101SJonas Gorski With this option, the boot code will look for a device tree binary 2711*c0b4e101SJonas Gorski DTB) appended to raw vmlinuz.bin (with decompressor). 2712*c0b4e101SJonas Gorski (e.g. cat vmlinuz.bin <filename>.dtb > vmlinuz_w_dtb). 2713*c0b4e101SJonas Gorski 2714*c0b4e101SJonas Gorski This is meant as a backward compatibility convenience for those 2715*c0b4e101SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 2716*c0b4e101SJonas Gorski the documented boot protocol using a device tree. 2717*c0b4e101SJonas Gorski 2718*c0b4e101SJonas Gorski Beware that there is very little in terms of protection against 2719*c0b4e101SJonas Gorski this option being confused by leftover garbage in memory that might 2720*c0b4e101SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 2721*c0b4e101SJonas Gorski to vmlinuz.bin. Do not leave this option active in a production kernel 2722*c0b4e101SJonas Gorski if you don't intend to always append a DTB. 27231da8f179SJonas Gorskiendchoice 27241da8f179SJonas Gorski 27255e83d430SRalf Baechleendmenu 27265e83d430SRalf Baechle 27271df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 27281df0f0ffSAtsushi Nemoto bool 27291df0f0ffSAtsushi Nemoto default y 27301df0f0ffSAtsushi Nemoto 27311df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 27321df0f0ffSAtsushi Nemoto bool 27331df0f0ffSAtsushi Nemoto default y 27341df0f0ffSAtsushi Nemoto 2735a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS 2736a728ab52SKirill A. Shutemov int 2737a728ab52SKirill A. Shutemov default 3 if 64BIT && !PAGE_SIZE_64KB 2738a728ab52SKirill A. Shutemov default 2 2739a728ab52SKirill A. Shutemov 2740b6c3539bSRalf Baechlesource "init/Kconfig" 2741b6c3539bSRalf Baechle 2742dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2743dc52ddc0SMatt Helsley 27441da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 27451da177e4SLinus Torvalds 27465e83d430SRalf Baechleconfig HW_HAS_EISA 27475e83d430SRalf Baechle bool 27481da177e4SLinus Torvaldsconfig HW_HAS_PCI 27491da177e4SLinus Torvalds bool 27501da177e4SLinus Torvalds 27511da177e4SLinus Torvaldsconfig PCI 27521da177e4SLinus Torvalds bool "Support for PCI controller" 27531da177e4SLinus Torvalds depends on HW_HAS_PCI 2754abb4ae46SRalf Baechle select PCI_DOMAINS 27550f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 27561da177e4SLinus Torvalds help 27571da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 27581da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 27591da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 27601da177e4SLinus Torvalds say Y, otherwise N. 27611da177e4SLinus Torvalds 27620e476d91SHuacai Chenconfig HT_PCI 27630e476d91SHuacai Chen bool "Support for HT-linked PCI" 27640e476d91SHuacai Chen default y 27650e476d91SHuacai Chen depends on CPU_LOONGSON3 27660e476d91SHuacai Chen select PCI 27670e476d91SHuacai Chen select PCI_DOMAINS 27680e476d91SHuacai Chen help 27690e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 27700e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 27710e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 27720e476d91SHuacai Chen 27731da177e4SLinus Torvaldsconfig PCI_DOMAINS 27741da177e4SLinus Torvalds bool 27751da177e4SLinus Torvalds 27761da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 27771da177e4SLinus Torvalds 27783f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig" 27793f787ca4SJonas Gorski 27801da177e4SLinus Torvalds# 27811da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 27821da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 27831da177e4SLinus Torvalds# users to choose the right thing ... 27841da177e4SLinus Torvalds# 27851da177e4SLinus Torvaldsconfig ISA 27861da177e4SLinus Torvalds bool 27871da177e4SLinus Torvalds 27881da177e4SLinus Torvaldsconfig EISA 27891da177e4SLinus Torvalds bool "EISA support" 27905e83d430SRalf Baechle depends on HW_HAS_EISA 27911da177e4SLinus Torvalds select ISA 2792aa414dffSRalf Baechle select GENERIC_ISA_DMA 27931da177e4SLinus Torvalds ---help--- 27941da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 27951da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 27961da177e4SLinus Torvalds 27971da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 27981da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 27991da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 28001da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 28011da177e4SLinus Torvalds 28021da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 28031da177e4SLinus Torvalds 28041da177e4SLinus Torvalds Otherwise, say N. 28051da177e4SLinus Torvalds 28061da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 28071da177e4SLinus Torvalds 28081da177e4SLinus Torvaldsconfig TC 28091da177e4SLinus Torvalds bool "TURBOchannel support" 28101da177e4SLinus Torvalds depends on MACH_DECSTATION 28111da177e4SLinus Torvalds help 281250a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 281350a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 281450a23e6eSJustin P. Mattock at: 281550a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 281650a23e6eSJustin P. Mattock and: 281750a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 281850a23e6eSJustin P. Mattock Linux driver support status is documented at: 281950a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 28201da177e4SLinus Torvalds 28211da177e4SLinus Torvaldsconfig MMU 28221da177e4SLinus Torvalds bool 28231da177e4SLinus Torvalds default y 28241da177e4SLinus Torvalds 2825d865bea4SRalf Baechleconfig I8253 2826d865bea4SRalf Baechle bool 2827798778b8SRussell King select CLKSRC_I8253 28282d02612fSThomas Gleixner select CLKEVT_I8253 28299726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 2830d865bea4SRalf Baechle 2831e05eb3f8SRalf Baechleconfig ZONE_DMA 2832e05eb3f8SRalf Baechle bool 2833e05eb3f8SRalf Baechle 2834cce335aeSRalf Baechleconfig ZONE_DMA32 2835cce335aeSRalf Baechle bool 2836cce335aeSRalf Baechle 28371da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 28381da177e4SLinus Torvalds 28391da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig" 28401da177e4SLinus Torvalds 2841388b78adSAlexandre Bounineconfig RAPIDIO 284256abde72SAlexandre Bounine tristate "RapidIO support" 2843388b78adSAlexandre Bounine depends on PCI 2844388b78adSAlexandre Bounine default n 2845388b78adSAlexandre Bounine help 2846388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 2847388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 2848388b78adSAlexandre Bounine 2849388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 2850388b78adSAlexandre Bounine 28511da177e4SLinus Torvaldsendmenu 28521da177e4SLinus Torvalds 28531da177e4SLinus Torvaldsmenu "Executable file formats" 28541da177e4SLinus Torvalds 28551da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 28561da177e4SLinus Torvalds 28571da177e4SLinus Torvaldsconfig TRAD_SIGNALS 28581da177e4SLinus Torvalds bool 28591da177e4SLinus Torvalds 28601da177e4SLinus Torvaldsconfig MIPS32_COMPAT 286178aaf956SRalf Baechle bool 28621da177e4SLinus Torvalds 28631da177e4SLinus Torvaldsconfig COMPAT 28641da177e4SLinus Torvalds bool 28651da177e4SLinus Torvalds 286605e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 286705e43966SAtsushi Nemoto bool 286805e43966SAtsushi Nemoto 28691da177e4SLinus Torvaldsconfig MIPS32_O32 28701da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 287178aaf956SRalf Baechle depends on 64BIT 287278aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 287378aaf956SRalf Baechle select COMPAT 287478aaf956SRalf Baechle select MIPS32_COMPAT 287578aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 28761da177e4SLinus Torvalds help 28771da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 28781da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 28791da177e4SLinus Torvalds existing binaries are in this format. 28801da177e4SLinus Torvalds 28811da177e4SLinus Torvalds If unsure, say Y. 28821da177e4SLinus Torvalds 28831da177e4SLinus Torvaldsconfig MIPS32_N32 28841da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 2885c22eacfeSRalf Baechle depends on 64BIT 288678aaf956SRalf Baechle select COMPAT 288778aaf956SRalf Baechle select MIPS32_COMPAT 288878aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 28891da177e4SLinus Torvalds help 28901da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 28911da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 28921da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 28931da177e4SLinus Torvalds cases. 28941da177e4SLinus Torvalds 28951da177e4SLinus Torvalds If unsure, say N. 28961da177e4SLinus Torvalds 28971da177e4SLinus Torvaldsconfig BINFMT_ELF32 28981da177e4SLinus Torvalds bool 28991da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 29001da177e4SLinus Torvalds 29012116245eSRalf Baechleendmenu 29021da177e4SLinus Torvalds 29032116245eSRalf Baechlemenu "Power management options" 2904952fa954SRodolfo Giometti 2905363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 2906363c55caSWu Zhangjin def_bool y 29073f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2908363c55caSWu Zhangjin 2909f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 2910f4cb5700SJohannes Berg def_bool y 29113f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2912f4cb5700SJohannes Berg 29132116245eSRalf Baechlesource "kernel/power/Kconfig" 2914952fa954SRodolfo Giometti 29151da177e4SLinus Torvaldsendmenu 29161da177e4SLinus Torvalds 29177a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 29187a998935SViresh Kumar bool 29197a998935SViresh Kumar 29207a998935SViresh Kumarmenu "CPU Power Management" 2921c095ebafSPaul Burton 2922c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 29237a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 29247a998935SViresh Kumarendif 29259726b43aSWu Zhangjin 2926c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 2927c095ebafSPaul Burton 2928c095ebafSPaul Burtonendmenu 2929c095ebafSPaul Burton 2930d5950b43SSam Ravnborgsource "net/Kconfig" 2931d5950b43SSam Ravnborg 29321da177e4SLinus Torvaldssource "drivers/Kconfig" 29331da177e4SLinus Torvalds 293498cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 293598cdee0eSRalf Baechle 29361da177e4SLinus Torvaldssource "fs/Kconfig" 29371da177e4SLinus Torvalds 29381da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 29391da177e4SLinus Torvalds 29401da177e4SLinus Torvaldssource "security/Kconfig" 29411da177e4SLinus Torvalds 29421da177e4SLinus Torvaldssource "crypto/Kconfig" 29431da177e4SLinus Torvalds 29441da177e4SLinus Torvaldssource "lib/Kconfig" 29452235a54dSSanjay Lal 29462235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 2947