xref: /linux/arch/mips/Kconfig (revision bb877e96bea1f411106bdc639ce6858095775c3a)
11da177e4SLinus Torvaldsconfig MIPS
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
4a862a426SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
5393c1262SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
6c3fc5cd5SRalf Baechle	select HAVE_CONTEXT_TRACKING
7f8ac0425SYoichi Yuasa	select HAVE_GENERIC_DMA_COHERENT
8ec7748b5SSam Ravnborg	select HAVE_IDE
942d4b839SMathieu Desnoyers	select HAVE_OPROFILE
107f788d2dSDeng-Cheng Zhu	select HAVE_PERF_EVENTS
117f788d2dSDeng-Cheng Zhu	select PERF_USE_VMALLOC
1288547001SJason Wessel	select HAVE_ARCH_KGDB
13490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
14c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
153f5fdb4bSMarkos Chandras	select HAVE_BPF_JIT if !CPU_MICROMIPS
167563bbf8SMark Brown	select ARCH_HAVE_CUSTOM_GPIO_H
17d2bb0762SWu Zhangjin	select HAVE_FUNCTION_TRACER
18538f1952SWu Zhangjin	select HAVE_DYNAMIC_FTRACE
19538f1952SWu Zhangjin	select HAVE_FTRACE_MCOUNT_RECORD
2064575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
2129c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
22c1bf207dSDavid Daney	select HAVE_KPROBES
23c1bf207dSDavid Daney	select HAVE_KRETPROBES
24b69ec42bSCatalin Marinas	select HAVE_DEBUG_KMEMLEAK
251d7bf993SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
26e26d196cSDavid Daney	select ARCH_BINFMT_ELF_RANDOMIZE_PIE
27383c97b4SBen Hutchings	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
2821a41faaSWu Zhangjin	select RTC_LIB if !MACH_LOONGSON
292b78920dSDeng-Cheng Zhu	select GENERIC_ATOMIC64 if !64BIT
307463449bSCatalin Marinas	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
3148e1fd5aSDavid Daney	select HAVE_DMA_ATTRS
32f4649382SZubair Lutfullah Kakakhel	select HAVE_DMA_CONTIGUOUS
3348e1fd5aSDavid Daney	select HAVE_DMA_API_DEBUG
343bd27e32SDavid Daney	select GENERIC_IRQ_PROBE
35f8396c17SThomas Gleixner	select GENERIC_IRQ_SHOW
3678857614SMarkos Chandras	select GENERIC_PCI_IOMAP
3794bb0c1aSDavid Daney	select HAVE_ARCH_JUMP_LABEL
38c1d7e01dSWill Deacon	select ARCH_WANT_IPC_PARSE_VERSION
390f462e3cSThomas Gleixner	select IRQ_FORCED_THREADING
409d15ffc8STejun Heo	select HAVE_MEMBLOCK
419d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
429d15ffc8STejun Heo	select ARCH_DISCARD_MEMBLOCK
43360014a3SThomas Gleixner	select GENERIC_SMP_IDLE_THREAD
444b054495SDavid Daney	select BUILDTIME_EXTABLE_SORT
45cde1794bSAnna-Maria Gleixner	select GENERIC_CLOCKEVENTS
46cde1794bSAnna-Maria Gleixner	select GENERIC_CMOS_UPDATE
47786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
484febd95aSStephen Rothwell	select VIRT_TO_BUS
492f12fb20SJoshua Kinard	select MODULES_USE_ELF_REL if MODULES
502f12fb20SJoshua Kinard	select MODULES_USE_ELF_RELA if MODULES && 64BIT
5150150d2bSAl Viro	select CLONE_BACKWARDS
52d1a1dc0bSDave Hansen	select HAVE_DEBUG_STACKOVERFLOW
5319952a92SKees Cook	select HAVE_CC_STACKPROTECTOR
54b1d4c6caSJames Hogan	select CPU_PM if CPU_IDLE
55cc7964afSPaul Burton	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
5690cee759SPaul Burton	select ARCH_BINFMT_ELF_STATE
57d79d853dSMarkos Chandras	select SYSCTL_EXCEPTION_TRACE
58*bb877e96SDeng-Cheng Zhu	select HAVE_VIRT_CPU_ACCOUNTING_GEN
591da177e4SLinus Torvalds
601da177e4SLinus Torvaldsmenu "Machine selection"
611da177e4SLinus Torvalds
625e83d430SRalf Baechlechoice
635e83d430SRalf Baechle	prompt "System type"
645e83d430SRalf Baechle	default SGI_IP22
651da177e4SLinus Torvalds
6642a4f17dSManuel Laussconfig MIPS_ALCHEMY
67c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
6834adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
69f772cdb2SRalf Baechle	select CEVT_R4K
70d7ea335cSSteven J. Hill	select CSRC_R4K
7142a4f17dSManuel Lauss	select IRQ_CPU
7288e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
7342a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
7442a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
7542a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
76efb12436SAlexandre Courbot	select ARCH_REQUIRE_GPIOLIB
771b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
7847440229SManuel Lauss	select COMMON_CLK
791da177e4SLinus Torvalds
807ca5dc14SFlorian Fainelliconfig AR7
817ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
827ca5dc14SFlorian Fainelli	select BOOT_ELF32
837ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
847ca5dc14SFlorian Fainelli	select CEVT_R4K
857ca5dc14SFlorian Fainelli	select CSRC_R4K
867ca5dc14SFlorian Fainelli	select IRQ_CPU
877ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
887ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
897ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
907ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
917ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
927ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
93377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
941b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
955f3c9098SFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
967ca5dc14SFlorian Fainelli	select VLYNQ
978551fb64SYoichi Yuasa	select HAVE_CLK
987ca5dc14SFlorian Fainelli	help
997ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
1007ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
1017ca5dc14SFlorian Fainelli
10243cc739fSSergey Ryazanovconfig ATH25
10343cc739fSSergey Ryazanov	bool "Atheros AR231x/AR531x SoC support"
10443cc739fSSergey Ryazanov	select CEVT_R4K
10543cc739fSSergey Ryazanov	select CSRC_R4K
10643cc739fSSergey Ryazanov	select DMA_NONCOHERENT
10743cc739fSSergey Ryazanov	select IRQ_CPU
1081753e74eSSergey Ryazanov	select IRQ_DOMAIN
10943cc739fSSergey Ryazanov	select SYS_HAS_CPU_MIPS32_R1
11043cc739fSSergey Ryazanov	select SYS_SUPPORTS_BIG_ENDIAN
11143cc739fSSergey Ryazanov	select SYS_SUPPORTS_32BIT_KERNEL
1128aaa7278SSergey Ryazanov	select SYS_HAS_EARLY_PRINTK
11343cc739fSSergey Ryazanov	help
11443cc739fSSergey Ryazanov	  Support for Atheros AR231x and Atheros AR531x based boards
11543cc739fSSergey Ryazanov
116d4a67d9dSGabor Juhosconfig ATH79
117d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
1186eae43c5SGabor Juhos	select ARCH_REQUIRE_GPIOLIB
119d4a67d9dSGabor Juhos	select BOOT_RAW
120d4a67d9dSGabor Juhos	select CEVT_R4K
121d4a67d9dSGabor Juhos	select CSRC_R4K
122d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
12394638067SGabor Juhos	select HAVE_CLK
1242c4f1ac5SGabor Juhos	select CLKDEV_LOOKUP
125d4a67d9dSGabor Juhos	select IRQ_CPU
1260aabf1a4SGabor Juhos	select MIPS_MACHINE
127d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
128d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
129d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
130d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
131377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
132d4a67d9dSGabor Juhos	help
133d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
134d4a67d9dSGabor Juhos
135d666cd02SKevin Cernekeeconfig BCM3384
136d666cd02SKevin Cernekee	bool "Broadcom BCM3384 based boards"
137d666cd02SKevin Cernekee	select BOOT_RAW
138d666cd02SKevin Cernekee	select NO_EXCEPT_FILL
139d666cd02SKevin Cernekee	select USE_OF
140d666cd02SKevin Cernekee	select CEVT_R4K
141d666cd02SKevin Cernekee	select CSRC_R4K
142d666cd02SKevin Cernekee	select SYNC_R4K
143d666cd02SKevin Cernekee	select COMMON_CLK
144d666cd02SKevin Cernekee	select DMA_NONCOHERENT
145d666cd02SKevin Cernekee	select IRQ_CPU
146d666cd02SKevin Cernekee	select SYS_SUPPORTS_32BIT_KERNEL
147d666cd02SKevin Cernekee	select SYS_SUPPORTS_BIG_ENDIAN
148d666cd02SKevin Cernekee	select SYS_SUPPORTS_HIGHMEM
149d666cd02SKevin Cernekee	select SYS_HAS_CPU_BMIPS5000
150d666cd02SKevin Cernekee	select SWAP_IO_SPACE
151d666cd02SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_DESC
152d666cd02SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_MMIO
153d666cd02SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_DESC
154d666cd02SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_MMIO
155d666cd02SKevin Cernekee	help
156d666cd02SKevin Cernekee	  Support for BCM3384 based boards.  BCM3384/BCM33843 is a cable modem
157d666cd02SKevin Cernekee	  chipset with a Linux application processor that is often used to
158d666cd02SKevin Cernekee	  provide Samba services, a CUPS print server, and/or advanced routing
159d666cd02SKevin Cernekee	  features.
160d666cd02SKevin Cernekee
1611c0c13ebSAurelien Jarnoconfig BCM47XX
162c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
1632da4c74dSHauke Mehrtens	select ARCH_WANT_OPTIONAL_GPIOLIB
164fe08f8c2SHauke Mehrtens	select BOOT_RAW
16542f77542SRalf Baechle	select CEVT_R4K
166940f6b48SRalf Baechle	select CSRC_R4K
1671c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
1681c0c13ebSAurelien Jarno	select HW_HAS_PCI
1691c0c13ebSAurelien Jarno	select IRQ_CPU
170314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
171dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
1721c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
1731c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
174377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
17525e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
176e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
177c949c0bcSRafał Miłecki	select GPIOLIB
178c949c0bcSRafał Miłecki	select LEDS_GPIO_REGISTER
1791c0c13ebSAurelien Jarno	help
1801c0c13ebSAurelien Jarno	 Support for BCM47XX based boards
1811c0c13ebSAurelien Jarno
182e7300d04SMaxime Bizonconfig BCM63XX
183e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
184ae8de61cSFlorian Fainelli	select BOOT_RAW
185e7300d04SMaxime Bizon	select CEVT_R4K
186e7300d04SMaxime Bizon	select CSRC_R4K
187fc264022SJonas Gorski	select SYNC_R4K
188e7300d04SMaxime Bizon	select DMA_NONCOHERENT
189e7300d04SMaxime Bizon	select IRQ_CPU
190e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
191e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
192e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
193e7300d04SMaxime Bizon	select SWAP_IO_SPACE
194e7300d04SMaxime Bizon	select ARCH_REQUIRE_GPIOLIB
1953e82eeebSYoichi Yuasa	select HAVE_CLK
196af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
197e7300d04SMaxime Bizon	help
198e7300d04SMaxime Bizon	 Support for BCM63XX based boards
199e7300d04SMaxime Bizon
2001da177e4SLinus Torvaldsconfig MIPS_COBALT
2013fa986faSMartin Michlmayr	bool "Cobalt Server"
20242f77542SRalf Baechle	select CEVT_R4K
203940f6b48SRalf Baechle	select CSRC_R4K
2041097c6acSYoichi Yuasa	select CEVT_GT641XX
2051da177e4SLinus Torvalds	select DMA_NONCOHERENT
2061da177e4SLinus Torvalds	select HW_HAS_PCI
207d865bea4SRalf Baechle	select I8253
2081da177e4SLinus Torvalds	select I8259
2091da177e4SLinus Torvalds	select IRQ_CPU
210d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
211252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
212e25bfc92SYoichi Yuasa	select PCI
2137cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
2140a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
215ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2160e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
2175e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
218e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
2191da177e4SLinus Torvalds
2201da177e4SLinus Torvaldsconfig MACH_DECSTATION
2213fa986faSMartin Michlmayr	bool "DECstations"
2221da177e4SLinus Torvalds	select BOOT_ELF32
2236457d9fcSYoichi Yuasa	select CEVT_DS1287
22481d10badSMaciej W. Rozycki	select CEVT_R4K if CPU_R4X00
2254247417dSYoichi Yuasa	select CSRC_IOASIC
22681d10badSMaciej W. Rozycki	select CSRC_R4K if CPU_R4X00
22720d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
22820d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
22920d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
2301da177e4SLinus Torvalds	select DMA_NONCOHERENT
231ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
2321da177e4SLinus Torvalds	select IRQ_CPU
2337cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
2347cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
235ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2367d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2375e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
2381723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
2391723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
2401723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
241930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
2425e83d430SRalf Baechle	help
2431da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
2441da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
2451da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
2461da177e4SLinus Torvalds
2471da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
2481da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
2491da177e4SLinus Torvalds
2501da177e4SLinus Torvalds		DECstation 5000/50
2511da177e4SLinus Torvalds		DECstation 5000/150
2521da177e4SLinus Torvalds		DECstation 5000/260
2531da177e4SLinus Torvalds		DECsystem 5900/260
2541da177e4SLinus Torvalds
2551da177e4SLinus Torvalds	  otherwise choose R3000.
2561da177e4SLinus Torvalds
2575e83d430SRalf Baechleconfig MACH_JAZZ
2583fa986faSMartin Michlmayr	bool "Jazz family of machines"
2590e2794b0SRalf Baechle	select FW_ARC
2600e2794b0SRalf Baechle	select FW_ARC32
2615e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
26242f77542SRalf Baechle	select CEVT_R4K
263940f6b48SRalf Baechle	select CSRC_R4K
264e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
2655e83d430SRalf Baechle	select GENERIC_ISA_DMA
2668a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
267ea202c63SThomas Bogendoerfer	select IRQ_CPU
268d865bea4SRalf Baechle	select I8253
2695e83d430SRalf Baechle	select I8259
2705e83d430SRalf Baechle	select ISA
2717cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
2725e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
2737d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2741723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
2751da177e4SLinus Torvalds	help
2765e83d430SRalf Baechle	 This a family of machines based on the MIPS R4030 chipset which was
2775e83d430SRalf Baechle	 used by several vendors to build RISC/os and Windows NT workstations.
278692105b8SMatt LaPlante	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
2795e83d430SRalf Baechle	 Olivetti M700-10 workstations.
2805e83d430SRalf Baechle
2815ebabe59SLars-Peter Clausenconfig MACH_JZ4740
2825ebabe59SLars-Peter Clausen	bool "Ingenic JZ4740 based machines"
2835ebabe59SLars-Peter Clausen	select SYS_HAS_CPU_MIPS32_R1
2845ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
2855ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
286f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
2875ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
2885ebabe59SLars-Peter Clausen	select IRQ_CPU
2895ebabe59SLars-Peter Clausen	select ARCH_REQUIRE_GPIOLIB
2905ebabe59SLars-Peter Clausen	select SYS_HAS_EARLY_PRINTK
291ab5330ebSMaurus Cuelenaere	select HAVE_CLK
29283bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
2935ebabe59SLars-Peter Clausen
294171bb2f1SJohn Crispinconfig LANTIQ
295171bb2f1SJohn Crispin	bool "Lantiq based platforms"
296171bb2f1SJohn Crispin	select DMA_NONCOHERENT
297171bb2f1SJohn Crispin	select IRQ_CPU
298171bb2f1SJohn Crispin	select CEVT_R4K
299171bb2f1SJohn Crispin	select CSRC_R4K
300171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
301171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
302171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
303171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
304377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
305171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
306171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
307171bb2f1SJohn Crispin	select ARCH_REQUIRE_GPIOLIB
308171bb2f1SJohn Crispin	select SWAP_IO_SPACE
309171bb2f1SJohn Crispin	select BOOT_RAW
310287e3f3fSJohn Crispin	select HAVE_MACH_CLKDEV
311287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
312a0392222SJohn Crispin	select USE_OF
3133f8c50c9SJohn Crispin	select PINCTRL
3143f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
315c530781cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
316c530781cSJohn Crispin	select RESET_CONTROLLER
317171bb2f1SJohn Crispin
3181f21d2bdSBrian Murphyconfig LASAT
3191f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
32042f77542SRalf Baechle	select CEVT_R4K
32116f0bbbcSRalf Baechle	select CRC32
322940f6b48SRalf Baechle	select CSRC_R4K
3231f21d2bdSBrian Murphy	select DMA_NONCOHERENT
3241f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
3251f21d2bdSBrian Murphy	select HW_HAS_PCI
326a5ccfe5cSRalf Baechle	select IRQ_CPU
3271f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
3281f21d2bdSBrian Murphy	select MIPS_NILE4
3291f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
3301f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
3311f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
3321f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
3331f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
3341f21d2bdSBrian Murphy
33585749d24SWu Zhangjinconfig MACH_LOONGSON
33685749d24SWu Zhangjin	bool "Loongson family of machines"
337c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
338ade299d8SYoichi Yuasa	help
33985749d24SWu Zhangjin	  This enables the support of Loongson family of machines.
34085749d24SWu Zhangjin
34185749d24SWu Zhangjin	  Loongson is a family of general-purpose MIPS-compatible CPUs.
34285749d24SWu Zhangjin	  developed at Institute of Computing Technology (ICT),
34385749d24SWu Zhangjin	  Chinese Academy of Sciences (CAS) in the People's Republic
34485749d24SWu Zhangjin	  of China. The chief architect is Professor Weiwu Hu.
345ade299d8SYoichi Yuasa
346ca585cf9SKelvin Cheungconfig MACH_LOONGSON1
347ca585cf9SKelvin Cheung	bool "Loongson 1 family of machines"
348ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
349ca585cf9SKelvin Cheung	help
350ca585cf9SKelvin Cheung	  This enables support for the Loongson 1 based machines.
351ca585cf9SKelvin Cheung
352ca585cf9SKelvin Cheung	  Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by
353ca585cf9SKelvin Cheung	  the ICT (Institute of Computing Technology) and the Chinese Academy
354ca585cf9SKelvin Cheung	  of Sciences.
355ca585cf9SKelvin Cheung
3566a438309SAndrew Brestickerconfig MACH_PISTACHIO
3576a438309SAndrew Bresticker	bool "IMG Pistachio SoC based boards"
3586a438309SAndrew Bresticker	select ARCH_REQUIRE_GPIOLIB
3596a438309SAndrew Bresticker	select BOOT_ELF32
3606a438309SAndrew Bresticker	select BOOT_RAW
3616a438309SAndrew Bresticker	select CEVT_R4K
3626a438309SAndrew Bresticker	select CLKSRC_MIPS_GIC
3636a438309SAndrew Bresticker	select COMMON_CLK
3646a438309SAndrew Bresticker	select CSRC_R4K
3656a438309SAndrew Bresticker	select DMA_MAYBE_COHERENT
3666a438309SAndrew Bresticker	select IRQ_CPU
3676a438309SAndrew Bresticker	select LIBFDT
3686a438309SAndrew Bresticker	select MFD_SYSCON
3696a438309SAndrew Bresticker	select MIPS_CPU_SCACHE
3706a438309SAndrew Bresticker	select MIPS_GIC
3716a438309SAndrew Bresticker	select PINCTRL
3726a438309SAndrew Bresticker	select REGULATOR
3736a438309SAndrew Bresticker	select SYS_HAS_CPU_MIPS32_R2
3746a438309SAndrew Bresticker	select SYS_SUPPORTS_32BIT_KERNEL
3756a438309SAndrew Bresticker	select SYS_SUPPORTS_LITTLE_ENDIAN
3766a438309SAndrew Bresticker	select SYS_SUPPORTS_MIPS_CPS
3776a438309SAndrew Bresticker	select SYS_SUPPORTS_MULTITHREADING
3786a438309SAndrew Bresticker	select SYS_SUPPORTS_ZBOOT
3796a438309SAndrew Bresticker	select USE_OF
3806a438309SAndrew Bresticker	help
3816a438309SAndrew Bresticker	  This enables support for the IMG Pistachio SoC platform.
3826a438309SAndrew Bresticker
3831da177e4SLinus Torvaldsconfig MIPS_MALTA
3843fa986faSMartin Michlmayr	bool "MIPS Malta board"
38561ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
3861da177e4SLinus Torvalds	select BOOT_ELF32
387fa71c960SRalf Baechle	select BOOT_RAW
38842f77542SRalf Baechle	select CEVT_R4K
389940f6b48SRalf Baechle	select CSRC_R4K
390fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
391885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
3921da177e4SLinus Torvalds	select GENERIC_ISA_DMA
3938a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
394aa414dffSRalf Baechle	select IRQ_CPU
3958a19b8f1SAndrew Bresticker	select MIPS_GIC
3961da177e4SLinus Torvalds	select HW_HAS_PCI
397d865bea4SRalf Baechle	select I8253
3981da177e4SLinus Torvalds	select I8259
3995e83d430SRalf Baechle	select MIPS_BONITO64
4009318c51aSChris Dearman	select MIPS_CPU_SCACHE
401a7ef1eadSKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
402252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
4035e83d430SRalf Baechle	select MIPS_MSC
4041da177e4SLinus Torvalds	select SWAP_IO_SPACE
4057cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
4067cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
407bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
408575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R6
4097cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
4105d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
411575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS64_R6
4127cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
4137cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
414ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
415ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
4165e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
4175e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
418424ebcdfSMaciej W. Rozycki	select SYS_SUPPORTS_MICROMIPS
4190365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
420e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
421377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
422f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
4239693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
4241b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
4251da177e4SLinus Torvalds	help
426f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
4271da177e4SLinus Torvalds	  board.
4281da177e4SLinus Torvalds
429ec47b274SSteven J. Hillconfig MIPS_SEAD3
430ec47b274SSteven J. Hill	bool "MIPS SEAD3 board"
431ec47b274SSteven J. Hill	select BOOT_ELF32
432ec47b274SSteven J. Hill	select BOOT_RAW
433f262b5f2SAndrew Bresticker	select BUILTIN_DTB
434ec47b274SSteven J. Hill	select CEVT_R4K
435ec47b274SSteven J. Hill	select CSRC_R4K
436fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
437ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_VI
438ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_EI
439ec47b274SSteven J. Hill	select DMA_NONCOHERENT
440ec47b274SSteven J. Hill	select IRQ_CPU
4418a19b8f1SAndrew Bresticker	select MIPS_GIC
44244327236SQais Yousef	select LIBFDT
443ec47b274SSteven J. Hill	select MIPS_MSC
444ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R1
445ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R2
446ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS64_R1
447ec47b274SSteven J. Hill	select SYS_HAS_EARLY_PRINTK
448ec47b274SSteven J. Hill	select SYS_SUPPORTS_32BIT_KERNEL
449ec47b274SSteven J. Hill	select SYS_SUPPORTS_64BIT_KERNEL
450ec47b274SSteven J. Hill	select SYS_SUPPORTS_BIG_ENDIAN
451ec47b274SSteven J. Hill	select SYS_SUPPORTS_LITTLE_ENDIAN
452ec47b274SSteven J. Hill	select SYS_SUPPORTS_SMARTMIPS
453a6a4834cSSteven J. Hill	select SYS_SUPPORTS_MICROMIPS
454377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
455ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_DESC
456ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_MMIO
4579b731009SSteven J. Hill	select USE_OF
458ec47b274SSteven J. Hill	help
459ec47b274SSteven J. Hill	  This enables support for the MIPS Technologies SEAD3 evaluation
460ec47b274SSteven J. Hill	  board.
461ec47b274SSteven J. Hill
462a83860c2SRalf Baechleconfig NEC_MARKEINS
463a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
464a83860c2SRalf Baechle	select SOC_EMMA2RH
465a83860c2SRalf Baechle	select HW_HAS_PCI
466a83860c2SRalf Baechle	help
467a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
468ade299d8SYoichi Yuasa
4695e83d430SRalf Baechleconfig MACH_VR41XX
47074142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
47142f77542SRalf Baechle	select CEVT_R4K
472940f6b48SRalf Baechle	select CSRC_R4K
4737cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
474377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
47527fdd325SYoichi Yuasa	select ARCH_REQUIRE_GPIOLIB
4765e83d430SRalf Baechle
477edb6310aSDaniel Lairdconfig NXP_STB220
478edb6310aSDaniel Laird	bool "NXP STB220 board"
479edb6310aSDaniel Laird	select SOC_PNX833X
480edb6310aSDaniel Laird	help
481edb6310aSDaniel Laird	 Support for NXP Semiconductors STB220 Development Board.
482edb6310aSDaniel Laird
483edb6310aSDaniel Lairdconfig NXP_STB225
484edb6310aSDaniel Laird	bool "NXP 225 board"
485edb6310aSDaniel Laird	select SOC_PNX833X
486edb6310aSDaniel Laird	select SOC_PNX8335
487edb6310aSDaniel Laird	help
488edb6310aSDaniel Laird	 Support for NXP Semiconductors STB225 Development Board.
489edb6310aSDaniel Laird
4909267a30dSMarc St-Jeanconfig PMC_MSP
4919267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
49239d30c13SAnoop P A	select CEVT_R4K
49339d30c13SAnoop P A	select CSRC_R4K
4949267a30dSMarc St-Jean	select DMA_NONCOHERENT
4959267a30dSMarc St-Jean	select SWAP_IO_SPACE
4969267a30dSMarc St-Jean	select NO_EXCEPT_FILL
4979267a30dSMarc St-Jean	select BOOT_RAW
4989267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
4999267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
5009267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
5019267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
502377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
5039267a30dSMarc St-Jean	select IRQ_CPU
5049267a30dSMarc St-Jean	select SERIAL_8250
5059267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
5069296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
5079296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
5089267a30dSMarc St-Jean	help
5099267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
5109267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
5119267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
5129267a30dSMarc St-Jean	  a variety of MIPS cores.
5139267a30dSMarc St-Jean
514ae2b5bb6SJohn Crispinconfig RALINK
515ae2b5bb6SJohn Crispin	bool "Ralink based machines"
516ae2b5bb6SJohn Crispin	select CEVT_R4K
517ae2b5bb6SJohn Crispin	select CSRC_R4K
518ae2b5bb6SJohn Crispin	select BOOT_RAW
519ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
520ae2b5bb6SJohn Crispin	select IRQ_CPU
521ae2b5bb6SJohn Crispin	select USE_OF
522ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
523ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
524ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
525ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
526377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
527ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
528ae2b5bb6SJohn Crispin	select HAVE_MACH_CLKDEV
529ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
5302a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
5312a153f1cSJohn Crispin	select RESET_CONTROLLER
532ae2b5bb6SJohn Crispin
5331da177e4SLinus Torvaldsconfig SGI_IP22
5343fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
5350e2794b0SRalf Baechle	select FW_ARC
5360e2794b0SRalf Baechle	select FW_ARC32
5371da177e4SLinus Torvalds	select BOOT_ELF32
53842f77542SRalf Baechle	select CEVT_R4K
539940f6b48SRalf Baechle	select CSRC_R4K
540e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
5411da177e4SLinus Torvalds	select DMA_NONCOHERENT
5425e83d430SRalf Baechle	select HW_HAS_EISA
543d865bea4SRalf Baechle	select I8253
54468de4803SThomas Bogendoerfer	select I8259
5451da177e4SLinus Torvalds	select IP22_CPU_SCACHE
5461da177e4SLinus Torvalds	select IRQ_CPU
547aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
548e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
549e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
55036e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
551e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
552e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
553e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
5541da177e4SLinus Torvalds	select SWAP_IO_SPACE
5557cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
5567cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
5572b5e63f6SMartin Michlmayr	#
5582b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
5592b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
5602b5e63f6SMartin Michlmayr	#
5612b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
5622b5e63f6SMartin Michlmayr	# for a more details discussion
5632b5e63f6SMartin Michlmayr	#
5642b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
565ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
566ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
5675e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
568930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
5691da177e4SLinus Torvalds	help
5701da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
5711da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
5721da177e4SLinus Torvalds	  that runs on these, say Y here.
5731da177e4SLinus Torvalds
5741da177e4SLinus Torvaldsconfig SGI_IP27
5753fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
5760e2794b0SRalf Baechle	select FW_ARC
5770e2794b0SRalf Baechle	select FW_ARC64
5785e83d430SRalf Baechle	select BOOT_ELF64
579e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
580634286f1SRalf Baechle	select DMA_COHERENT
58136a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
5821da177e4SLinus Torvalds	select HW_HAS_PCI
583130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
5847cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
585ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
5865e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
587d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
5881a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
589930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
5901da177e4SLinus Torvalds	help
5911da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
5921da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
5931da177e4SLinus Torvalds	  here.
5941da177e4SLinus Torvalds
595e2defae5SThomas Bogendoerferconfig SGI_IP28
5967d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
5970e2794b0SRalf Baechle	select FW_ARC
5980e2794b0SRalf Baechle	select FW_ARC64
599e2defae5SThomas Bogendoerfer	select BOOT_ELF64
600e2defae5SThomas Bogendoerfer	select CEVT_R4K
601e2defae5SThomas Bogendoerfer	select CSRC_R4K
602e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
603e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
604e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
605e2defae5SThomas Bogendoerfer	select IRQ_CPU
606e2defae5SThomas Bogendoerfer	select HW_HAS_EISA
607e2defae5SThomas Bogendoerfer	select I8253
608e2defae5SThomas Bogendoerfer	select I8259
609e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
610e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
6115b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
612e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
613e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
614e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
615e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
616e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
6172b5e63f6SMartin Michlmayr	#
6182b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6192b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6202b5e63f6SMartin Michlmayr	#
6212b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6222b5e63f6SMartin Michlmayr	# for a more details discussion
6232b5e63f6SMartin Michlmayr	#
6242b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
625e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
626e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
627dc24d68dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
628e2defae5SThomas Bogendoerfer      help
629e2defae5SThomas Bogendoerfer        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
630e2defae5SThomas Bogendoerfer        kernel that runs on these, say Y here.
631e2defae5SThomas Bogendoerfer
6321da177e4SLinus Torvaldsconfig SGI_IP32
633cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
6340e2794b0SRalf Baechle	select FW_ARC
6350e2794b0SRalf Baechle	select FW_ARC32
6361da177e4SLinus Torvalds	select BOOT_ELF32
63742f77542SRalf Baechle	select CEVT_R4K
638940f6b48SRalf Baechle	select CSRC_R4K
6391da177e4SLinus Torvalds	select DMA_NONCOHERENT
6401da177e4SLinus Torvalds	select HW_HAS_PCI
641dd67b155SRalf Baechle	select IRQ_CPU
6421da177e4SLinus Torvalds	select R5000_CPU_SCACHE
6431da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
6447cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
6457cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
6467cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
647dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
648ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6495e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6501da177e4SLinus Torvalds	help
6511da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
6521da177e4SLinus Torvalds
653ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
654ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
6555e83d430SRalf Baechle	select BOOT_ELF32
6565e83d430SRalf Baechle	select DMA_COHERENT
6575e83d430SRalf Baechle	select SIBYTE_BCM1120
6585e83d430SRalf Baechle	select SWAP_IO_SPACE
6597cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
6605e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6615e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
6625e83d430SRalf Baechle
663ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
664ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
6655e83d430SRalf Baechle	select BOOT_ELF32
6665e83d430SRalf Baechle	select DMA_COHERENT
6675e83d430SRalf Baechle	select SIBYTE_BCM1120
6685e83d430SRalf Baechle	select SWAP_IO_SPACE
6697cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
6705e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6715e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
6725e83d430SRalf Baechle
6735e83d430SRalf Baechleconfig SIBYTE_CRHONE
6743fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
6755e83d430SRalf Baechle	select BOOT_ELF32
6765e83d430SRalf Baechle	select DMA_COHERENT
6775e83d430SRalf Baechle	select SIBYTE_BCM1125
6785e83d430SRalf Baechle	select SWAP_IO_SPACE
6797cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
6805e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6815e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
6825e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
6835e83d430SRalf Baechle
684ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
685ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
686ade299d8SYoichi Yuasa	select BOOT_ELF32
687ade299d8SYoichi Yuasa	select DMA_COHERENT
688ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
689ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
690ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
691ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
692ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
693ade299d8SYoichi Yuasa
694ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
695ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
696ade299d8SYoichi Yuasa	select BOOT_ELF32
697ade299d8SYoichi Yuasa	select DMA_COHERENT
698fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
699ade299d8SYoichi Yuasa	select SIBYTE_SB1250
700ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
701ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
702ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
703ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
704ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
705cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
706ade299d8SYoichi Yuasa
707ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
708ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
709ade299d8SYoichi Yuasa	select BOOT_ELF32
710ade299d8SYoichi Yuasa	select DMA_COHERENT
711fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
712ade299d8SYoichi Yuasa	select SIBYTE_SB1250
713ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
714ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
715ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
716ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
717ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
718ade299d8SYoichi Yuasa
719ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
720ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
721ade299d8SYoichi Yuasa	select BOOT_ELF32
722ade299d8SYoichi Yuasa	select DMA_COHERENT
723ade299d8SYoichi Yuasa	select SIBYTE_SB1250
724ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
725ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
726ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
727ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
728ade299d8SYoichi Yuasa
729ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
730ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
731ade299d8SYoichi Yuasa	select BOOT_ELF32
732ade299d8SYoichi Yuasa	select DMA_COHERENT
733ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
734ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
735ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
736ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
737ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
738651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
739ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
740cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
741ade299d8SYoichi Yuasa
74214b36af4SThomas Bogendoerferconfig SNI_RM
74314b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
7440e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
7450e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
746aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
7475e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
7485e83d430SRalf Baechle	select BOOT_ELF32
74942f77542SRalf Baechle	select CEVT_R4K
750940f6b48SRalf Baechle	select CSRC_R4K
751e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
7525e83d430SRalf Baechle	select DMA_NONCOHERENT
7535e83d430SRalf Baechle	select GENERIC_ISA_DMA
7548a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
7555e83d430SRalf Baechle	select HW_HAS_EISA
7565e83d430SRalf Baechle	select HW_HAS_PCI
757c066a32aSThomas Bogendoerfer	select IRQ_CPU
758d865bea4SRalf Baechle	select I8253
7595e83d430SRalf Baechle	select I8259
7605e83d430SRalf Baechle	select ISA
7614a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
7627cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
7634a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
764c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
7654a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
76636a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
767ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
7687d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
7694a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
7705e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7715e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7721da177e4SLinus Torvalds	help
77314b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
77414b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
7755e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
7765e83d430SRalf Baechle	  support this machine type.
7771da177e4SLinus Torvalds
778edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
779edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
7805e83d430SRalf Baechle
781edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
782edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
78323fbee9dSRalf Baechle
78473b4390fSRalf Baechleconfig MIKROTIK_RB532
78573b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
78673b4390fSRalf Baechle	select CEVT_R4K
78773b4390fSRalf Baechle	select CSRC_R4K
78873b4390fSRalf Baechle	select DMA_NONCOHERENT
78973b4390fSRalf Baechle	select HW_HAS_PCI
79073b4390fSRalf Baechle	select IRQ_CPU
79173b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
79273b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
79373b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
79473b4390fSRalf Baechle	select SWAP_IO_SPACE
79573b4390fSRalf Baechle	select BOOT_RAW
796d888e25bSFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
797930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
79873b4390fSRalf Baechle	help
79973b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
80073b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
80173b4390fSRalf Baechle
8029ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
8039ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
804a86c7f72SDavid Daney	select CEVT_R4K
80534adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
806a86c7f72SDavid Daney	select DMA_COHERENT
807a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
808a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
809f65aad41SRalf Baechle	select EDAC_SUPPORT
81073569d87SDavid Daney	select SYS_SUPPORTS_LITTLE_ENDIAN
81173569d87SDavid Daney	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
812a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
8135e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
814a86c7f72SDavid Daney	select SWAP_IO_SPACE
815e8635b48SDavid Daney	select HW_HAS_PCI
816f00e001eSDavid Daney	select ZONE_DMA32
817465aaed0SDavid Daney	select HOLES_IN_ZONE
81899cab4bbSDavid Daney	select ARCH_REQUIRE_GPIOLIB
8196e511163SDavid Daney	select LIBFDT
8206e511163SDavid Daney	select USE_OF
8216e511163SDavid Daney	select ARCH_SPARSEMEM_ENABLE
8226e511163SDavid Daney	select SYS_SUPPORTS_SMP
8236e511163SDavid Daney	select NR_CPUS_DEFAULT_16
824e326479fSAndrew Bresticker	select BUILTIN_DTB
825a86c7f72SDavid Daney	help
826a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
827a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
828a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
829a86c7f72SDavid Daney	  Some of the supported boards are:
830a86c7f72SDavid Daney		EBT3000
831a86c7f72SDavid Daney		EBH3000
832a86c7f72SDavid Daney		EBH3100
833a86c7f72SDavid Daney		Thunder
834a86c7f72SDavid Daney		Kodama
835a86c7f72SDavid Daney		Hikari
836a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
837a86c7f72SDavid Daney
8387f058e85SJayachandran Cconfig NLM_XLR_BOARD
8397f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
8407f058e85SJayachandran C	select BOOT_ELF32
8417f058e85SJayachandran C	select NLM_COMMON
8427f058e85SJayachandran C	select SYS_HAS_CPU_XLR
8437f058e85SJayachandran C	select SYS_SUPPORTS_SMP
8447f058e85SJayachandran C	select HW_HAS_PCI
8457f058e85SJayachandran C	select SWAP_IO_SPACE
8467f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
8477f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
84834adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
8497f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
8507f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
8517f058e85SJayachandran C	select DMA_COHERENT
8527f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
8537f058e85SJayachandran C	select CEVT_R4K
8547f058e85SJayachandran C	select CSRC_R4K
8557f058e85SJayachandran C	select IRQ_CPU
856b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
8577f058e85SJayachandran C	select SYNC_R4K
8587f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
8598f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
8608f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
8617f058e85SJayachandran C	help
8627f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
8637f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
8647f058e85SJayachandran C
8651c773ea4SJayachandran Cconfig NLM_XLP_BOARD
8661c773ea4SJayachandran C	bool "Netlogic XLP based systems"
8671c773ea4SJayachandran C	select BOOT_ELF32
8681c773ea4SJayachandran C	select NLM_COMMON
8691c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
8701c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
8711c773ea4SJayachandran C	select HW_HAS_PCI
8721c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
8731c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
87434adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
8751c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
8761c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
8771c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
8781c773ea4SJayachandran C	select DMA_COHERENT
8791c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
8801c773ea4SJayachandran C	select CEVT_R4K
8811c773ea4SJayachandran C	select CSRC_R4K
8821c773ea4SJayachandran C	select IRQ_CPU
883b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
8841c773ea4SJayachandran C	select SYNC_R4K
8851c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
8862f6528e1SJayachandran C	select USE_OF
8878f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
8888f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
8891c773ea4SJayachandran C	help
8901c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
8911c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
8921c773ea4SJayachandran C
8939bc463beSDavid Daneyconfig MIPS_PARAVIRT
8949bc463beSDavid Daney	bool "Para-Virtualized guest system"
8959bc463beSDavid Daney	select CEVT_R4K
8969bc463beSDavid Daney	select CSRC_R4K
8979bc463beSDavid Daney	select DMA_COHERENT
8989bc463beSDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
8999bc463beSDavid Daney	select SYS_SUPPORTS_32BIT_KERNEL
9009bc463beSDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
9019bc463beSDavid Daney	select SYS_SUPPORTS_SMP
9029bc463beSDavid Daney	select NR_CPUS_DEFAULT_4
9039bc463beSDavid Daney	select SYS_HAS_EARLY_PRINTK
9049bc463beSDavid Daney	select SYS_HAS_CPU_MIPS32_R2
9059bc463beSDavid Daney	select SYS_HAS_CPU_MIPS64_R2
9069bc463beSDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
9079bc463beSDavid Daney	select HW_HAS_PCI
9089bc463beSDavid Daney	select SWAP_IO_SPACE
9099bc463beSDavid Daney	help
9109bc463beSDavid Daney	  This option supports guest running under ????
9119bc463beSDavid Daney
9121da177e4SLinus Torvaldsendchoice
9131da177e4SLinus Torvalds
914e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
9153b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig"
916d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
917a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
918e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
9195e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
9205ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
9218ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
9221f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
9230f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
924ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
92529c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
92638b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
92722b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
9285e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
929a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
93085749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig"
931ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig"
9327f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
933ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig"
93438b18f72SRalf Baechle
9355e83d430SRalf Baechleendmenu
9365e83d430SRalf Baechle
9371da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK
9381da177e4SLinus Torvalds	bool
9391da177e4SLinus Torvalds	default y
9401da177e4SLinus Torvalds
9411da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
9421da177e4SLinus Torvalds	bool
9431da177e4SLinus Torvalds
944f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32
945f0d1b0b3SDavid Howells	bool
946f0d1b0b3SDavid Howells	default n
947f0d1b0b3SDavid Howells
948f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64
949f0d1b0b3SDavid Howells	bool
950f0d1b0b3SDavid Howells	default n
951f0d1b0b3SDavid Howells
9523c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
9533c9ee7efSAkinobu Mita	bool
9543c9ee7efSAkinobu Mita	default y
9553c9ee7efSAkinobu Mita
9561da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
9571da177e4SLinus Torvalds	bool
9581da177e4SLinus Torvalds	default y
9591da177e4SLinus Torvalds
960ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
9611cc89038SAtsushi Nemoto	bool
9621cc89038SAtsushi Nemoto	default y
9631cc89038SAtsushi Nemoto
9641da177e4SLinus Torvalds#
9651da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
9661da177e4SLinus Torvalds#
9670e2794b0SRalf Baechleconfig FW_ARC
9681da177e4SLinus Torvalds	bool
9691da177e4SLinus Torvalds
97061ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
97161ed242dSRalf Baechle	bool
97261ed242dSRalf Baechle
9739267a30dSMarc St-Jeanconfig BOOT_RAW
9749267a30dSMarc St-Jean	bool
9759267a30dSMarc St-Jean
976217dd11eSRalf Baechleconfig CEVT_BCM1480
977217dd11eSRalf Baechle	bool
978217dd11eSRalf Baechle
9796457d9fcSYoichi Yuasaconfig CEVT_DS1287
9806457d9fcSYoichi Yuasa	bool
9816457d9fcSYoichi Yuasa
9821097c6acSYoichi Yuasaconfig CEVT_GT641XX
9831097c6acSYoichi Yuasa	bool
9841097c6acSYoichi Yuasa
98542f77542SRalf Baechleconfig CEVT_R4K
98642f77542SRalf Baechle	bool
98742f77542SRalf Baechle
988217dd11eSRalf Baechleconfig CEVT_SB1250
989217dd11eSRalf Baechle	bool
990217dd11eSRalf Baechle
991229f773eSAtsushi Nemotoconfig CEVT_TXX9
992229f773eSAtsushi Nemoto	bool
993229f773eSAtsushi Nemoto
994217dd11eSRalf Baechleconfig CSRC_BCM1480
995217dd11eSRalf Baechle	bool
996217dd11eSRalf Baechle
9974247417dSYoichi Yuasaconfig CSRC_IOASIC
9984247417dSYoichi Yuasa	bool
9994247417dSYoichi Yuasa
1000940f6b48SRalf Baechleconfig CSRC_R4K
1001940f6b48SRalf Baechle	bool
1002940f6b48SRalf Baechle
1003217dd11eSRalf Baechleconfig CSRC_SB1250
1004217dd11eSRalf Baechle	bool
1005217dd11eSRalf Baechle
1006a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
10077444a72eSMichael Buesch	select ARCH_REQUIRE_GPIOLIB
1008a9aec7feSAtsushi Nemoto	bool
1009a9aec7feSAtsushi Nemoto
10100e2794b0SRalf Baechleconfig FW_CFE
1011df78b5c8SAurelien Jarno	bool
1012df78b5c8SAurelien Jarno
10134bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT
101434adb28dSRalf Baechle	def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
10154bafad92SFUJITA Tomonori
1016885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
1017885014bcSFelix Fietkau	select DMA_NONCOHERENT
1018885014bcSFelix Fietkau	bool
1019885014bcSFelix Fietkau
10201da177e4SLinus Torvaldsconfig DMA_COHERENT
10211da177e4SLinus Torvalds	bool
10221da177e4SLinus Torvalds
10231da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
10241da177e4SLinus Torvalds	bool
1025e1e02b32SFUJITA Tomonori	select NEED_DMA_MAP_STATE
10264ce588cdSRalf Baechle
1027e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
10284ce588cdSRalf Baechle	bool
10291da177e4SLinus Torvalds
103036a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
10311da177e4SLinus Torvalds	bool
10321da177e4SLinus Torvalds
1033dbb74540SRalf Baechleconfig HOTPLUG_CPU
10341b2bc75cSRalf Baechle	bool "Support for hot-pluggable CPUs"
103540b31360SStephen Rothwell	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
10361b2bc75cSRalf Baechle	help
10371b2bc75cSRalf Baechle	  Say Y here to allow turning CPUs off and on. CPUs can be
10381b2bc75cSRalf Baechle	  controlled through /sys/devices/system/cpu.
10391b2bc75cSRalf Baechle	  (Note: power management support will enable this option
10401b2bc75cSRalf Baechle	    automatically on SMP systems. )
10411b2bc75cSRalf Baechle	  Say N if you want to disable CPU hotplug.
10421b2bc75cSRalf Baechle
10431b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
1044dbb74540SRalf Baechle	bool
1045dbb74540SRalf Baechle
10461da177e4SLinus Torvaldsconfig I8259
10471da177e4SLinus Torvalds	bool
1048079a4601SAndrew Bresticker	select IRQ_DOMAIN
10491da177e4SLinus Torvalds
10501da177e4SLinus Torvaldsconfig MIPS_BONITO64
10511da177e4SLinus Torvalds	bool
10521da177e4SLinus Torvalds
10531da177e4SLinus Torvaldsconfig MIPS_MSC
10541da177e4SLinus Torvalds	bool
10551da177e4SLinus Torvalds
10561f21d2bdSBrian Murphyconfig MIPS_NILE4
10571f21d2bdSBrian Murphy	bool
10581f21d2bdSBrian Murphy
105939b8d525SRalf Baechleconfig SYNC_R4K
106039b8d525SRalf Baechle	bool
106139b8d525SRalf Baechle
1062487d70d0SGabor Juhosconfig MIPS_MACHINE
1063487d70d0SGabor Juhos	def_bool n
1064487d70d0SGabor Juhos
1065ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1066d388d685SMaciej W. Rozycki	def_bool n
1067d388d685SMaciej W. Rozycki
10684e0748f5SMarkos Chandrasconfig GENERIC_CSUM
10694e0748f5SMarkos Chandras	bool
10704e0748f5SMarkos Chandras
10718313da30SRalf Baechleconfig GENERIC_ISA_DMA
10728313da30SRalf Baechle	bool
10738313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1074a35bee8aSNamhyung Kim	select ISA_DMA_API
10758313da30SRalf Baechle
1076aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1077aa414dffSRalf Baechle	bool
10788313da30SRalf Baechle	select GENERIC_ISA_DMA
1079aa414dffSRalf Baechle
1080a35bee8aSNamhyung Kimconfig ISA_DMA_API
1081a35bee8aSNamhyung Kim	bool
1082a35bee8aSNamhyung Kim
1083465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1084465aaed0SDavid Daney	bool
1085465aaed0SDavid Daney
10865e83d430SRalf Baechle#
10876b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
10885e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
10895e83d430SRalf Baechle# choice statement should be more obvious to the user.
10905e83d430SRalf Baechle#
10915e83d430SRalf Baechlechoice
10926b2aac42SMasanari Iida	prompt "Endianness selection"
10931da177e4SLinus Torvalds	help
10941da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
10955e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
10963cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
10975e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
10983dde6ad8SDavid Sterba	  one or the other endianness.
10995e83d430SRalf Baechle
11005e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
11015e83d430SRalf Baechle	bool "Big endian"
11025e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
11035e83d430SRalf Baechle
11045e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
11055e83d430SRalf Baechle	bool "Little endian"
11065e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
11075e83d430SRalf Baechle
11085e83d430SRalf Baechleendchoice
11095e83d430SRalf Baechle
111022b0763aSDavid Daneyconfig EXPORT_UASM
111122b0763aSDavid Daney	bool
111222b0763aSDavid Daney
11132116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
11142116245eSRalf Baechle	bool
11152116245eSRalf Baechle
11165e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
11175e83d430SRalf Baechle	bool
11185e83d430SRalf Baechle
11195e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
11205e83d430SRalf Baechle	bool
11211da177e4SLinus Torvalds
11229cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
11239cffd154SDavid Daney	bool
11249cffd154SDavid Daney	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
11259cffd154SDavid Daney	default y
11269cffd154SDavid Daney
1127aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1128aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1129aa1762f4SDavid Daney
11301da177e4SLinus Torvaldsconfig IRQ_CPU
11311da177e4SLinus Torvalds	bool
11320f84c305SAndrew Bresticker	select IRQ_DOMAIN
11331da177e4SLinus Torvalds
11341da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
11351da177e4SLinus Torvalds	bool
11361da177e4SLinus Torvalds
11379267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
11389267a30dSMarc St-Jean	bool
11399267a30dSMarc St-Jean
11409267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
11419267a30dSMarc St-Jean	bool
11429267a30dSMarc St-Jean
11438420fd00SAtsushi Nemotoconfig IRQ_TXX9
11448420fd00SAtsushi Nemoto	bool
11458420fd00SAtsushi Nemoto
1146d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1147d5ab1a69SYoichi Yuasa	bool
1148d5ab1a69SYoichi Yuasa
1149252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
11501da177e4SLinus Torvalds	bool
11511da177e4SLinus Torvalds
11529267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
11539267a30dSMarc St-Jean	bool
11549267a30dSMarc St-Jean
1155a83860c2SRalf Baechleconfig SOC_EMMA2RH
1156a83860c2SRalf Baechle	bool
1157a83860c2SRalf Baechle	select CEVT_R4K
1158a83860c2SRalf Baechle	select CSRC_R4K
1159a83860c2SRalf Baechle	select DMA_NONCOHERENT
1160a83860c2SRalf Baechle	select IRQ_CPU
1161a83860c2SRalf Baechle	select SWAP_IO_SPACE
1162a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1163a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1164a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1165a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1166a83860c2SRalf Baechle
1167edb6310aSDaniel Lairdconfig SOC_PNX833X
1168edb6310aSDaniel Laird	bool
1169edb6310aSDaniel Laird	select CEVT_R4K
1170edb6310aSDaniel Laird	select CSRC_R4K
1171edb6310aSDaniel Laird	select IRQ_CPU
1172edb6310aSDaniel Laird	select DMA_NONCOHERENT
1173edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1174edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1175edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1176edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1177377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1178edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1179edb6310aSDaniel Laird
1180edb6310aSDaniel Lairdconfig SOC_PNX8335
1181edb6310aSDaniel Laird	bool
1182edb6310aSDaniel Laird	select SOC_PNX833X
1183edb6310aSDaniel Laird
1184a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM
1185a7e07b1aSMarkos Chandras	bool
1186a7e07b1aSMarkos Chandras
11871da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
11881da177e4SLinus Torvalds	bool
11891da177e4SLinus Torvalds
1190e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1191e2defae5SThomas Bogendoerfer	bool
1192e2defae5SThomas Bogendoerfer
11935b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
11945b438c44SThomas Bogendoerfer	bool
11955b438c44SThomas Bogendoerfer
1196e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1197e2defae5SThomas Bogendoerfer	bool
1198e2defae5SThomas Bogendoerfer
1199e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1200e2defae5SThomas Bogendoerfer	bool
1201e2defae5SThomas Bogendoerfer
1202e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1203e2defae5SThomas Bogendoerfer	bool
1204e2defae5SThomas Bogendoerfer
1205e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1206e2defae5SThomas Bogendoerfer	bool
1207e2defae5SThomas Bogendoerfer
1208e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1209e2defae5SThomas Bogendoerfer	bool
1210e2defae5SThomas Bogendoerfer
12110e2794b0SRalf Baechleconfig FW_ARC32
12125e83d430SRalf Baechle	bool
12135e83d430SRalf Baechle
1214aaa9fad3SPaul Bolleconfig FW_SNIPROM
1215231a35d3SThomas Bogendoerfer	bool
1216231a35d3SThomas Bogendoerfer
12171da177e4SLinus Torvaldsconfig BOOT_ELF32
12181da177e4SLinus Torvalds	bool
12191da177e4SLinus Torvalds
1220930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1221930beb5aSFlorian Fainelli	bool
1222930beb5aSFlorian Fainelli
1223930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1224930beb5aSFlorian Fainelli	bool
1225930beb5aSFlorian Fainelli
1226930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1227930beb5aSFlorian Fainelli	bool
1228930beb5aSFlorian Fainelli
1229930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1230930beb5aSFlorian Fainelli	bool
1231930beb5aSFlorian Fainelli
12321da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
12331da177e4SLinus Torvalds	int
1234a4c0201eSFlorian Fainelli	default "4" if MIPS_L1_CACHE_SHIFT_4
1235a4c0201eSFlorian Fainelli	default "5" if MIPS_L1_CACHE_SHIFT_5
1236a4c0201eSFlorian Fainelli	default "6" if MIPS_L1_CACHE_SHIFT_6
1237a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
12381da177e4SLinus Torvalds	default "5"
12391da177e4SLinus Torvalds
12401da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
12411da177e4SLinus Torvalds	bool
12421da177e4SLinus Torvalds
12431da177e4SLinus Torvaldsconfig ARC_CONSOLE
12441da177e4SLinus Torvalds	bool "ARC console support"
1245e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
12461da177e4SLinus Torvalds
12471da177e4SLinus Torvaldsconfig ARC_MEMORY
12481da177e4SLinus Torvalds	bool
124914b36af4SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP32
12501da177e4SLinus Torvalds	default y
12511da177e4SLinus Torvalds
12521da177e4SLinus Torvaldsconfig ARC_PROMLIB
12531da177e4SLinus Torvalds	bool
1254e2defae5SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
12551da177e4SLinus Torvalds	default y
12561da177e4SLinus Torvalds
12570e2794b0SRalf Baechleconfig FW_ARC64
12581da177e4SLinus Torvalds	bool
12591da177e4SLinus Torvalds
12601da177e4SLinus Torvaldsconfig BOOT_ELF64
12611da177e4SLinus Torvalds	bool
12621da177e4SLinus Torvalds
12631da177e4SLinus Torvaldsmenu "CPU selection"
12641da177e4SLinus Torvalds
12651da177e4SLinus Torvaldschoice
12661da177e4SLinus Torvalds	prompt "CPU type"
12671da177e4SLinus Torvalds	default CPU_R4X00
12681da177e4SLinus Torvalds
12690e476d91SHuacai Chenconfig CPU_LOONGSON3
12700e476d91SHuacai Chen	bool "Loongson 3 CPU"
12710e476d91SHuacai Chen	depends on SYS_HAS_CPU_LOONGSON3
12720e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
12730e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
12740e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
12750e476d91SHuacai Chen	select WEAK_ORDERING
12760e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
12770e476d91SHuacai Chen	help
12780e476d91SHuacai Chen		The Loongson 3 processor implements the MIPS64R2 instruction
12790e476d91SHuacai Chen		set with many extensions.
12800e476d91SHuacai Chen
12813702bba5SWu Zhangjinconfig CPU_LOONGSON2E
12823702bba5SWu Zhangjin	bool "Loongson 2E"
12833702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
12843702bba5SWu Zhangjin	select CPU_LOONGSON2
12852a21c730SFuxin Zhang	help
12862a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
12872a21c730SFuxin Zhang	  with many extensions.
12882a21c730SFuxin Zhang
128925985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
12906f7a251aSWu Zhangjin	  bonito64.
12916f7a251aSWu Zhangjin
12926f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
12936f7a251aSWu Zhangjin	bool "Loongson 2F"
12946f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
12956f7a251aSWu Zhangjin	select CPU_LOONGSON2
1296c197da91SArnaud Patard	select ARCH_REQUIRE_GPIOLIB
12976f7a251aSWu Zhangjin	help
12986f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
12996f7a251aSWu Zhangjin	  with many extensions.
13006f7a251aSWu Zhangjin
13016f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
13026f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
13036f7a251aSWu Zhangjin	  Loongson2E.
13046f7a251aSWu Zhangjin
1305ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1306ca585cf9SKelvin Cheung	bool "Loongson 1B"
1307ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1308ca585cf9SKelvin Cheung	select CPU_LOONGSON1
1309ca585cf9SKelvin Cheung	help
1310ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1311ca585cf9SKelvin Cheung	  release 2 instruction set.
1312ca585cf9SKelvin Cheung
13136e760c8dSRalf Baechleconfig CPU_MIPS32_R1
13146e760c8dSRalf Baechle	bool "MIPS32 Release 1"
13157cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
13166e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1317797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1318ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13196e760c8dSRalf Baechle	help
13205e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
13211e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13221e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13231e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
13241e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13251e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
13261e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
13271e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
13281e5f1caaSRalf Baechle	  performance.
13291e5f1caaSRalf Baechle
13301e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
13311e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
13327cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
13331e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1334797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1335ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1336a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
13372235a54dSSanjay Lal	select HAVE_KVM
13381e5f1caaSRalf Baechle	help
13395e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
13406e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13416e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13426e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
13436e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13441da177e4SLinus Torvalds
13457fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6
13467fd08ca5SLeonid Yegoshin	bool "MIPS32 Release 6 (EXPERIMENTAL)"
13477fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R6
13487fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
13497fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
13507fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
13517fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
13524e0748f5SMarkos Chandras	select GENERIC_CSUM
13537fd08ca5SLeonid Yegoshin	select HAVE_KVM
13547fd08ca5SLeonid Yegoshin	select MIPS_O32_FP64_SUPPORT
13557fd08ca5SLeonid Yegoshin	help
13567fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
13577fd08ca5SLeonid Yegoshin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
13587fd08ca5SLeonid Yegoshin	  family, are based on a MIPS32r6 processor. If you own an older
13597fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
13607fd08ca5SLeonid Yegoshin
13616e760c8dSRalf Baechleconfig CPU_MIPS64_R1
13626e760c8dSRalf Baechle	bool "MIPS64 Release 1"
13637cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1364797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1365ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1366ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1367ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13689cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
13696e760c8dSRalf Baechle	help
13706e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
13716e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
13726e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
13736e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
13746e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
13751e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
13761e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
13771e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
13781e5f1caaSRalf Baechle	  performance.
13791e5f1caaSRalf Baechle
13801e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
13811e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
13827cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1383797798c1SRalf Baechle	select CPU_HAS_PREFETCH
13841e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
13851e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1386ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13879cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1388a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
13891e5f1caaSRalf Baechle	help
13901e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
13911e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
13921e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
13931e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
13941e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
13951da177e4SLinus Torvalds
13967fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6
13977fd08ca5SLeonid Yegoshin	bool "MIPS64 Release 6 (EXPERIMENTAL)"
13987fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS64_R6
13997fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14007fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14017fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_64BIT_KERNEL
14027fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14037fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14044e0748f5SMarkos Chandras	select GENERIC_CSUM
14057fd08ca5SLeonid Yegoshin	help
14067fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14077fd08ca5SLeonid Yegoshin	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
14087fd08ca5SLeonid Yegoshin	  family, are based on a MIPS64r6 processor. If you own an older
14097fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
14107fd08ca5SLeonid Yegoshin
14111da177e4SLinus Torvaldsconfig CPU_R3000
14121da177e4SLinus Torvalds	bool "R3000"
14137cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1414f7062ddbSRalf Baechle	select CPU_HAS_WB
1415ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1416797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14171da177e4SLinus Torvalds	help
14181da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
14191da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
14201da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
14211da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
14221da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
14231da177e4SLinus Torvalds	  try to recompile with R3000.
14241da177e4SLinus Torvalds
14251da177e4SLinus Torvaldsconfig CPU_TX39XX
14261da177e4SLinus Torvalds	bool "R39XX"
14277cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1428ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
14291da177e4SLinus Torvalds
14301da177e4SLinus Torvaldsconfig CPU_VR41XX
14311da177e4SLinus Torvalds	bool "R41xx"
14327cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1433ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1434ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
14351da177e4SLinus Torvalds	help
14365e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
14371da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
14381da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
14391da177e4SLinus Torvalds	  processor or vice versa.
14401da177e4SLinus Torvalds
14411da177e4SLinus Torvaldsconfig CPU_R4300
14421da177e4SLinus Torvalds	bool "R4300"
14437cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4300
1444ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1445ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
14461da177e4SLinus Torvalds	help
14471da177e4SLinus Torvalds	  MIPS Technologies R4300-series processors.
14481da177e4SLinus Torvalds
14491da177e4SLinus Torvaldsconfig CPU_R4X00
14501da177e4SLinus Torvalds	bool "R4x00"
14517cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1452ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1453ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1454970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14551da177e4SLinus Torvalds	help
14561da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
14571da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
14581da177e4SLinus Torvalds
14591da177e4SLinus Torvaldsconfig CPU_TX49XX
14601da177e4SLinus Torvalds	bool "R49XX"
14617cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1462de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1463ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1464ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1465970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14661da177e4SLinus Torvalds
14671da177e4SLinus Torvaldsconfig CPU_R5000
14681da177e4SLinus Torvalds	bool "R5000"
14697cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1470ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1471ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1472970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14731da177e4SLinus Torvalds	help
14741da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
14751da177e4SLinus Torvalds
14761da177e4SLinus Torvaldsconfig CPU_R5432
14771da177e4SLinus Torvalds	bool "R5432"
14787cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5432
14795e83d430SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
14805e83d430SRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1481970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14821da177e4SLinus Torvalds
1483542c1020SShinya Kuribayashiconfig CPU_R5500
1484542c1020SShinya Kuribayashi	bool "R5500"
1485542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1486542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1487542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
14889cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1489542c1020SShinya Kuribayashi	help
1490542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1491542c1020SShinya Kuribayashi	  instruction set.
1492542c1020SShinya Kuribayashi
14931da177e4SLinus Torvaldsconfig CPU_R6000
14941da177e4SLinus Torvalds	bool "R6000"
14957cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R6000
1496ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
14971da177e4SLinus Torvalds	help
14981da177e4SLinus Torvalds	  MIPS Technologies R6000 and R6000A series processors.  Note these
1499c09b47d8SChris Dearman	  processors are extremely rare and the support for them is incomplete.
15001da177e4SLinus Torvalds
15011da177e4SLinus Torvaldsconfig CPU_NEVADA
15021da177e4SLinus Torvalds	bool "RM52xx"
15037cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1504ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1505ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1506970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15071da177e4SLinus Torvalds	help
15081da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
15091da177e4SLinus Torvalds
15101da177e4SLinus Torvaldsconfig CPU_R8000
15111da177e4SLinus Torvalds	bool "R8000"
15127cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R8000
15135e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1514ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15151da177e4SLinus Torvalds	help
15161da177e4SLinus Torvalds	  MIPS Technologies R8000 processors.  Note these processors are
15171da177e4SLinus Torvalds	  uncommon and the support for them is incomplete.
15181da177e4SLinus Torvalds
15191da177e4SLinus Torvaldsconfig CPU_R10000
15201da177e4SLinus Torvalds	bool "R10000"
15217cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
15225e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1523ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1524ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1525797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1526970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15271da177e4SLinus Torvalds	help
15281da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
15291da177e4SLinus Torvalds
15301da177e4SLinus Torvaldsconfig CPU_RM7000
15311da177e4SLinus Torvalds	bool "RM7000"
15327cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
15335e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1534ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1535ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1536797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1537970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15381da177e4SLinus Torvalds
15391da177e4SLinus Torvaldsconfig CPU_SB1
15401da177e4SLinus Torvalds	bool "SB1"
15417cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1542ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1543ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1544797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1545970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15460004a9dfSRalf Baechle	select WEAK_ORDERING
15471da177e4SLinus Torvalds
1548a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1549a86c7f72SDavid Daney	bool "Cavium Octeon processor"
15505e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1551a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1552a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1553a86c7f72SDavid Daney	select WEAK_ORDERING
1554a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
15559cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
15569296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
1557930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
1558a86c7f72SDavid Daney	help
1559a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1560a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1561a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1562a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1563a86c7f72SDavid Daney
1564cd746249SJonas Gorskiconfig CPU_BMIPS
1565cd746249SJonas Gorski	bool "Broadcom BMIPS"
1566cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1567cd746249SJonas Gorski	select CPU_MIPS32
1568fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1569cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1570cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1571cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1572cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1573cd746249SJonas Gorski	select DMA_NONCOHERENT
1574cd746249SJonas Gorski	select IRQ_CPU
1575cd746249SJonas Gorski	select SWAP_IO_SPACE
1576cd746249SJonas Gorski	select WEAK_ORDERING
1577c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
157869aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1579c1c0c461SKevin Cernekee	help
1580fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1581c1c0c461SKevin Cernekee
15827f058e85SJayachandran Cconfig CPU_XLR
15837f058e85SJayachandran C	bool "Netlogic XLR SoC"
15847f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
15857f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
15867f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
15877f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1588970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15897f058e85SJayachandran C	select WEAK_ORDERING
15907f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
15917f058e85SJayachandran C	help
15927f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
15931c773ea4SJayachandran C
15941c773ea4SJayachandran Cconfig CPU_XLP
15951c773ea4SJayachandran C	bool "Netlogic XLP SoC"
15961c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
15971c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
15981c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
15991c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
16001c773ea4SJayachandran C	select WEAK_ORDERING
16011c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16021c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1603d6504846SJayachandran C	select CPU_MIPSR2
16041c773ea4SJayachandran C	help
16051c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
16061da177e4SLinus Torvaldsendchoice
16071da177e4SLinus Torvalds
1608a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1609a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1610a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
16117fd08ca5SLeonid Yegoshin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1612a6e18781SLeonid Yegoshin	help
1613a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1614a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1615a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1616a6e18781SLeonid Yegoshin
1617a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1618a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1619a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1620a6e18781SLeonid Yegoshin	select EVA
1621a6e18781SLeonid Yegoshin	default y
1622a6e18781SLeonid Yegoshin	help
1623a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1624a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1625a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1626a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1627a6e18781SLeonid Yegoshin
1628622844bfSWu Zhangjinif CPU_LOONGSON2F
1629622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1630622844bfSWu Zhangjin	bool
1631622844bfSWu Zhangjin
1632622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1633622844bfSWu Zhangjin	bool
1634622844bfSWu Zhangjin
1635622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1636622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1637622844bfSWu Zhangjin	default y
1638622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1639622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1640622844bfSWu Zhangjin	help
1641622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1642622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1643622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1644622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1645622844bfSWu Zhangjin
1646622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1647622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1648622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1649622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1650622844bfSWu Zhangjin	  systems.
1651622844bfSWu Zhangjin
1652622844bfSWu Zhangjin	  If unsure, please say Y.
1653622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1654622844bfSWu Zhangjin
16551b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
16561b93b3c3SWu Zhangjin	bool
16571b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
16581b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
165931c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
16601b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1661fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
16624e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
16631b93b3c3SWu Zhangjin
16641b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
16651b93b3c3SWu Zhangjin	bool
16661b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
16671b93b3c3SWu Zhangjin
16683702bba5SWu Zhangjinconfig CPU_LOONGSON2
16693702bba5SWu Zhangjin	bool
16703702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
16713702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
16723702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1673970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16743702bba5SWu Zhangjin
1675ca585cf9SKelvin Cheungconfig CPU_LOONGSON1
1676ca585cf9SKelvin Cheung	bool
1677ca585cf9SKelvin Cheung	select CPU_MIPS32
1678ca585cf9SKelvin Cheung	select CPU_MIPSR2
1679ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1680ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1681ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1682f29ad10dSKelvin Cheung	select CPU_SUPPORTS_CPUFREQ
1683ca585cf9SKelvin Cheung
1684fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
168504fa8bf7SJonas Gorski	select SMP_UP if SMP
16861bbb6c1bSKevin Cernekee	bool
1687cd746249SJonas Gorski
1688cd746249SJonas Gorskiconfig CPU_BMIPS4350
1689cd746249SJonas Gorski	bool
1690cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1691cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1692cd746249SJonas Gorski
1693cd746249SJonas Gorskiconfig CPU_BMIPS4380
1694cd746249SJonas Gorski	bool
1695bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
1696cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1697cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1698cd746249SJonas Gorski
1699cd746249SJonas Gorskiconfig CPU_BMIPS5000
1700cd746249SJonas Gorski	bool
1701cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1702bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_7
1703cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1704cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
17051bbb6c1bSKevin Cernekee
17060e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3
17070e476d91SHuacai Chen	bool
17080e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
17090e476d91SHuacai Chen
17103702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
17112a21c730SFuxin Zhang	bool
17122a21c730SFuxin Zhang
17136f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
17146f7a251aSWu Zhangjin	bool
171555045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
171655045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
171722f1fdfdSWu Zhangjin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
17186f7a251aSWu Zhangjin
1719ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1720ca585cf9SKelvin Cheung	bool
1721ca585cf9SKelvin Cheung
17227cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
17237cf8053bSRalf Baechle	bool
17247cf8053bSRalf Baechle
17257cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
17267cf8053bSRalf Baechle	bool
17277cf8053bSRalf Baechle
1728a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1729a6e18781SLeonid Yegoshin	bool
1730a6e18781SLeonid Yegoshin
17317fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6
17327fd08ca5SLeonid Yegoshin	bool
17337fd08ca5SLeonid Yegoshin
17347cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
17357cf8053bSRalf Baechle	bool
17367cf8053bSRalf Baechle
17377cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
17387cf8053bSRalf Baechle	bool
17397cf8053bSRalf Baechle
17407fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6
17417fd08ca5SLeonid Yegoshin	bool
17427fd08ca5SLeonid Yegoshin
17437cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
17447cf8053bSRalf Baechle	bool
17457cf8053bSRalf Baechle
17467cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
17477cf8053bSRalf Baechle	bool
17487cf8053bSRalf Baechle
17497cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
17507cf8053bSRalf Baechle	bool
17517cf8053bSRalf Baechle
17527cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300
17537cf8053bSRalf Baechle	bool
17547cf8053bSRalf Baechle
17557cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
17567cf8053bSRalf Baechle	bool
17577cf8053bSRalf Baechle
17587cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
17597cf8053bSRalf Baechle	bool
17607cf8053bSRalf Baechle
17617cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
17627cf8053bSRalf Baechle	bool
17637cf8053bSRalf Baechle
17647cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432
17657cf8053bSRalf Baechle	bool
17667cf8053bSRalf Baechle
1767542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1768542c1020SShinya Kuribayashi	bool
1769542c1020SShinya Kuribayashi
17707cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000
17717cf8053bSRalf Baechle	bool
17727cf8053bSRalf Baechle
17737cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
17747cf8053bSRalf Baechle	bool
17757cf8053bSRalf Baechle
17767cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000
17777cf8053bSRalf Baechle	bool
17787cf8053bSRalf Baechle
17797cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
17807cf8053bSRalf Baechle	bool
17817cf8053bSRalf Baechle
17827cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
17837cf8053bSRalf Baechle	bool
17847cf8053bSRalf Baechle
17857cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
17867cf8053bSRalf Baechle	bool
17877cf8053bSRalf Baechle
17885e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
17895e683389SDavid Daney	bool
17905e683389SDavid Daney
1791cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
1792c1c0c461SKevin Cernekee	bool
1793c1c0c461SKevin Cernekee
1794fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
1795c1c0c461SKevin Cernekee	bool
1796cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1797c1c0c461SKevin Cernekee
1798c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
1799c1c0c461SKevin Cernekee	bool
1800cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1801c1c0c461SKevin Cernekee
1802c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
1803c1c0c461SKevin Cernekee	bool
1804cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1805c1c0c461SKevin Cernekee
1806c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
1807c1c0c461SKevin Cernekee	bool
1808cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1809c1c0c461SKevin Cernekee
18107f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
18117f058e85SJayachandran C	bool
18127f058e85SJayachandran C
18131c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
18141c773ea4SJayachandran C	bool
18151c773ea4SJayachandran C
1816b6911bbaSPaul Burtonconfig MIPS_MALTA_PM
1817b6911bbaSPaul Burton	depends on MIPS_MALTA
1818b6911bbaSPaul Burton	depends on PCI
1819b6911bbaSPaul Burton	bool
1820b6911bbaSPaul Burton	default y
1821b6911bbaSPaul Burton
182217099b11SRalf Baechle#
182317099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
182417099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
182517099b11SRalf Baechle#
18260004a9dfSRalf Baechleconfig WEAK_ORDERING
18270004a9dfSRalf Baechle	bool
182817099b11SRalf Baechle
182917099b11SRalf Baechle#
183017099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
183117099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
183217099b11SRalf Baechle#
183317099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
183417099b11SRalf Baechle	bool
18355e83d430SRalf Baechleendmenu
18365e83d430SRalf Baechle
18375e83d430SRalf Baechle#
18385e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
18395e83d430SRalf Baechle#
18405e83d430SRalf Baechleconfig CPU_MIPS32
18415e83d430SRalf Baechle	bool
18427fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
18435e83d430SRalf Baechle
18445e83d430SRalf Baechleconfig CPU_MIPS64
18455e83d430SRalf Baechle	bool
18467fd08ca5SLeonid Yegoshin	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
18475e83d430SRalf Baechle
18485e83d430SRalf Baechle#
1849c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2
18505e83d430SRalf Baechle#
18515e83d430SRalf Baechleconfig CPU_MIPSR1
18525e83d430SRalf Baechle	bool
18535e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
18545e83d430SRalf Baechle
18555e83d430SRalf Baechleconfig CPU_MIPSR2
18565e83d430SRalf Baechle	bool
1857a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1858a7e07b1aSMarkos Chandras	select MIPS_SPRAM
18595e83d430SRalf Baechle
18607fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6
18617fd08ca5SLeonid Yegoshin	bool
18627fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1863a7e07b1aSMarkos Chandras	select MIPS_SPRAM
18645e83d430SRalf Baechle
1865a6e18781SLeonid Yegoshinconfig EVA
1866a6e18781SLeonid Yegoshin	bool
1867a6e18781SLeonid Yegoshin
18685e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
18695e83d430SRalf Baechle	bool
18705e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
18715e83d430SRalf Baechle	bool
18725e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
18735e83d430SRalf Baechle	bool
18745e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
18755e83d430SRalf Baechle	bool
187655045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
187755045ff5SWu Zhangjin	bool
187855045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
187955045ff5SWu Zhangjin	bool
18809cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
18819cffd154SDavid Daney	bool
188222f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED
188322f1fdfdSWu Zhangjin	bool
188482622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
188582622284SDavid Daney	bool
1886d6504846SJayachandran C	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
18875e83d430SRalf Baechle
18888192c9eaSDavid Daney#
18898192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
18908192c9eaSDavid Daney#
18918192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
18928192c9eaSDavid Daney       bool
1893f839490aSDavid Daney       default y if CPU_MIPSR1 || CPU_MIPSR2
18948192c9eaSDavid Daney
18955e83d430SRalf Baechlemenu "Kernel type"
18965e83d430SRalf Baechle
18975e83d430SRalf Baechlechoice
18985e83d430SRalf Baechle	prompt "Kernel code model"
18995e83d430SRalf Baechle	help
19005e83d430SRalf Baechle	  You should only select this option if you have a workload that
19015e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
19025e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
19035e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
19045e83d430SRalf Baechle
19055e83d430SRalf Baechleconfig 32BIT
19065e83d430SRalf Baechle	bool "32-bit kernel"
19075e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
19085e83d430SRalf Baechle	select TRAD_SIGNALS
19095e83d430SRalf Baechle	help
19105e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
19115e83d430SRalf Baechleconfig 64BIT
19125e83d430SRalf Baechle	bool "64-bit kernel"
19135e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
19145e83d430SRalf Baechle	help
19155e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
19165e83d430SRalf Baechle
19175e83d430SRalf Baechleendchoice
19185e83d430SRalf Baechle
19192235a54dSSanjay Lalconfig KVM_GUEST
19202235a54dSSanjay Lal	bool "KVM Guest Kernel"
1921f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
19222235a54dSSanjay Lal	help
19232235a54dSSanjay Lal	  Select this option if building a guest kernel for KVM (Trap & Emulate) mode
19242235a54dSSanjay Lal
1925eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ
1926eda3d33cSJames Hogan	int "Count/Compare Timer Frequency (MHz)"
19272235a54dSSanjay Lal	depends on KVM_GUEST
1928eda3d33cSJames Hogan	default 100
19292235a54dSSanjay Lal	help
1930eda3d33cSJames Hogan	  Set this to non-zero if building a guest kernel for KVM to skip RTC
1931eda3d33cSJames Hogan	  emulation when determining guest CPU Frequency. Instead, the guest's
1932eda3d33cSJames Hogan	  timer frequency is specified directly.
19332235a54dSSanjay Lal
19341da177e4SLinus Torvaldschoice
19351da177e4SLinus Torvalds	prompt "Kernel page size"
19361da177e4SLinus Torvalds	default PAGE_SIZE_4KB
19371da177e4SLinus Torvalds
19381da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
19391da177e4SLinus Torvalds	bool "4kB"
19400e476d91SHuacai Chen	depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
19411da177e4SLinus Torvalds	help
19421da177e4SLinus Torvalds	 This option select the standard 4kB Linux page size.  On some
19431da177e4SLinus Torvalds	 R3000-family processors this is the only available page size.  Using
19441da177e4SLinus Torvalds	 4kB page size will minimize memory consumption and is therefore
19451da177e4SLinus Torvalds	 recommended for low memory systems.
19461da177e4SLinus Torvalds
19471da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
19481da177e4SLinus Torvalds	bool "8kB"
19497d60717eSKees Cook	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
19501da177e4SLinus Torvalds	help
19511da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
19521da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
1953c52399beSRalf Baechle	  only on R8000 and cnMIPS processors.  Note that you will need a
1954c52399beSRalf Baechle	  suitable Linux distribution to support this.
19551da177e4SLinus Torvalds
19561da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
19571da177e4SLinus Torvalds	bool "16kB"
1958714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
19591da177e4SLinus Torvalds	help
19601da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
19611da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
1962714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
1963714bfad6SRalf Baechle	  Linux distribution to support this.
19641da177e4SLinus Torvalds
1965c52399beSRalf Baechleconfig PAGE_SIZE_32KB
1966c52399beSRalf Baechle	bool "32kB"
1967c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
1968c52399beSRalf Baechle	help
1969c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
1970c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
1971c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
1972c52399beSRalf Baechle	  distribution to support this.
1973c52399beSRalf Baechle
19741da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
19751da177e4SLinus Torvalds	bool "64kB"
19767d60717eSKees Cook	depends on !CPU_R3000 && !CPU_TX39XX
19771da177e4SLinus Torvalds	help
19781da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
19791da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
19801da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
1981714bfad6SRalf Baechle	  writing this option is still high experimental.
19821da177e4SLinus Torvalds
19831da177e4SLinus Torvaldsendchoice
19841da177e4SLinus Torvalds
1985c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
1986c9bace7cSDavid Daney	int "Maximum zone order"
1987e4362d1eSAlex Smith	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
1988e4362d1eSAlex Smith	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
1989e4362d1eSAlex Smith	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
1990e4362d1eSAlex Smith	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
1991e4362d1eSAlex Smith	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
1992e4362d1eSAlex Smith	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
1993c9bace7cSDavid Daney	range 11 64
1994c9bace7cSDavid Daney	default "11"
1995c9bace7cSDavid Daney	help
1996c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
1997c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
1998c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
1999c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
2000c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
2001c9bace7cSDavid Daney	  increase this value.
2002c9bace7cSDavid Daney
2003c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
2004c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
2005c9bace7cSDavid Daney
2006c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
2007c9bace7cSDavid Daney	  when choosing a value for this option.
2008c9bace7cSDavid Daney
20091da177e4SLinus Torvaldsconfig BOARD_SCACHE
20101da177e4SLinus Torvalds	bool
20111da177e4SLinus Torvalds
20121da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
20131da177e4SLinus Torvalds	bool
20141da177e4SLinus Torvalds	select BOARD_SCACHE
20151da177e4SLinus Torvalds
20169318c51aSChris Dearman#
20179318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
20189318c51aSChris Dearman#
20199318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
20209318c51aSChris Dearman	bool
20219318c51aSChris Dearman	select BOARD_SCACHE
20229318c51aSChris Dearman
20231da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
20241da177e4SLinus Torvalds	bool
20251da177e4SLinus Torvalds	select BOARD_SCACHE
20261da177e4SLinus Torvalds
20271da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
20281da177e4SLinus Torvalds	bool
20291da177e4SLinus Torvalds	select BOARD_SCACHE
20301da177e4SLinus Torvalds
20311da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
20321da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
20331da177e4SLinus Torvalds	depends on CPU_SB1
20341da177e4SLinus Torvalds	help
20351da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
20361da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
20371da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
20381da177e4SLinus Torvalds
20391da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
2040c8094b53SRalf Baechle	bool
20411da177e4SLinus Torvalds
20423165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
20433165c846SFlorian Fainelli	bool
20443165c846SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
20453165c846SFlorian Fainelli
204691405eb6SFlorian Fainelliconfig CPU_R4K_FPU
204791405eb6SFlorian Fainelli	bool
204891405eb6SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
204991405eb6SFlorian Fainelli
205062cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
205162cedc4fSFlorian Fainelli	bool
205262cedc4fSFlorian Fainelli	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
205362cedc4fSFlorian Fainelli
205459d6ab86SRalf Baechleconfig MIPS_MT_SMP
2055a92b7f87SMarkos Chandras	bool "MIPS MT SMP support (1 TC on each available VPE)"
205659d6ab86SRalf Baechle	depends on SYS_SUPPORTS_MULTITHREADING
205759d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
2058d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
2059c080faa5SSteven J. Hill	select SYNC_R4K
20600c2cb004SPaul Burton	select MIPS_GIC_IPI
206159d6ab86SRalf Baechle	select MIPS_MT
206259d6ab86SRalf Baechle	select SMP
206387353d8aSRalf Baechle	select SMP_UP
2064c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
2065c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
2066399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
206759d6ab86SRalf Baechle	help
2068c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
2069c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
2070c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
2071c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
2072c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
207359d6ab86SRalf Baechle
2074f41ae0b2SRalf Baechleconfig MIPS_MT
2075f41ae0b2SRalf Baechle	bool
2076f41ae0b2SRalf Baechle
20770ab7aefcSRalf Baechleconfig SCHED_SMT
20780ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
20790ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
20800ab7aefcSRalf Baechle	default n
20810ab7aefcSRalf Baechle	help
20820ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
20830ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
20840ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
20850ab7aefcSRalf Baechle
20860ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
20870ab7aefcSRalf Baechle	bool
20880ab7aefcSRalf Baechle
2089f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
2090f41ae0b2SRalf Baechle	bool
2091f41ae0b2SRalf Baechle
2092f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
2093f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
2094f088fc84SRalf Baechle	default y
2095b633648cSRalf Baechle	depends on MIPS_MT_SMP
209607cc0c9eSRalf Baechle
2097b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR
2098b0a668fbSLeonid Yegoshin	bool "MIPS R2-to-R6 emulator"
2099b0a668fbSLeonid Yegoshin	depends on CPU_MIPSR6 && !SMP
2100b0a668fbSLeonid Yegoshin	default y
2101b0a668fbSLeonid Yegoshin	help
2102b0a668fbSLeonid Yegoshin	  Choose this option if you want to run non-R6 MIPS userland code.
2103b0a668fbSLeonid Yegoshin	  Even if you say 'Y' here, the emulator will still be disabled by
2104b0a668fbSLeonid Yegoshin	  default. You can enable it using the 'mipsr2emul' kernel option.
2105b0a668fbSLeonid Yegoshin	  The only reason this is a build-time option is to save ~14K from the
2106b0a668fbSLeonid Yegoshin	  final kernel image.
2107b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels"
2108b0a668fbSLeonid Yegoshin	depends on SMP && CPU_MIPSR6
2109b0a668fbSLeonid Yegoshin
211007cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
211107cc0c9eSRalf Baechle	bool "VPE loader support."
2112704e6460SMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && MODULES
211307cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
211407cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
211507cc0c9eSRalf Baechle	select MIPS_MT
211607cc0c9eSRalf Baechle	help
211707cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
211807cc0c9eSRalf Baechle	  onto another VPE and running it.
2119f088fc84SRalf Baechle
212017a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
212117a1d523SDeng-Cheng Zhu	bool
212217a1d523SDeng-Cheng Zhu	default "y"
212317a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
212417a1d523SDeng-Cheng Zhu
21251a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
21261a2a6d7eSDeng-Cheng Zhu	bool
21271a2a6d7eSDeng-Cheng Zhu	default "y"
21281a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
21291a2a6d7eSDeng-Cheng Zhu
2130e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2131e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2132e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2133e01402b1SRalf Baechle	default y
2134e01402b1SRalf Baechle	help
2135e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2136e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2137e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2138e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2139e01402b1SRalf Baechle
2140e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2141e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2142e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
21435e83d430SRalf Baechle	help
2144e01402b1SRalf Baechle
2145da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2146da615cf6SDeng-Cheng Zhu	bool
2147da615cf6SDeng-Cheng Zhu	default "y"
2148da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2149da615cf6SDeng-Cheng Zhu
21502c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
21512c973ef0SDeng-Cheng Zhu	bool
21522c973ef0SDeng-Cheng Zhu	default "y"
21532c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
21542c973ef0SDeng-Cheng Zhu
21554a16ff4cSRalf Baechleconfig MIPS_CMP
21565cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
2157b633648cSRalf Baechle	depends on SYS_SUPPORTS_MIPS_CMP
215872e20142SPaul Burton	select MIPS_GIC_IPI
2159b10b43baSMarkos Chandras	select SMP
2160eb9b5141STim Anderson	select SYNC_R4K
2161b10b43baSMarkos Chandras	select SYS_SUPPORTS_SMP
21624a16ff4cSRalf Baechle	select WEAK_ORDERING
21634a16ff4cSRalf Baechle	default n
21644a16ff4cSRalf Baechle	help
2165044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2166044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2167044505c7SPaul Burton	  its ability to start secondary CPUs.
21684a16ff4cSRalf Baechle
21695cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
21705cac93b3SPaul Burton	  instead of this.
21715cac93b3SPaul Burton
21720ee958e1SPaul Burtonconfig MIPS_CPS
21730ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
21740ee958e1SPaul Burton	depends on SYS_SUPPORTS_MIPS_CPS
21750ee958e1SPaul Burton	select MIPS_CM
21760ee958e1SPaul Burton	select MIPS_CPC
21771d8f1f5aSPaul Burton	select MIPS_CPS_PM if HOTPLUG_CPU
21780ee958e1SPaul Burton	select MIPS_GIC_IPI
21790ee958e1SPaul Burton	select SMP
21800ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
21811d8f1f5aSPaul Burton	select SYS_SUPPORTS_HOTPLUG_CPU
21820ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
21830ee958e1SPaul Burton	select WEAK_ORDERING
21840ee958e1SPaul Burton	help
21850ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
21860ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
21870ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
21880ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
21890ee958e1SPaul Burton	  support is unavailable.
21900ee958e1SPaul Burton
21913179d37eSPaul Burtonconfig MIPS_CPS_PM
219239a59593SMarkos Chandras	depends on MIPS_CPS
2193a8b84677SPaul Burton	select MIPS_CPC
21943179d37eSPaul Burton	bool
21953179d37eSPaul Burton
219672e20142SPaul Burtonconfig MIPS_GIC_IPI
219772e20142SPaul Burton	bool
219872e20142SPaul Burton
21999f98f3ddSPaul Burtonconfig MIPS_CM
22009f98f3ddSPaul Burton	bool
22019f98f3ddSPaul Burton
22029c38cf44SPaul Burtonconfig MIPS_CPC
22039c38cf44SPaul Burton	bool
22042600990eSRalf Baechle
22051da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS
22061da177e4SLinus Torvalds	bool
22071da177e4SLinus Torvalds	depends on CPU_SB1_PASS_1
22081da177e4SLinus Torvalds	default y
22091da177e4SLinus Torvalds
22101da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
22111da177e4SLinus Torvalds	bool
22121da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
22131da177e4SLinus Torvalds	default y
22141da177e4SLinus Torvalds
22151da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
22161da177e4SLinus Torvalds	bool
22171da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
22181da177e4SLinus Torvalds	default y
22191da177e4SLinus Torvalds
22202235a54dSSanjay Lal
222160ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT
222234adb28dSRalf Baechle       bool
222360ec6571Spascal@pabr.org
22249e2b5372SMarkos Chandraschoice
22259e2b5372SMarkos Chandras	prompt "SmartMIPS or microMIPS ASE support"
22269e2b5372SMarkos Chandras
22279e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
22289e2b5372SMarkos Chandras	bool "None"
22299e2b5372SMarkos Chandras	help
22309e2b5372SMarkos Chandras	  Select this if you want neither microMIPS nor SmartMIPS support
22319e2b5372SMarkos Chandras
22329693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
22339693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
22349e2b5372SMarkos Chandras	bool "SmartMIPS"
22359693a853SFranck Bui-Huu	help
22369693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
22379693a853SFranck Bui-Huu	  increased security at both hardware and software level for
22389693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
22399693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
22409693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
22419693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
22429693a853SFranck Bui-Huu	  here.
22439693a853SFranck Bui-Huu
2244bce86083SSteven J. Hillconfig CPU_MICROMIPS
22457fd08ca5SLeonid Yegoshin	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
22469e2b5372SMarkos Chandras	bool "microMIPS"
2247bce86083SSteven J. Hill	help
2248bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2249bce86083SSteven J. Hill	  microMIPS ISA
2250bce86083SSteven J. Hill
22519e2b5372SMarkos Chandrasendchoice
22529e2b5372SMarkos Chandras
2253a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
22544af94d5dSPaul Burton	bool "Support for the MIPS SIMD Architecture (EXPERIMENTAL)"
2255a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
22562a6cb669SPaul Burton	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2257a5e9a69eSPaul Burton	help
2258a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2259a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
22601db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
22611db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
22621db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
22631db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
22641db1af84SPaul Burton	  the size & complexity of your kernel.
2265a5e9a69eSPaul Burton
2266a5e9a69eSPaul Burton	  If unsure, say Y.
2267a5e9a69eSPaul Burton
22681da177e4SLinus Torvaldsconfig CPU_HAS_WB
2269f7062ddbSRalf Baechle	bool
2270e01402b1SRalf Baechle
2271df0ac8a4SKevin Cernekeeconfig XKS01
2272df0ac8a4SKevin Cernekee	bool
2273df0ac8a4SKevin Cernekee
2274f41ae0b2SRalf Baechle#
2275f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2276f41ae0b2SRalf Baechle#
2277e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2278f41ae0b2SRalf Baechle	bool
2279e01402b1SRalf Baechle
2280f41ae0b2SRalf Baechle#
2281f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2282f41ae0b2SRalf Baechle#
2283e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2284f41ae0b2SRalf Baechle	bool
2285e01402b1SRalf Baechle
22861da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
22871da177e4SLinus Torvalds	bool
22881da177e4SLinus Torvalds	depends on !CPU_R3000
22891da177e4SLinus Torvalds	default y
22901da177e4SLinus Torvalds
22911da177e4SLinus Torvalds#
229220d60d99SMaciej W. Rozycki# CPU non-features
229320d60d99SMaciej W. Rozycki#
229420d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
229520d60d99SMaciej W. Rozycki	bool
229620d60d99SMaciej W. Rozycki
229720d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
229820d60d99SMaciej W. Rozycki	bool
229920d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
230020d60d99SMaciej W. Rozycki
230120d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
230220d60d99SMaciej W. Rozycki	bool
230320d60d99SMaciej W. Rozycki
230420d60d99SMaciej W. Rozycki#
23051da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
23061da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
23071da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
23081da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
23091da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
23101da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
23111da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
23121da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2313797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2314797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2315797798c1SRalf Baechle#   support.
23161da177e4SLinus Torvalds#
23171da177e4SLinus Torvaldsconfig HIGHMEM
23181da177e4SLinus Torvalds	bool "High Memory Support"
2319a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2320797798c1SRalf Baechle
2321797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2322797798c1SRalf Baechle	bool
2323797798c1SRalf Baechle
2324797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2325797798c1SRalf Baechle	bool
23261da177e4SLinus Torvalds
23279693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
23289693a853SFranck Bui-Huu	bool
23299693a853SFranck Bui-Huu
2330a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2331a6a4834cSSteven J. Hill	bool
2332a6a4834cSSteven J. Hill
2333377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16
2334377cb1b6SRalf Baechle	bool
2335377cb1b6SRalf Baechle	help
2336377cb1b6SRalf Baechle	  This option must be set if a kernel might be executed on a MIPS16-
2337377cb1b6SRalf Baechle	  enabled CPU even if MIPS16 is not actually being used.  In other
2338377cb1b6SRalf Baechle	  words, it makes the kernel MIPS16-tolerant.
2339377cb1b6SRalf Baechle
2340a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2341a5e9a69eSPaul Burton	bool
2342a5e9a69eSPaul Burton
2343b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2344b4819b59SYoichi Yuasa	def_bool y
2345f133f22dSWu Zhangjin	depends on !NUMA && !CPU_LOONGSON2
2346b4819b59SYoichi Yuasa
2347d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE
2348d8cb4e11SRalf Baechle	bool
2349d8cb4e11SRalf Baechle	default y if SGI_IP27
2350d8cb4e11SRalf Baechle	help
23513dde6ad8SDavid Sterba	  Say Y to support efficient handling of discontiguous physical memory,
2352d8cb4e11SRalf Baechle	  for architectures which are either NUMA (Non-Uniform Memory Access)
2353d8cb4e11SRalf Baechle	  or have huge holes in the physical address space for other reasons.
2354d8cb4e11SRalf Baechle	  See <file:Documentation/vm/numa> for more.
2355d8cb4e11SRalf Baechle
2356b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2357b1c6cd42SAtsushi Nemoto	bool
23587de58fabSAtsushi Nemoto	select SPARSEMEM_STATIC
235931473747SAtsushi Nemoto
2360d8cb4e11SRalf Baechleconfig NUMA
2361d8cb4e11SRalf Baechle	bool "NUMA Support"
2362d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2363d8cb4e11SRalf Baechle	help
2364d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2365d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2366d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2367d8cb4e11SRalf Baechle	  leave it disabled; on single node systems disable this option
2368d8cb4e11SRalf Baechle	  disabled.
2369d8cb4e11SRalf Baechle
2370d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2371d8cb4e11SRalf Baechle	bool
2372d8cb4e11SRalf Baechle
2373c80d79d7SYasunori Gotoconfig NODES_SHIFT
2374c80d79d7SYasunori Goto	int
2375c80d79d7SYasunori Goto	default "6"
2376c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2377c80d79d7SYasunori Goto
237814f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
237914f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
2380b633648cSRalf Baechle	depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP)
238114f70012SDeng-Cheng Zhu	default y
238214f70012SDeng-Cheng Zhu	help
238314f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
238414f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
238514f70012SDeng-Cheng Zhu
2386b4819b59SYoichi Yuasasource "mm/Kconfig"
2387b4819b59SYoichi Yuasa
23881da177e4SLinus Torvaldsconfig SMP
23891da177e4SLinus Torvalds	bool "Multi-Processing support"
2390e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2391e73ea273SRalf Baechle	help
23921da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
23934a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
23944a474157SRobert Graffham	  than one CPU, say Y.
23951da177e4SLinus Torvalds
23964a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
23971da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
23981da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
23994a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
24001da177e4SLinus Torvalds	  will run faster if you say N here.
24011da177e4SLinus Torvalds
24021da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
24031da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
24041da177e4SLinus Torvalds
240503502faaSAdrian Bunk	  See also the SMP-HOWTO available at
240603502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
24071da177e4SLinus Torvalds
24081da177e4SLinus Torvalds	  If you don't know what to do here, say N.
24091da177e4SLinus Torvalds
241087353d8aSRalf Baechleconfig SMP_UP
241187353d8aSRalf Baechle	bool
241287353d8aSRalf Baechle
24134a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
24144a16ff4cSRalf Baechle	bool
24154a16ff4cSRalf Baechle
24160ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
24170ee958e1SPaul Burton	bool
24180ee958e1SPaul Burton
2419e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2420e73ea273SRalf Baechle	bool
2421e73ea273SRalf Baechle
2422130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2423130e2fb7SRalf Baechle	bool
2424130e2fb7SRalf Baechle
2425130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2426130e2fb7SRalf Baechle	bool
2427130e2fb7SRalf Baechle
2428130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2429130e2fb7SRalf Baechle	bool
2430130e2fb7SRalf Baechle
2431130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2432130e2fb7SRalf Baechle	bool
2433130e2fb7SRalf Baechle
2434130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2435130e2fb7SRalf Baechle	bool
2436130e2fb7SRalf Baechle
24371da177e4SLinus Torvaldsconfig NR_CPUS
2438a91796a9SJayachandran C	int "Maximum number of CPUs (2-256)"
2439a91796a9SJayachandran C	range 2 256
24401da177e4SLinus Torvalds	depends on SMP
2441130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2442130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2443130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2444130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2445130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
24461da177e4SLinus Torvalds	help
24471da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
24481da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
24491da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
245072ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
245172ede9b1SAtsushi Nemoto	  and 2 for all others.
24521da177e4SLinus Torvalds
24531da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
245472ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
245572ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
245672ede9b1SAtsushi Nemoto	  power of two.
24571da177e4SLinus Torvalds
2458399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2459399aaa25SAl Cooper	bool
2460399aaa25SAl Cooper
24611723b4a3SAtsushi Nemoto#
24621723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
24631723b4a3SAtsushi Nemoto#
24641723b4a3SAtsushi Nemoto
24651723b4a3SAtsushi Nemotochoice
24661723b4a3SAtsushi Nemoto	prompt "Timer frequency"
24671723b4a3SAtsushi Nemoto	default HZ_250
24681723b4a3SAtsushi Nemoto	help
24691723b4a3SAtsushi Nemoto	 Allows the configuration of the timer frequency.
24701723b4a3SAtsushi Nemoto
24711723b4a3SAtsushi Nemoto	config HZ_48
24720f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
24731723b4a3SAtsushi Nemoto
24741723b4a3SAtsushi Nemoto	config HZ_100
24751723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
24761723b4a3SAtsushi Nemoto
24771723b4a3SAtsushi Nemoto	config HZ_128
24781723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
24791723b4a3SAtsushi Nemoto
24801723b4a3SAtsushi Nemoto	config HZ_250
24811723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
24821723b4a3SAtsushi Nemoto
24831723b4a3SAtsushi Nemoto	config HZ_256
24841723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
24851723b4a3SAtsushi Nemoto
24861723b4a3SAtsushi Nemoto	config HZ_1000
24871723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
24881723b4a3SAtsushi Nemoto
24891723b4a3SAtsushi Nemoto	config HZ_1024
24901723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
24911723b4a3SAtsushi Nemoto
24921723b4a3SAtsushi Nemotoendchoice
24931723b4a3SAtsushi Nemoto
24941723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
24951723b4a3SAtsushi Nemoto	bool
24961723b4a3SAtsushi Nemoto
24971723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
24981723b4a3SAtsushi Nemoto	bool
24991723b4a3SAtsushi Nemoto
25001723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
25011723b4a3SAtsushi Nemoto	bool
25021723b4a3SAtsushi Nemoto
25031723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
25041723b4a3SAtsushi Nemoto	bool
25051723b4a3SAtsushi Nemoto
25061723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
25071723b4a3SAtsushi Nemoto	bool
25081723b4a3SAtsushi Nemoto
25091723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
25101723b4a3SAtsushi Nemoto	bool
25111723b4a3SAtsushi Nemoto
25121723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
25131723b4a3SAtsushi Nemoto	bool
25141723b4a3SAtsushi Nemoto
25151723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
25161723b4a3SAtsushi Nemoto	bool
25171723b4a3SAtsushi Nemoto	default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
25181723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
25191723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
25201723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
25211723b4a3SAtsushi Nemoto
25221723b4a3SAtsushi Nemotoconfig HZ
25231723b4a3SAtsushi Nemoto	int
25241723b4a3SAtsushi Nemoto	default 48 if HZ_48
25251723b4a3SAtsushi Nemoto	default 100 if HZ_100
25261723b4a3SAtsushi Nemoto	default 128 if HZ_128
25271723b4a3SAtsushi Nemoto	default 250 if HZ_250
25281723b4a3SAtsushi Nemoto	default 256 if HZ_256
25291723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
25301723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
25311723b4a3SAtsushi Nemoto
253296685b17SDeng-Cheng Zhuconfig SCHED_HRTICK
253396685b17SDeng-Cheng Zhu	def_bool HIGH_RES_TIMERS
253496685b17SDeng-Cheng Zhu
2535e80de850SRalf Baechlesource "kernel/Kconfig.preempt"
25361da177e4SLinus Torvalds
2537ea6e942bSAtsushi Nemotoconfig KEXEC
25387d60717eSKees Cook	bool "Kexec system call"
2539ea6e942bSAtsushi Nemoto	help
2540ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2541ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
25423dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2543ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2544ea6e942bSAtsushi Nemoto
254501dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2546ea6e942bSAtsushi Nemoto
2547ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2548ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2549bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2550bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2551bf220695SGeert Uytterhoeven	  made.
2552ea6e942bSAtsushi Nemoto
25537aa1c8f4SRalf Baechleconfig CRASH_DUMP
25547aa1c8f4SRalf Baechle	  bool "Kernel crash dumps"
25557aa1c8f4SRalf Baechle	  help
25567aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
25577aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
25587aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
25597aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
25607aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
25617aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
25627aa1c8f4SRalf Baechle	  PHYSICAL_START.
25637aa1c8f4SRalf Baechle
25647aa1c8f4SRalf Baechleconfig PHYSICAL_START
25657aa1c8f4SRalf Baechle	  hex "Physical address where the kernel is loaded"
25667aa1c8f4SRalf Baechle	  default "0xffffffff84000000" if 64BIT
25677aa1c8f4SRalf Baechle	  default "0x84000000" if 32BIT
25687aa1c8f4SRalf Baechle	  depends on CRASH_DUMP
25697aa1c8f4SRalf Baechle	  help
25707aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
25717aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
25727aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
25737aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
25747aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
25757aa1c8f4SRalf Baechle
2576ea6e942bSAtsushi Nemotoconfig SECCOMP
2577ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2578293c5bd1SRalf Baechle	depends on PROC_FS
2579ea6e942bSAtsushi Nemoto	default y
2580ea6e942bSAtsushi Nemoto	help
2581ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2582ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2583ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2584ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2585ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2586ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2587ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2588ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2589ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2590ea6e942bSAtsushi Nemoto
2591ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2592ea6e942bSAtsushi Nemoto
2593597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
259406e2e882SPaul Burton	bool "Support for O32 binaries using 64-bit FP (EXPERIMENTAL)"
2595597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
2596597ce172SPaul Burton	help
2597597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
2598597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
2599597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2600597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
2601597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
2602597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
2603597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
2604597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
2605597ce172SPaul Burton	  saying N here.
2606597ce172SPaul Burton
260706e2e882SPaul Burton	  Although binutils currently supports use of this flag the details
260806e2e882SPaul Burton	  concerning its effect upon the O32 ABI in userland are still being
260906e2e882SPaul Burton	  worked on. In order to avoid userland becoming dependant upon current
261006e2e882SPaul Burton	  behaviour before the details have been finalised, this option should
261106e2e882SPaul Burton	  be considered experimental and only enabled by those working upon
261206e2e882SPaul Burton	  said details.
261306e2e882SPaul Burton
261406e2e882SPaul Burton	  If unsure, say N.
2615597ce172SPaul Burton
2616f2ffa5abSDezhong Diaoconfig USE_OF
26170b3e06fdSJonas Gorski	bool
2618f2ffa5abSDezhong Diao	select OF
2619e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
2620abd2363fSGrant Likely	select IRQ_DOMAIN
2621f2ffa5abSDezhong Diao
26227fafb068SAndrew Brestickerconfig BUILTIN_DTB
26237fafb068SAndrew Bresticker	bool
26247fafb068SAndrew Bresticker
26255e83d430SRalf Baechleendmenu
26265e83d430SRalf Baechle
26271df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
26281df0f0ffSAtsushi Nemoto	bool
26291df0f0ffSAtsushi Nemoto	default y
26301df0f0ffSAtsushi Nemoto
26311df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
26321df0f0ffSAtsushi Nemoto	bool
26331df0f0ffSAtsushi Nemoto	default y
26341df0f0ffSAtsushi Nemoto
2635b6c3539bSRalf Baechlesource "init/Kconfig"
2636b6c3539bSRalf Baechle
2637dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
2638dc52ddc0SMatt Helsley
26391da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
26401da177e4SLinus Torvalds
26415e83d430SRalf Baechleconfig HW_HAS_EISA
26425e83d430SRalf Baechle	bool
26431da177e4SLinus Torvaldsconfig HW_HAS_PCI
26441da177e4SLinus Torvalds	bool
26451da177e4SLinus Torvalds
26461da177e4SLinus Torvaldsconfig PCI
26471da177e4SLinus Torvalds	bool "Support for PCI controller"
26481da177e4SLinus Torvalds	depends on HW_HAS_PCI
2649abb4ae46SRalf Baechle	select PCI_DOMAINS
26500f3b3956SMichael S. Tsirkin	select NO_GENERIC_PCI_IOPORT_MAP
26511da177e4SLinus Torvalds	help
26521da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
26531da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
26541da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
26551da177e4SLinus Torvalds	  say Y, otherwise N.
26561da177e4SLinus Torvalds
26570e476d91SHuacai Chenconfig HT_PCI
26580e476d91SHuacai Chen	bool "Support for HT-linked PCI"
26590e476d91SHuacai Chen	default y
26600e476d91SHuacai Chen	depends on CPU_LOONGSON3
26610e476d91SHuacai Chen	select PCI
26620e476d91SHuacai Chen	select PCI_DOMAINS
26630e476d91SHuacai Chen	help
26640e476d91SHuacai Chen	  Loongson family machines use Hyper-Transport bus for inter-core
26650e476d91SHuacai Chen	  connection and device connection. The PCI bus is a subordinate
26660e476d91SHuacai Chen	  linked at HT. Choose Y for Loongson-3 based machines.
26670e476d91SHuacai Chen
26681da177e4SLinus Torvaldsconfig PCI_DOMAINS
26691da177e4SLinus Torvalds	bool
26701da177e4SLinus Torvalds
26711da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
26721da177e4SLinus Torvalds
26733f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig"
26743f787ca4SJonas Gorski
26751da177e4SLinus Torvalds#
26761da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
26771da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
26781da177e4SLinus Torvalds# users to choose the right thing ...
26791da177e4SLinus Torvalds#
26801da177e4SLinus Torvaldsconfig ISA
26811da177e4SLinus Torvalds	bool
26821da177e4SLinus Torvalds
26831da177e4SLinus Torvaldsconfig EISA
26841da177e4SLinus Torvalds	bool "EISA support"
26855e83d430SRalf Baechle	depends on HW_HAS_EISA
26861da177e4SLinus Torvalds	select ISA
2687aa414dffSRalf Baechle	select GENERIC_ISA_DMA
26881da177e4SLinus Torvalds	---help---
26891da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
26901da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
26911da177e4SLinus Torvalds
26921da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
26931da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
26941da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
26951da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
26961da177e4SLinus Torvalds
26971da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
26981da177e4SLinus Torvalds
26991da177e4SLinus Torvalds	  Otherwise, say N.
27001da177e4SLinus Torvalds
27011da177e4SLinus Torvaldssource "drivers/eisa/Kconfig"
27021da177e4SLinus Torvalds
27031da177e4SLinus Torvaldsconfig TC
27041da177e4SLinus Torvalds	bool "TURBOchannel support"
27051da177e4SLinus Torvalds	depends on MACH_DECSTATION
27061da177e4SLinus Torvalds	help
270750a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
270850a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
270950a23e6eSJustin P. Mattock	  at:
271050a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
271150a23e6eSJustin P. Mattock	  and:
271250a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
271350a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
271450a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
27151da177e4SLinus Torvalds
27161da177e4SLinus Torvaldsconfig MMU
27171da177e4SLinus Torvalds	bool
27181da177e4SLinus Torvalds	default y
27191da177e4SLinus Torvalds
2720d865bea4SRalf Baechleconfig I8253
2721d865bea4SRalf Baechle	bool
2722798778b8SRussell King	select CLKSRC_I8253
27232d02612fSThomas Gleixner	select CLKEVT_I8253
27249726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
2725d865bea4SRalf Baechle
2726e05eb3f8SRalf Baechleconfig ZONE_DMA
2727e05eb3f8SRalf Baechle	bool
2728e05eb3f8SRalf Baechle
2729cce335aeSRalf Baechleconfig ZONE_DMA32
2730cce335aeSRalf Baechle	bool
2731cce335aeSRalf Baechle
27321da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
27331da177e4SLinus Torvalds
27341da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig"
27351da177e4SLinus Torvalds
2736388b78adSAlexandre Bounineconfig RAPIDIO
273756abde72SAlexandre Bounine	tristate "RapidIO support"
2738388b78adSAlexandre Bounine	depends on PCI
2739388b78adSAlexandre Bounine	default n
2740388b78adSAlexandre Bounine	help
2741388b78adSAlexandre Bounine	  If you say Y here, the kernel will include drivers and
2742388b78adSAlexandre Bounine	  infrastructure code to support RapidIO interconnect devices.
2743388b78adSAlexandre Bounine
2744388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig"
2745388b78adSAlexandre Bounine
27461da177e4SLinus Torvaldsendmenu
27471da177e4SLinus Torvalds
27481da177e4SLinus Torvaldsmenu "Executable file formats"
27491da177e4SLinus Torvalds
27501da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
27511da177e4SLinus Torvalds
27521da177e4SLinus Torvaldsconfig TRAD_SIGNALS
27531da177e4SLinus Torvalds	bool
27541da177e4SLinus Torvalds
27551da177e4SLinus Torvaldsconfig MIPS32_COMPAT
275678aaf956SRalf Baechle	bool
27571da177e4SLinus Torvalds
27581da177e4SLinus Torvaldsconfig COMPAT
27591da177e4SLinus Torvalds	bool
27601da177e4SLinus Torvalds
276105e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
276205e43966SAtsushi Nemoto	bool
276305e43966SAtsushi Nemoto
27641da177e4SLinus Torvaldsconfig MIPS32_O32
27651da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
276678aaf956SRalf Baechle	depends on 64BIT
276778aaf956SRalf Baechle	select ARCH_WANT_OLD_COMPAT_IPC
276878aaf956SRalf Baechle	select COMPAT
276978aaf956SRalf Baechle	select MIPS32_COMPAT
277078aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
27711da177e4SLinus Torvalds	help
27721da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
27731da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
27741da177e4SLinus Torvalds	  existing binaries are in this format.
27751da177e4SLinus Torvalds
27761da177e4SLinus Torvalds	  If unsure, say Y.
27771da177e4SLinus Torvalds
27781da177e4SLinus Torvaldsconfig MIPS32_N32
27791da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
2780c22eacfeSRalf Baechle	depends on 64BIT
278178aaf956SRalf Baechle	select COMPAT
278278aaf956SRalf Baechle	select MIPS32_COMPAT
278378aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
27841da177e4SLinus Torvalds	help
27851da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
27861da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
27871da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
27881da177e4SLinus Torvalds	  cases.
27891da177e4SLinus Torvalds
27901da177e4SLinus Torvalds	  If unsure, say N.
27911da177e4SLinus Torvalds
27921da177e4SLinus Torvaldsconfig BINFMT_ELF32
27931da177e4SLinus Torvalds	bool
27941da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
27951da177e4SLinus Torvalds
27962116245eSRalf Baechleendmenu
27971da177e4SLinus Torvalds
27982116245eSRalf Baechlemenu "Power management options"
2799952fa954SRodolfo Giometti
2800363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
2801363c55caSWu Zhangjin	def_bool y
28023f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2803363c55caSWu Zhangjin
2804f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
2805f4cb5700SJohannes Berg	def_bool y
28063f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2807f4cb5700SJohannes Berg
28082116245eSRalf Baechlesource "kernel/power/Kconfig"
2809952fa954SRodolfo Giometti
28101da177e4SLinus Torvaldsendmenu
28111da177e4SLinus Torvalds
28127a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
28137a998935SViresh Kumar	bool
28147a998935SViresh Kumar
28157a998935SViresh Kumarmenu "CPU Power Management"
2816c095ebafSPaul Burton
2817c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
28187a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
28197a998935SViresh Kumarendif
28209726b43aSWu Zhangjin
2821c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig"
2822c095ebafSPaul Burton
2823c095ebafSPaul Burtonendmenu
2824c095ebafSPaul Burton
2825d5950b43SSam Ravnborgsource "net/Kconfig"
2826d5950b43SSam Ravnborg
28271da177e4SLinus Torvaldssource "drivers/Kconfig"
28281da177e4SLinus Torvalds
282998cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
283098cdee0eSRalf Baechle
28311da177e4SLinus Torvaldssource "fs/Kconfig"
28321da177e4SLinus Torvalds
28331da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug"
28341da177e4SLinus Torvalds
28351da177e4SLinus Torvaldssource "security/Kconfig"
28361da177e4SLinus Torvalds
28371da177e4SLinus Torvaldssource "crypto/Kconfig"
28381da177e4SLinus Torvalds
28391da177e4SLinus Torvaldssource "lib/Kconfig"
28402235a54dSSanjay Lal
28412235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
2842